A system on a chip having runtime reconfigurable hardware configured to be adapted to an application, comprising:

A method and System on Chip (SoC) for adapting a reconfigurable hardware for an application at run time is provided. The method includes obtaining a plurality of application substructures corresponding to the application. An application substructure performs one or more of a plurality of functions of the application...

Provided is an apparatus (400) for implementing dynamic, data-dependent parallelism for task execution based on a macro dataflow execution model (412). The execution model (412) defines a plurality of high-level abstractions that determine the behavior of a plurality of hardware components of the apparatus (400). Th...

Provided is polymorphic computing fabric (100) for static dataflow execution of computing kernels represented as dataflow graphs (DFGs), wherein the DFGs are realized directly in hardware. The computing fabric (100) includes a plurality of components arranged in a matrix configuration. The plurality of components i...

Disclosed is an apparatus (100) for implementing data-driven synchronization in task-parallel and barrier synchronization in data-parallel programs. The apparatus (100) includes multiple compute elements (CEs) (102-1 to 102-N) for cooperative execution of a program composed of tasks. Tasks are either compute-tasks o...