A system for implementing functional logics of a verification IP using a transaction level modeling (TLM) is provided. The system includes (A) a stimulus generator 102 to initiate a transaction and transmit the transaction through a transaction level model interface, (B) a verification IP unit 104 to receive and pro...
An embodiment herein provides a method for implementing verification IP for pre-silicon functional verification of a layered protocol. The method includes generating serially connected layer blocks (102A-N). A layer block includes modular components that may be enabled or disabled to change a functionality of the la...
The present disclosure provides a system and method for implementing low-power, low code-size power delivery (PD) communication protocol on USB-C port which can be configured as Source, Sink, DRP or an eMarker. The system includes: a dividing unit configured to divide functionality in digital hardware portion throug...
The present disclosure provides an analogue to digital converter (ADC) (100), which includes: a capacitive digital to analogue converter (DAC) (120) configured to sample and hold a received sampling input signal and a latched comparator (140) including a first metal oxide semiconductor field effect transistor (MOSF...
The present disclosure provides for a hybrid DC-DC, Hybrid Variable Switched Capacitor (HVSC) power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associa...
The present disclosure provides a system and method for watermarking a USB Type-C and PD protocol hardware sub-system associated with an SOC/IC system, used in USB Type-C port-based device, along with a tester equipment to test such watermarking on field without any special equipment. The system primarily includes a...
The present disclosure provides a transceiver for transmission of data coded according to a Bi-phase Mark Coding (BMC) protocol through a configurable channel (CC) of a USB type-C port. The transceiver includes: a transmitter configured to receive the coded BMC data and transmit the coded BMC data through the CC lin...
The present disclosure relates to a method for facilitating dynamic power allocation and distribution in a multi-port power sourcing device. The method comprises receiving, by a first set of instructions to be executed on a multi-port power sourcing device, the one or more input parameters at the multi-port power so...
The present disclosure provides a system and method for detecting electrical connection and disconnection on an USB Type-A charging port like power adapters, power banks and car chargers having one or more USB Type-A charging port of an USB device. The system includes: a voltage source; a MOSFET SWITCH gate driver, ...
The present disclosure pertains to a circuitry for generating random data. The random data can be numbers. The circuitry includes a ring oscillator, a metastable oscillator, a first circuitry, and an analogue circuitry. The ring oscillator has a ring oscillator output frequency selectable through a selectable input ...
The present disclosure provides a DFT architecture for ICs and a method for testing the ICs with the proposed DFT architecture. The present disclosure also includes a focus on USB PD protocol with respect to the DFT architecture. The present disclosure also includes focus on testing IC with single I/O pin. The DFT a...
The present disclosure provides an apparatus and a method for implementing a USB-IF certified programmable power supply algorithm on a USB-C port. The method involves using a software code running on a microcontroller which monitors voltage and current being supplied by a power supply controller IC on a VBUS line of...
The present disclosure relates to a system and method for enabling power sharing in a multi-port power sourcing device. The system comprises of a multiport power sourcing device having a plurality of ports and a plurality of pre-defined resistances configured to each port of the plurality of ports and is configured ...
The present disclosure relates to an apparatus for adjusting AC-DC converter output voltage, the apparatus includes a plurality of ports (202), an AC- DC converter circuit (208), a plurality of DC-DC converters (204) coupled to a plurality of controllers, where the plurality of controllers (206-1 to 206-n) coupled ...
System and method for fault identification and fault handling in MPSD are provided. The system includes: a multi-port power sourcing device including multiple ports, a master is configured to: send a slave discovery request to multiple slave ports, receive a slave discovery response from the multiple slave ports; re...
The present disclosure provides for a bidirectional hybrid power converter that may include an input circuit consisting of an input power supply and input capacitor, a plurality of switches connected to each other, to input power supply, to a set of passive electronic components, to ground and to an output circuit c...
The present disclosure provides a system and method for reception of BMC data in USD PD communication. The system comprises an analog block and a digital block with the digital block further comprising an idle detection mechanism, and a digital controller for rejecting noise and auto correcting of received BMC signa...
The present disclosure relates to a system (100) for real-time debugging of microcontroller, the system includes a microcontroller (104) configured in an embedded device (102) to execute a set of instructions, the microcontroller includes a counter unit (106) that generates a set of values for the executed set of in...
The present disclosure relates to a system and method to enable power negotiations between a QC power source with no USBPD support and a USBPD device. The proposed method identifies the support of USBPD and QC in the devices; determines the possibility of direct communication between the devices over either D+/D- li...
The present disclosure relates to a method and system to facilitate temperature-aware redistribution of power in a power sourcing device comprising plurality of ports. The method can include monitoring, by using one or more sensors coupled to the power sourcing device, a first temperature associated with a first por...
The present disclosure provides a multiport universal serial bus (USB)-C based power supply device including a USB type-C port configured to supply power to a connected type-C external device, at least one USB type-A port configured to supply power to at least one connected type-A external sink device, a configurabl...
The present disclosure provides for a multi-ratio switched capacitor power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associated input capacitance, an...
The present disclosure provides a system (100) and a method (200) for real-time debugging of a processor (102). The system includes a debugging unit (104) configured to receive a first set of instructions from the processor. The first set of instructions includes a set of function calls and/or a set of jump instruct...
The present disclosure relates to an apparatus (100) for joint test action group (JTAG) and scan emulation, the apparatus includes a controller circuitry (102) that is interfaced to a target integrated circuit (IC) (106) for testing the target IC, the controller circuitry having one or more serial peripheral interfa...
A system is provided including an adaptive scoreboard for testing and verification of serial communication protocols. The scoreboard is configured to: receive, through a first port, actual data packets from a design under test (DUT), and, through a first pattern detection engine, based on a set of pre-defined skip p...
The present disclosure relates to a method and a system (200) for creating and debugging a silicon production test program for a semiconductor device. The method includes running a pre-silicon test program for testing a semiconductor device under test based on a plurality of test plan parameters. The method includes...