Abstract: A class-D amplifier (305) with multiple "nested" levels of feedback. The class-D amplifier (305) surrounds an inner feedback loop (340), which takes the output of a switching amplifier (310) and corrects for errors generated across the switching amplifier (310), with additional feedback loops (350) that also take the output of the switching amplifier (310).
TECHNICAL FIELD
[0002] The technology disclosed herein relates to audio amplifiers and in particular
class-D audio amplifiers with improved performance.
BACKGROUND
[0003] Audio amplifiers receive input signals and generate output signals with
increased power. For example, when the input signal is a time-varying signal such as
an audio signal, the amplifier output signal (i.e., the amplified signal) will have a
proportionally greater amplitude than the input signal. The gain of an amplifier
describes the ratio between the magnitude of the output and input signals, and the
amplifier's bandwidth is the range of frequencies amplified by the amplifier. One goal
of an amplifier is to produce an output signal with an acceptable gain, over needed
frequencies, without introducing unwanted distortions. Audio amplifiers, for example,
are designed to reproduce input audio signals at their output, with desired power levels
and with acceptable distortion, over typical audio frequency ranges (e.g., 20 Hz to 20
kHz).
[0004] Class-D amplifiers derive a pulse-width modulated (PWM) signal from an
input signal and amplify the PWM signal using switching transistors. The amplified
signal is then passed through a low-pass filter before generating the output signal.
Class-D amplifiers may utilize feedback to reduce distortion and noise in the output
signal. One of the challenges with such amplifiers is that even with the benefit of
feedback, there are limits to the gain and bandwidth that can be achieved by a class-D
amplifier before limitations arise. For example, for certain class-D amplifiers, there
exists a limit on how much gain may be achieved before the amplifier suffers from
stability issues. Accordingly, there is a need for an improved class-D amplifier design.
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BRIEF DESCRIPTION OF THE DRAWINGS
[0005]
[0006]
[0007]
Fig. 1 is a simplified block diagram of a conventional class-D amplifier;
Fig. 2 is a component-level diagram of a class-D amplifier with feedback;
Fig. 3 is a component-level diagram of a class-D amplifier with nested
feedback in accordance with one embodiment of the disclosed technology;
[0008] Fig. 4 is a schematic diagram of a nested feedback circuit for a class-D
amplifier in accordance with one embodiment of the disclosed technology; and
[0009] Fig. 5 is a component-level diagram of a class-D amplifier with additional
nested feedback in accordance with one embodiment of the disclosed technology.
DETAILED DESCRIPTION
[0010] As will be discussed in further detail below, the technology disclosed herein
relates to amplifiers and in particular to class-D amplifiers with nested feedback loops
that improve amplifier performance.
[0011] Embodiments of the present technology provide an audio amplifier having,
first and second summing nodes, a switch node, and a switching amplifier coupled
between the switch node and the first summing node. A filter is coupled to the switch
node, and the filter is between the switch mode and a speaker that receives the
amplified output signal. A global feedback loop receives a signal portion from filter and
provides the signal portion to a third summing node. A nested amplifier portion
generates a pulse-width modulated signal driven on the first summing node, and the
nested amplifier portion has a first feedback loop nested within second feedback loop.
The first feedback loop has a first loop feedback module that provides a first feedback
signal from the switch node to the first summing node. The second feedback loop
provides a second feedback signal from the switch node to the second summing node.
The second feedback loop has a second loop feedback module coupled between the
switch node and the second summing node. A second loop integrator module is
coupled to the second summing node. A second loop compensator module is coupled
to the second loop integrator module and a compensator node, with the second loop
integrator module between the second loop compensator module and the compensator
node. A second loop forward compensator module is coupled between the second loop
compensator module and the first summing node. The global feedback loop can have
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an outer loop feedback module between the filter and the third summing node, wherein
the third summing node receives an amplifier input signal. An outer loop summing
module is coupled to the third summing node, and an outer loop forward compensation
module is coupled to the outer loop summing module node and the second summing
node. The outer loop summing module is between the third summing node and the
outer loop forward compensator module.
[0012] Another embodiment provides an audio amplifier having first and second
summing nodes, a switch node, and a switching amplifier coupled between the switch
node and the first summing node. A filter coupled to the switch node is between the
switch mode and a speaker that receives the amplified output signal. A nested amplifier
portion is configured to generate an amplified signal portion driven on the first summing
node. The nested amplifier portion has a first feedback loop nested within second
feedback loop. The first feedback loop has a first loop feedback module that provides
a first feedback signal portion from the switch node to the first summing node. The
second feedback loop provides a second feedback signal portion from the switch node
to the second summing node. The second feedback loop has a second loop feedback
module coupled between the switch node and the second summing node. A second
loop integrator module is coupled to the second summing node. A second loop
compensator module is coupled to the second loop integrator module and a
compensator node, with the second loop integrator module between the second loop
compensator module and the compensator node. A second loop forward compensator
module is coupled between the second loop compensator module and the first summing
node.
[0013] Another embodiment of the present technology provides a class-0 amplifier
that receives an audio input signal. The amplifier comprises a switching amplifier
configured to drive an amplified signal to a switch node based on a pulse-width
modulated signal received by the switching amplifier at a first summing node. An
inductor/capacitor (LC) filter is coupled to the switch node and configured to generate
an amplifier output signal from the amplified signal driven by the switching amplifier. A
global feedback loop is coupled to the LC filter output, the input signal, and a global
summing node. Nested feedback circuits are configured to generate the pulse-width
modulated signal driven on the first summing node based on the input signal. The
nested feedback circuits have a first feedback loop nested within second feedback loop.
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The first feedback loop has a first loop feedback module from the switch node to the
first summing node. The second feedback loop has a second loop feedback module
coupled to the switch node and a second summing node. A second loop integrator
module is coupled to the second summing node and an integrator node. A second loop
compensator module is coupled to the integrator node and a compensator node, and a
second loop forward compensator module is coupled to the compensator node and the
first summing node.
[0014] The second loop feedback module can includes a resistor, the second loop
integrator module can includes a capacitor and an opamp, the second loop
compensator module can includes a resistor, a capacitor, and an opamp. The switching
amplifier can include two MOSFETs connected in series, wherein the pulse-width
modulated signal is coupled to the gate of both MOSFETs. The amplifier output signal
generated by the LC filter can drive a speaker. The amplifier of one or more
embodiment can include a third feedback loop coupled to the switch node, the input
signal, and the second summing node. The amplifier can have a triangle carrier signal
coupled to the first summing node.
[0015] Referring now to the drawings, Fig. 1 is a simplified block diagram of a
conventional class-0 amplifier 1 05 that generates an amplified output signal 11 0 from
an input signal 115. When the input signal and the output signal are audio signals, the
amplifier 1 05 can be used to drive, for example, a powered speaker 145. Though not
shown, the amplifier 1 05 can also be used to drive a rackmount power amplifier or other
audio equipment.
[0016] In the illustrated example, both the input signal115 and the amplified output
signal 11 0 are analog signals. However, as described herein, in a class-0 amplifier 1 05
the amplifying devices operate as electronic switches operating on received modulated
pulses. The illustrated amplifier 1 05 therefore generates a modulated signal 125 from
the input signal 115 using a modulator 120. The modulated signal can be a train of
square pulses of fixed amplitude but varying width and separation, and represents the
amplitude variations of the analog input signal. The modulated signal can be derived
using pulse-width modulation (PWM), pulse density modulation, or other forms of
modulation. For example, the modulator can be implemented as a comparator that
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compares a triangular carrier to the input signal, which generates a series of pulses in
which the duty cycle is proportional with the instantaneous value of the input signal.
[0017] The modulated signal 125 drives a switching amplifier 130, which
generates an amplified modulated signal 135. The frequency content of the amplified
modulated signal 135 includes high-frequency content from the modulation process, as
well as the content of the input signal 115. The class-0 amplifier 1 05 therefore may
include a low-pass filter 140 to filter out the high-frequency content prior to driving an
output device, such as the powered speaker 145. The low-pass filter can be
implemented, for example, using an inductor and a capacitor (i.e., an LC filter).
[0018] Class-0 amplifiers may utilize various forms of feedback to provide error
control, thereby reducing noise and distortion in the amplified output signal. For
example, a class-0 amplifier may use feedback from the input to the LC filter to correct
for noise on the rail voltages supplying the switching amplifier. Similarly, a class-0
amplifier may use feedback from the LC filter output to correct for noise introduced by
the filter.
[0019] Fig. 2 illustrates the component-level diagram of a class-0 amplifier 205
with feedback, constructed in accordance with an embodiment of the disclosed
technology. The amplifier 205 generates an amplified output signal 21 0 from an input
audio signal 215. The input audio signal 215 can be an analog audio signal. The
amplifier 205 includes a buffer stage 220 for the input audio signal, which can be
implemented for example using one or more resistors or other discrete elements. The
amplifier 205 also includes a switching amplifier 225 and an inductor/capacitor (LC) filter
230. The switching amplifier 225 can be implemented using amplifying devices, for
example MOSFET transistors, that operate as electronic switches. In some
embodiments, the switching amplifier 205 can have two MOSFETs connected in series,
and a pulse width modulated signal is coupled to the gate of the MOSFETs. The
transistors switch back and forth between the positive and negative rail voltages
supplying the transistors based on the modulated signal, thereby generating the
amplified modulated signal in which the pulse amplitude is based on the switching
transistor supply voltages. In other words, the amplification is achieved by virtue of the
switching. The switching amplifier and LC filter operate as described above with respect
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to the switching amplifier 130 and low-pass filter 140 illustrated in Fig. 1. The amplifier
205 of Fig. 2 additionally includes two feedback loops, described below.
[0020] The amplifier 205 includes an inner loop feedback module 240 driven by
the output of the switching amplifier 225, at a switch node 235, and drives a summing
node 245 at the switching amplifier input. The feedback from the switching amplifier
output (i.e., the switch node) to the switching amplifier input (i.e., the summing node)
enables the amplifier 205, for example, to correct for errors introduced by the switching
amplifier 225. The inner loop feedback module 240 can be implemented, for example,
using one or more resistors or other discrete elements.
[0021] The amplifier 205 additionally includes an outer feedback module 250,
which feeds the amplified output signal 21 0 of the amplifier 205 to an outer loop
summing node 255, which is additionally driven by the buffer stage 220. The outer
feedback module 250 can be implemented using, for example, one or more resistors,
capacitors, or other discrete elements. The outer loop summing node 255 drives an
outer loop summing module 260, which drives an outer loop forward compensation
module 265; the outer loop summing module 260 and outer loop forward compensation
module 265 collectively compensate for the outer feedback module 250. The outer loop
summing module 260 can be implemented as an operational amplifier ("opamp") with
summing error amp input, in which one or more resistors, capacitors, and other discrete
elements drive the opamp output back to the negative input of the opamp. The outer
loop forward compensation module 265, which drives the summing node 245 and
ultimately the switching amplifier 225, can be implemented with one or more resistors,
capacitors, or other discrete elements. The outer feedback, or global feedback, from
the amplifier output enables the amplifier 205 to correct for errors introduced by the LC
filter 230. Furthermore, the outer loop compensators enable further stability and error
correction.
CLAIMS
I claim:
1. An audio amplifier that generates an amplified output signal, comprising:
first and second summing nodes;
a switch node;
a switching amplifier coupled between the switch node and the first summing
node;
a filter coupled to the switch node, with the filter between the switch mode and a
speaker that receives the amplified output signal;
a global feedback loop configured to receive a signal portion from filter and
provide the signal portion to a third summing node; and
a nested amplifier portion configured to generate a pulse-width modulated signal
driven on the first summing node, the nested amplifier portion comprising
a first feedback loop nested within second feedback loop, wherein:
the first feedback loop comprises:
a first loop feedback module that provides a first feedback signal
from the switch node to the first summing node; and
the second feedback loop that provides a second feedback signal from
the switch node to the second summing node, the second feedback
loop comprises:
a second loop feedback module coupled between the switch node
and the second summing node;
a second loop integrator module coupled to the second summing
node;
a second loop compensator module coupled to the second loop
integrator module and a compensator node, with the second
loop integrator module between the second loop
compensator module and the compensator node; and
a second loop forward compensator module coupled between the
second loop compensator module and the first summing
node.
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2. The amplifier of claim 1 wherein the global feedback loop comprises:
an outer loop feedback module between the filter and the third summing node,
wherein the third summing node receives an amplifier input signal;
an outer loop summing module coupled to the third summing node; and
an outer loop forward compensation module coupled to the outer loop summing
module node and the second summing node, wherein the outer loop
summing module is between the third summing node and the outer loop
forward compensator module.
3. The amplifier of claim 1 wherein the second loop integrator module
includes a capacitor and an opamp.
4. The amplifier of claim 1 wherein the second loop compensator module
includes a resistor, a capacitor, and an opamp.
5. The amplifier of claim 1 wherein the switching amplifier includes two
MOSFETs connected in series, wherein the pulse-width modulated signal is coupled to
the gate of both MOSFETs.
6. The amplifier of claim 1 wherein the filter is an inductor/capacitor (LC)
filter.
7. The amplifier of claim 1 further comprising a triangle carrier signal coupled
to the first summing node.
8. An audio amplifier, comprising:
first and second summing nodes;
a switch node;
a switching amplifier coupled between the switch node and the first summing
node;
a filter coupled to the switch node, with the filter between the switch mode and a
speaker that receives the amplified output signal;
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a nested amplifier portion configured to generate an amplified signal portion
driven on the first summing node, the nested amplifier portion comprising
a first feedback loop nested within second feedback loop, wherein:
the first feedback loop comprises:
a first loop feedback module that provides a first feedback signal
portion from the switch node to the first summing node; and
the second feedback loop that provides a second feedback signal portion
from the switch node to the second summing node, the second
feedback loop comprises:
a second loop feedback module coupled between the switch node
and the second summing node;
a second loop integrator module coupled to the second summing
node;
a second loop compensator module coupled to the second loop
integrator module and a compensator node, with the second
loop integrator module between the second loop
compensator module and the compensator node; and
a second loop forward compensator module coupled between the
second loop compensator module and the first summing
node.
9. The amplifier of claim 8, further comprising a global feedback loop
configured to receive an output signal portion from filter and provide the output signal
portion to a third summing node, the global feedback loop comprising:
an outer loop feedback module between the filter and the third summing node,
wherein the third summing node receives an amplifier input signal;
an outer loop summing module coupled to the third summing node; and
an outer loop forward compensation module coupled to the outer loop summing
module node and the second summing node, wherein the outer loop
summing module is between the third summing node and the outer loop
forward compensator module.
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1 0. A class-0 amplifier that receives an audio input signal, the amplifier
comprising:
a switching amplifier configured to drive an amplified signal to a switch node
based on a pulse-width modulated signal received by the switching
amplifier at a first summing node;
an inductor/capacitor (LC) filter coupled to the switch node and configured to
generate an amplifier output signal from the amplified signal driven by the
switching amplifier;
a global feedback loop coupled to the LC filter output, the input signal, and a
global summing node; and
nested feedback circuits configured to generate the pulse-width modulated
signal driven on the first summing node, based on the input signal, the
nested feedback circuits comprising a first feedback loop nested within
second feedback loop, wherein:
the first feedback loop comprises:
a first loop feedback module from the switch node to the first
summing node; and
the second feedback loop comprises:
a second loop feedback module coupled to the switch node and a
second summing node;
a second loop integrator module coupled to the second summing
node and an integrator node;
a second loop compensator module coupled to the integrator node
and a compensator node; and
a second loop forward compensator module coupled to the
compensator node and the first summing node.
11. The class-0 amplifier of claim 1 0 wherein the global feedback loop
comprises:
an outer loop feedback module coupled between the LC filter output and the
global summing node, wherein the global summing node is configured to
receive the audio input signal;
an outer loop summing module coupled to the global summing node; and
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an outer loop forward compensation module coupled to the outer loop summing
node and the second summing node, wherein the outer loop summing
module is between the global summing node and the outer loop forward
compensator module.
12. The class-0 amplifier of claim 1 0 wherein the second loop feedback
module includes a resistor.
13. The class-0 amplifier of claim 10 wherein the second loop integrator
module includes a capacitor and an opamp.
14. The class-0 amplifier of claim 1 0 wherein the second loop compensator
module includes a resistor, a capacitor, and an opamp.
15. The class-0 amplifier of claim 10 wherein the second loop forward
compensator module includes a resistor.
16. The class-0 amplifier of claim 1 0 wherein the switching amplifier includes
two MOSFETs connected in series, wherein the pulse-width modulated signal is
coupled to the gate of both MOSFETs.
17. The class-0 amplifier of claim 10 wherein the input signal is an analog
audio signal.
18. The class-0 amplifier of claim 10 wherein the class-0 amplifier output
signal generated by the LC filter drives a speaker.
19. The class-0 amplifier of claim 1 0 further comprising a third feedback loop
coupled to the switch node, the input signal, and the second summing node.
20. The class-0 amplifier of claim 1 0 further comprising a triangle carrier
signal coupled to the first summing node.
| # | Name | Date |
|---|---|---|
| 1 | 202217073904-TRANSLATIOIN OF PRIOIRTY DOCUMENTS ETC. [20-12-2022(online)].pdf | 2022-12-20 |
| 2 | 202217073904-STATEMENT OF UNDERTAKING (FORM 3) [20-12-2022(online)].pdf | 2022-12-20 |
| 3 | 202217073904-REQUEST FOR EXAMINATION (FORM-18) [20-12-2022(online)].pdf | 2022-12-20 |
| 4 | 202217073904-PROOF OF RIGHT [20-12-2022(online)].pdf | 2022-12-20 |
| 5 | 202217073904-PRIORITY DOCUMENTS [20-12-2022(online)].pdf | 2022-12-20 |
| 6 | 202217073904-POWER OF AUTHORITY [20-12-2022(online)].pdf | 2022-12-20 |
| 7 | 202217073904-NOTIFICATION OF INT. APPLN. NO. & FILING DATE (PCT-RO-105-PCT Pamphlet) [20-12-2022(online)].pdf | 2022-12-20 |
| 8 | 202217073904-FORM 18 [20-12-2022(online)].pdf | 2022-12-20 |
| 9 | 202217073904-FORM 1 [20-12-2022(online)].pdf | 2022-12-20 |
| 10 | 202217073904-DRAWINGS [20-12-2022(online)].pdf | 2022-12-20 |
| 11 | 202217073904-DECLARATION OF INVENTORSHIP (FORM 5) [20-12-2022(online)].pdf | 2022-12-20 |
| 12 | 202217073904-COMPLETE SPECIFICATION [20-12-2022(online)].pdf | 2022-12-20 |
| 13 | 202217073904.pdf | 2022-12-25 |
| 14 | 202217073904-FORM 3 [14-02-2023(online)].pdf | 2023-02-14 |
| 15 | 202217073904-FORM 3 [14-11-2023(online)].pdf | 2023-11-14 |
| 16 | 202217073904-FER.pdf | 2025-10-13 |
| 17 | 202217073904-FORM 3 [11-11-2025(online)].pdf | 2025-11-11 |
| 1 | 202217073904_SearchStrategyNew_E_SEARCH_STRATEGYE_13-10-2025.pdf |