FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
[See section 10, Rule 13]
GATE DRIVE CIRCUIT AND POWER CONVERSION DEVICE
MITSUBISHI ELECTRIC CORPORATION, A CORPORATION ORGANISED
AND EXISTING UNDER THE LAWS OF JAPAN, WHOSE ADDRESS IS 7-3,
MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100-8310, JAPAN
THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE
INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED.
2
DESCRIPTION
TITLE OF THE INVENTION:
GATE DRIVE CIRCUIT AND POWER CONVERSION DEVICE
5
Field
[0001] The present disclosure relates to a gate drive
circuit that drives a switching semiconductor element, and
a power conversion device including the gate drive circuit.
10
Background
[0002] A power conversion device, such as an inverter
device, a servo amplifier device, or a switching power
supply device, includes a power conversion main circuit
15 incorporating one or a plurality of switching semiconductor
elements. In a switching semiconductor element, a
conduction state between a drain main terminal and a source
main terminal changes according to an electric signal
applied between a gate terminal and a source terminal. A
20 gate drive circuit receives a command signal from a higherlevel controller, and applies an electric signal between a
gate terminal and a source terminal of a switching
semiconductor element to drive the switching semiconductor
element.
25 [0003] As a detection value representing a drive state
of a switching semiconductor element, the voltage between
main terminals of the switching semiconductor element has
been directly detected and transmitted to a gate drive
circuit. One of the purposes of detecting the voltage
30 between the main terminals is to change the switching drive
speed of the switching semiconductor element based on the
drive state of the switching semiconductor element. By
changing the switching drive speed of the switching
3
semiconductor element, the loss of the switching
semiconductor element can be reduced. Another purpose of
detecting the voltage between the main terminals is to
prevent an excessive high voltage that can be applied to
5 the switching semiconductor element.
[0004] The first embodiment of Patent Literature 1
discloses a configuration in which a voltage divider
circuit with a plurality of resistors connected in series
is provided between a first main terminal and a second main
10 terminal of a switching semiconductor element, and a
divided voltage divided by the voltage divider circuit is
detected and transmitted to a gate drive circuit.
[0005] Meanwhile, parasitic capacitance exists in an
electronic circuit board on which the voltage divider
15 circuit is installed. In addition, parasitic capacitance
also exists in the wiring connecting the voltage divider
circuit and the switching semiconductor element. The
parasitic capacitance causes a decrease in accuracy of
detection voltage output from the voltage divider circuit.
20 For this reason, the second embodiment of Patent Literature
1 discloses a configuration in which a capacitor is
connected in parallel with a resistor constituting a
voltage divider circuit. In the case of this configuration,
since the parasitic capacitance in the electronic circuit
25 board and the connection wiring can be compensated, it is
possible to prevent a decrease in accuracy of detection
voltage output from the voltage divider circuit.
Citation List
30 Patent Literature
[0006] Patent Literature 1: Japanese Patent Application
Laid-open No. 2007-89335
4
Summary
Technical Problem
[0007] However, the technique disclosed in the second
embodiment of Patent Literature 1 requires a capacitor to
5 be connected to a resistor constituting a voltage divider
circuit, which is a problem that the number of components
increases and a detector increases in size.
[0008] The present disclosure has been made in view of
the above, and a purpose of the present disclosure is to
10 obtain a gate drive circuit capable of preventing an
increase in size of a detector that detects a detection
value representing a drive state of a switching
semiconductor element while preventing a decrease in
accuracy of the detection value.
15
Solution to Problem
[0009] In order to solve the above problem and achieve
the purpose, a gate drive circuit according to the present
disclosure is a gate drive circuit that drives a
20 semiconductor element module including at least one
switching semiconductor element including a gate electrode,
a drain electrode, and a source electrode, a gate terminal
connected to the gate electrode, a drain terminal connected
to the drain electrode, and a source terminal connected to
25 the source electrode. The gate drive circuit includes a
resistor, a current detector that detects a current flowing
through the resistor, and a gate driver. The gate driver
applies an electric signal between the gate terminal and
the source terminal to drive the switching semiconductor
30 element. One end of the resistor is connected to the drain
terminal, the opposite end of the resistor is connected to
one end of the current detector, and the opposite end of
the current detector is connected to the gate driver. The
5
current detector outputs a detection value of the current
to the gate driver, and the gate driver changes a gate
drive speed of the switching semiconductor element
according to the detection value.
5
Advantageous Effects of Invention
[0010] A gate drive circuit according to the present
disclosure has an effect of preventing an increase in size
of a detector that detects a detection value representing a
10 drive state of a switching semiconductor element while
preventing a decrease in accuracy of the detection value.
Brief Description of Drawings
[0011] FIG. 1 is a diagram illustrating a configuration
15 example of a power conversion device including a gate drive
circuit according to a first embodiment.
FIG. 2 is a diagram illustrating a detailed
configuration of the gate drive circuit according to the
first embodiment together with a switching semiconductor
20 element to be driven.
FIG. 3 is a diagram illustrating a first configuration
example of a current detector according to the first
embodiment together with peripheral components.
FIG. 4 is a diagram illustrating a second
25 configuration example of the current detector according to
the first embodiment together with peripheral components.
FIG. 5 is a diagram illustrating a detailed
configuration of a gate drive circuit according to a second
embodiment together with two switching semiconductor
30 elements to be driven.
FIG. 6 is a diagram illustrating a configuration
example of a current detector according to the second
embodiment together with peripheral components.
6
Description of Embodiments
[0012] Hereinafter, a gate drive circuit and a power
conversion device according to embodiments of the present
5 disclosure will be described in detail with reference to
the accompanying drawings. The following embodiments will
describe a case where a power conversion main circuit in
the power conversion device is an inverter circuit as an
example, but this is not intended to exclude application to
10 other uses. The power conversion main circuit may be a
servo amplifier circuit, a switching power supply circuit,
or a converter circuit. In the following description,
physical connection and electrical connection will not be
distinguished from each other, and will be simply referred
15 to as “connection”. That is, the term “connection”
includes both a case where constituent elements are
directly connected to each other and a case where
constituent elements are indirectly connected to each other
through another constituent element.
20 [0013] First Embodiment.
FIG. 1 is a diagram illustrating a configuration
example of a power conversion device 1 including a gate
drive circuit 3 according to a first embodiment. FIG. 2 is
a diagram illustrating a detailed configuration of the gate
25 drive circuit 3 according to the first embodiment together
with a switching semiconductor element 6a to be driven.
[0014] In FIG. 1, the power conversion device 1
according to the first embodiment includes an inverter
circuit 2, a gate drive circuit 3, and a control unit 4. A
30 direct current (DC) power supply 10 is connected to an
input terminal of the inverter circuit 2. The DC power
supply 10 is a supply source of DC power for applying a DC
voltage to the inverter circuit 2, and corresponds to a
7
power supply device, a converter, a power capacitor, or the
like.
[0015] The inverter circuit 2 is a power conversion
circuit that converts DC power supplied from the DC power
5 supply 10 into alternating current (AC) power. The
inverter circuit 2 includes at least one switching
semiconductor element 6a. As illustrated in FIG. 1, the
switching semiconductor element 6a generally includes a
transistor element and a diode connected in anti-parallel
10 with the transistor element. In FIG. 1, a Metal-OxideSemiconductor Field-Effect Transistor (MOSFET) is
illustrated as the switching semiconductor element 6a, but
the switching semiconductor element 6a is not limited
thereto. Instead of the MOSFET, an Insulated Gate Bipolar
15 Transistor (IGBT) may be used.
[0016] A motor 12 as a load is connected to an output
terminal of the inverter circuit 2. The motor 12 is driven
by AC power supplied from the inverter circuit 2. FIG. 1
illustrates a case where the motor 12 is a three-phase
20 motor as an example. In this case, the inverter circuit 2
has a three-phase circuit configuration. The three-phase
circuit configuration includes three legs in which the
switching semiconductor element of the upper arm and the
switching semiconductor element of the lower arm are
25 connected in series. When the motor 12 is a single-phase
motor, the inverter circuit 2 includes two legs.
[0017] The control unit 4 generates a control signal 14
for controlling the at least one switching semiconductor
element 6a and outputs the control signal 14 to the gate
30 drive circuit 3. The gate drive circuit 3 generates, based
on the control signal 14, a drive signal 16 for driving the
at least one switching semiconductor element 6a and outputs
the drive signal 16 to the inverter circuit 2.
8
[0018] In FIG. 2, the switching semiconductor element 6a
that is a MOSFET includes a drain electrode 61, a gate
electrode 62, and a source electrode 63. The switching
semiconductor element 6a is housed in an electrically
5 insulating case to form a module 6. The module 6 includes
a drain main terminal 64, a source main terminal 65, a
drain terminal 66, a gate terminal 67, and a source
terminal 68. The drain main terminal 64 and the drain
terminal 66 are connected to the drain electrode 61 of the
10 switching semiconductor element 6a. The gate terminal 67
is connected to the gate electrode 62 of the switching
semiconductor element 6a. The source main terminal 65 and
the source terminal 68 are connected to the source
electrode 63 of the switching semiconductor element 6a.
15 [0019] As described above, the switching semiconductor
element 6a may be an IGBT. In this case, the switching
semiconductor element 6a includes a gate electrode while
having a collector electrode instead of a drain electrode
and an emitter electrode instead of a source electrode.
20 The name of each terminal in the module 6 also changes
according to the change in the name of the electrode of the
switching semiconductor element 6a, but the effect obtained
by the present disclosure does not change. Therefore, in
the following description, the term “drain electrode” may
25 include the meaning of “collector electrode”, and the term
“source electrode” may include the meaning of “emitter
electrode”.
[0020] Although not illustrated in FIG. 2, a load, a
power capacitor, a reactor, or another module is connected
30 to the ends of the drain main terminal 64 and the source
main terminal 65 of the module 6. When an electrical
signal is applied between the gate terminal 67 and the
source terminal 68 of the module 6, the electrical signal
9
is applied between the gate electrode 62 and the source
electrode 63 of the switching semiconductor element 6a.
The switching semiconductor element 6a is switched between
an on state and an off state according to the electric
5 signal and performs switching operation. The power
conversion device 1 performs power conversion processing by
the switching operation of the switching semiconductor
element 6a.
[0021] In FIG. 2, the gate drive circuit 3 includes a
10 gate driver 32, a current detector 34, and a resistor 36.
In the power conversion device 1 according to the first
embodiment, each constituent element of the gate drive
circuit 3 is installed on an electronic circuit board (not
illustrated) and placed on the module 6.
15 [0022] The gate driver 32 includes a positive bias power
supply 321 and a negative bias power supply 322. The
positive bias power supply 321 and the negative bias power
supply 322 are connected in series, and a connection point
of the series connection is connected to the source
20 terminal 68 of the module 6. An on-drive switch 323 is
connected to a positive electrode of the positive bias
power supply 321, and an on-drive gate resistor 324 is
connected to the end of the on-drive switch 323. An offdrive switch 325 is connected to a negative electrode of
25 the negative bias power supply 322, and an off-drive gate
resistor 326 is connected to the end of the off-drive
switch 325. A connection point between the on-drive gate
resistor 324 and the off-drive gate resistor 326 is
connected to the gate terminal 67 of the module 6. In FIG.
30 2, the connection order of the on-drive switch 323 and the
on-drive gate resistor 324 may be reversed, and the
connection order of the off-drive switch 325 and the offdrive gate resistor 326 may be reversed. In addition, in
10
FIG. 2, in order to change the gate drive speed, series
circuits each including the on-drive switch 323, the ondrive gate resistor 324, the off-drive gate resistor 326,
and the off-drive switch 325 are configured in two parallel.
5 The resistance values of the two on-drive gate resistors
324 are different from each other. In addition, the
resistance values of the two off-drive gate resistors 326
are also different from each other.
[0023] When the on-drive switch 323 is closed, a voltage
10 from the positive bias power supply 321 is applied between
the gate terminal 67 and the source terminal 68 of the
module 6 through the on-drive gate resistor 324.
Accordingly, the switching semiconductor element 6a is
turned on. When the off-drive switch 325 is closed, the
15 negative bias power supply 322 is applied between the gate
terminal 67 and the source terminal 68 of the module 6
through the off-drive gate resistor 326. Accordingly, the
switching semiconductor element 6a is turned off.
[0024] The gate driver 32 includes a processor 327. An
20 example of the processor 327 is a Complex Programmable
Logic Device (CPLD). The processor 327 can individually
change the opening and closing of the on-drive switch 323.
When one on-drive switch 323 is closed and the on-drive
gate resistor 324 having a large resistance value is used,
25 the on-drive speed of the switching semiconductor element
6a can be reduced because the current flow is small. When
the other on-drive switch 323 is closed and the on-drive
gate resistor 324 having a small resistance value is used,
the on-drive speed of the switching semiconductor element
30 6a can be increased because the current flow is large. In
addition, when both on-drive switches 323 are closed and
both on-drive gate resistors 324 are used, the on-drive
speed of the switching semiconductor element 6a can further
11
become large because the current flow becomes further
larger. In this manner, the gate driver 32 can change the
on-drive speed of the switching semiconductor element 6a.
The off-drive switch 325 and the off-drive gate resistor
5 326 have a similar configuration, and the gate driver 32
can change the off-drive speed of the switching
semiconductor element 6a.
[0025] The features of the gate driver 32 according to
the first embodiment are that the resistor 36 and the
10 current detector 34 are included, that one end of the
resistor 36 is connected to the drain terminal 66 of the
module 6, and that the opposite end of the resistor 36 is
connected to one end of the current detector 34. In
addition, the opposite end of the current detector 34 is
15 connected to a connection point of the series connection of
the positive bias power supply 321 and the negative bias
power supply 322 of the gate driver 32.
[0026] A high voltage of several hundred volts to
several thousand volts can be applied between the drain
20 electrode 61 and the source electrode 63 of the switching
semiconductor element 6a. The voltage applied between the
drain electrode 61 and the source electrode 63 of the
switching semiconductor element 6a is equivalent to the
voltage applied between the drain terminal 66 and the
25 source terminal 68 of the module 6, and is equivalent to
the voltage applied between the one end of the resistor 36
and the opposite end of the current detector 34. A voltage
drop occurring in the current detector 34 is a small value
of zero volts or less than several tens of volts.
30 Therefore, the voltage applied between the drain electrode
61 and the source electrode 63 of the switching
semiconductor element 6a is mainly applied to both ends of
the resistor 36. Then, a current proportional to the
12
voltage applied between the drain electrode 61 and the
source electrode 63 of the switching semiconductor element
6a flows through the resistor 36. The current detector 34
detects a current flowing through the resistor 36 and
5 outputs the detected current value to the processor 327 of
the gate driver 32. Therefore, the processor 327 can
obtain information regarding the voltage applied between
the drain electrode 61 and the source electrode 63 of the
switching semiconductor element 6a from the output of the
10 current detector 34. In this manner, the gate driver 32
changes the gate drive speed of the switching semiconductor
element 6a according to the detection value of the current
detector 34.
[0027] Parasitic capacitance exists in the electronic
15 circuit board and connection wiring. Parasitic capacitance
has a smaller input impedance as the capacitance is larger
and as the frequency is higher. Therefore, a highfrequency current can flow through the parasitic
capacitance. Here, the power conversion device according
20 to the first embodiment uses the current detector 34. When
a voltage detector is used as in the past, the parasitic
capacitance existing in the electronic circuit board or
connecting wiring can flow through the voltage detector.
Since a voltage detector has a large input impedance, the
25 ratio of the current flowing through the parasitic
capacitance to the current flowing through the voltage
detector becomes large. That is, when a voltage detector
is used, the accuracy of the voltage detection decreases.
[0028] In the technique disclosed in Patent Literature 1,
30 a capacitor is connected in parallel with a voltage
detection resistor to compensate for a decrease in
detection accuracy. However, since it is necessary to
connect a capacitor to the resistor, the number of
13
components increases, and the voltage detector increases in
size.
[0029] In contrast, a current detector generally has a
small input impedance. Therefore, the ratio of the current
5 flowing through the parasitic capacitance to the current
flowing through the current detector becomes small. For
this reason, even if parasitic capacitance exists in the
electronic circuit board and the wiring, a decrease in
accuracy of current detection by the current detector is
10 small.
[0030] In this manner, since the current detector 34 is
used as a detector that directly detects the voltage
applied to the switching semiconductor element 6a in the
first embodiment, the highly-accurate and downsized gate
15 drive circuit 3 can be obtained.
[0031] In FIG. 2, the one end of the resistor 36 is
connected to the drain terminal 66 of the module 6, but the
present disclosure is not limited thereto. The one end of
the resistor 36 may be connected to the drain main terminal
20 64 of the module 6. Since both the drain terminal 66 and
the drain main terminal 64 of the module 6 are connected to
the drain electrode 61 of the switching semiconductor
element 6a, the electrical characteristics are not changed,
and the effect of the first embodiment can be obtained.
25 [0032] When the gate driver 32 receives information that
the voltage applied to the switching semiconductor element
6a is large, the gate driver 32 reduces the gate drive
speed of the switching semiconductor element 6a that is
currently driven or the switching semiconductor element 6a
30 to be driven next or later. In addition, when the gate
driver 32 receives information that the voltage applied to
the switching semiconductor element 6a is small, the gate
driver 32 increases the gate drive speed of the switching
14
semiconductor element 6a that is currently driven or the
switching semiconductor element 6a to be driven next or
later. With this control, it is possible to reduce the
switching loss while preventing the occurrence of an
5 excessive surge voltage. When the switching loss can be
reduced, a cooler that cools the switching semiconductor
element 6a can be further reduced in size, and the power
conversion device can be further downsized.
[0033] In the above, it has been described that the gate
10 drive speed of the switching semiconductor element 6a is
changed according to the magnitude of the voltage applied
to the switching semiconductor element 6a. However, the
gate drive speed may be controlled based on the amount of
change per unit time of the voltage applied to the
15 switching semiconductor element 6a. For example, when
information indicating that the amount of change per unit
time of the voltage applied to the switching semiconductor
element 6a is large is received, control is performed to
reduce the gate drive speed of the switching semiconductor
20 element 6a. In addition, when information indicating that
the amount of change per unit time of the voltage applied
to the switching semiconductor element 6a is small is
received, control is performed to increase the gate drive
speed of the switching semiconductor element 6a.
25 [0034] In addition, the gate driver 32 may deliver the
information regarding the detection value of the current
detector 34 to another gate driver (not illustrated in FIG.
2) through a signal insulator (not illustrated in FIG. 2).
The other gate driver changes the drive speed of another
30 switching semiconductor element (not illustrated in FIG. 2)
according to the information regarding the detection value
of the current detector obtained through the signal
insulator. With this control, the switching loss of
15
another switching semiconductor element can be reduced
without providing another current detector. Accordingly,
it is possible to further downsize the power conversion
device.
5 [0035] Note that, it has been described that the
processor 327 is a CPLD in the above, but the processor 327
is not limited to the CPLD. An Application Specific
Integrated Circuit (ASIC) or a logic IC may be used instead
of the CPLD.
10 [0036] Next, configuration examples of the current
detector 34 are described. Two examples are described
below. FIG. 3 is a diagram illustrating a first
configuration example of the current detector 34 according
to the first embodiment together with peripheral components.
15 [0037] In FIG. 3, one end of the current detector 34 is
connected to the resistor 36, and the opposite end of the
current detector 34 is connected to a connection point of
series connection of the positive bias power supply 321 and
the negative bias power supply 322 of the gate driver 32.
20 The current detector 34 includes a capacitor 341. The
capacitor 341 connects the resistor 36 and a positive
electrode of the negative bias power supply 322 of the gate
driver 32. In addition, a discharge transistor 342 is
connected in parallel with the capacitor 341.
25 [0038] When a reference potential of the processor 327
of the gate driver 32 is the positive electrode of the
negative bias power supply 322, it is desirable that the
opposite end of the current detector 34 is also connected
to the positive electrode of the negative bias power supply
30 322 of the gate driver 32. This is because the reference
potential of the processor 327 and a reference potential of
the current detector 34 are made equal to each other.
[0039] When the discharge transistor 342 is open,
16
charging of the capacitor 341 is permitted. In this case,
the current flowing through the resistor 36 passes through
the capacitor 341 and flows to the positive electrode of
the negative bias power supply 322 of the gate driver 32.
5 The capacitor 341 is charged, and the charging voltage
rises. As the current flowing through the resistor 36 is
larger, the temporal change rate of the charging voltage of
the capacitor 341 becomes larger. As the current flowing
through the resistor 36 is smaller, the temporal change
10 rate of the charging voltage of the capacitor 341 becomes
smaller.
[0040] When the discharge transistor 342 is closed,
charging of the capacitor 341 is not permitted. In this
case, the current flowing through the resistor 36 passes
15 through the discharge transistor 342 and flows to the
positive electrode of the negative bias power supply 322 of
the gate driver 32. The capacitor 341 is discharged and
the charging voltage of the capacitor 341 is initialized to
zero volts.
20 [0041] One end of the capacitor 341 is connected to a
positive terminal of a comparator 343, and the opposite end
of the capacitor 341 is connected to a negative terminal of
the comparator 343 through a reference voltage 344. When
the charging voltage of the capacitor 341 rises and exceeds
25 the reference voltage 344, the output of the comparator 343
switches from Low to High. The output of the comparator
343 is connected to a Data terminal of a latch circuit 345.
In addition, an Out terminal of the latch circuit 345 is
connected to the processor 327 of the gate driver 32.
30 [0042] The current detector 34 further includes a signal
generator 346. The current detector 34 generates two types
of signals in order to detect the temporal change rate of
the charging voltage of the capacitor 341. A first signal
17
repeats High for 10 us and Low for 90 us in a cycle of 100
us. A second signal repeats High for 3 us and Low for 97
us in a cycle of 100 us. The first signal is input to the
discharge transistor 342, and the second signal is input to
5 a Clock terminal of the latch circuit 345.
[0043] When the first signal is input to discharge
transistor 342, the discharge transistor 342 repeats
closing for 10 us and opening for 90 us in a cycle of 100
us. In addition, when the second signal is input to the
10 Clock terminal of the latch circuit 345, the latch circuit
345 stores the output of the comparator 343 at the timing
when the second signal rises from Low to High.
[0044] The timing when the second signal rises from Low
to High is delayed by 30 us from the timing when the first
15 signal falls from High to Low. Accordingly, the latch
circuit 345 stores the output of the comparator 343 after a
30us delay from the timing when the charging of the
capacitor 341 is permitted.
[0045] When the current flowing through the resistor 36
20 is large, the charging voltage of the capacitor 341 becomes
large in a short time of less than 30 us after the charging
of the capacitor 341 is permitted. Therefore, the output
of the comparator 343 is switched from Low to High.
Thereafter, the latch circuit 345 stores the output of the
25 comparator 343. The latch circuit 345 outputs a High
signal from the Out terminal to the processor 327 of the
gate driver 32. The processor 327 that has received the
High signal reduces the gate drive speed of the switching
semiconductor element 6a.
30 [0046] When the current flowing through the resistor 36
is small, the charging voltage of the capacitor 341 does
not become large within a short time of less than 30 us
after the charging of the capacitor 341 is permitted.
18
Therefore, the output of the comparator 343 remains Low.
The latch circuit 345 stores the output of Low output from
the comparator 343. The latch circuit 345 outputs a Low
signal from the Out terminal to the processor 327 of the
5 gate driver 32. The processor 327 that has received the
Low signal increases the gate drive speed of the switching
semiconductor element 6a.
[0047] As described above, the current detector 34 in
FIG. 2 can detect the magnitude of the current flowing
10 through the resistor 36. By adjusting the delay time of
the second signal relative to the first signal, a detection
threshold of the current detector 34 can be adjusted. When
the delay time is shortened, the threshold is raised. When
the delay time is lengthened, the threshold is lowered.
15 [0048] In the current detector 34, when the capacitance
of the capacitor 341 is increased, the capacitor voltage
fluctuation when noise charges have entered becomes small.
Therefore, when the capacitance of the capacitor 341 is
large, the noise resistance of the current detector 34
20 increases, and the current of the resistor 36 can be
accurately detected.
[0049] The signal generator 346 can be implemented using
a CPLD, an ASIC, or a logic IC. At that time, a signal may
be generated using the CPLD, the ASIC, or the logic IC
25 included in the gate driver 32. In this manner, it is
possible to reduce the number of components and to further
downsize the gate drive circuit 3.
[0050] Another example of the current detector 34 is
illustrated in FIG. 4. FIG. 4 is a diagram illustrating a
30 second configuration example of the current detector 34
according to the first embodiment together with peripheral
components. In FIG. 4, the same or equivalent elements as
those illustrated in FIG. 3 are denoted by the same
19
reference signs, and redundant description is appropriately
omitted.
[0051] A first feature of the current detector 34
illustrated in FIG. 4 is to include a latch circuit 347
5 that is a second latch circuit. A Data terminal of the
latch circuit 347 is connected to an output terminal of the
comparator 343. With this configuration, the output of the
comparator 343 is input to the Data terminal of the latch
circuit 345 operating as a first latch circuit, and is also
10 input to the Data terminal of the latch circuit 347
operating as the second latch circuit. In addition, an Out
terminal of the latch circuit 347 is connected to the
processor 327 of the gate driver 32.
[0052] A second feature of the current detector 34
15 illustrated in FIG. 4 is that a signal generator 348 is
provided instead of the signal generator 346 and that the
signal generator 348 generates three types of signals. A
first signal and a second signal are similar to those
output by the current detector 34 illustrated in FIG. 3. A
20 third signal repeats High for 3 us and Low for 97 us in a
cycle of 100 us. The third signal is input to a Clock
terminal of the latch circuit 347.
[0053] The timing when the third signal rises from Low
to High is delayed by 80 us from the timing when the first
25 signal falls from High to Low. Accordingly, the latch
circuit 347 stores the output of the comparator 343 after
an 80 us delay from the timing when the charging of the
capacitor 341 is permitted.
[0054] When the voltage applied to the switching
30 semiconductor element 6a is large, the current flowing
through the resistor 36 is large. When the charging
voltage of the capacitor 341 becomes large within a short
time of less than 30 us after the charging of the capacitor
20
341 is permitted, the output of the comparator 343 switches
from Low to High. Thereafter, the latch circuits 345 and
347 store the output of the comparator 343. The latch
circuit 345 outputs a High signal from the Out terminal to
5 the processor 327, and the latch circuit 347 outputs a High
signal from the Out terminal to the processor 327. The
processor 327 that has received the High signal reduces the
gate drive speed of the switching semiconductor element 6a.
[0055] When the voltage applied to the switching
10 semiconductor element 6a is small, the current flowing
through the resistor 36 is small, and the charging voltage
of the capacitor 341 does not become large within a short
time of less than 30 us after the charging of the capacitor
341 is permitted. Therefore, the output of the comparator
15 343 remains Low. The latch circuit 345 stores the output
of the comparator 343. However, the charging voltage of
the capacitor 341 continues to rise. The output of the
comparator 343 is switched from Low to High before a long
time of 80 us elapses. Thereafter, only the latch circuit
20 347 stores the output of High which is output from the
comparator 343. The latch circuit 345 outputs a Low signal
from the Out terminal to the processor 327, and the latch
circuit 347 outputs a High signal from the Out terminal to
the processor 327. At this time, the processor 327
25 increases the gate drive speed of the switching
semiconductor element 6a.
[0056] When an open circuit failure occurs in the
resistor 36 or when an open circuit failure occurs in the
wiring connecting the resistor 36 and the current detector
30 34, the current flowing through the resistor 36 becomes
zero. At this time, the charging voltage of the capacitor
341 does not become large, and the output of the comparator
343 remains Low. Thereafter, the latch circuits 345 and
21
347 store the output of the comparator 343. The latch
circuit 345 outputs a Low signal from the Out terminal to
the processor 327, and the latch circuit 347 outputs a Low
signal from the Out terminal to the processor 327. At this
5 time, the processor 327 reduces the gate drive speed of the
switching semiconductor element 6a.
[0057] Here, a case where an open circuit failure occurs
in the resistor 36 or a case where an open circuit failure
occurs in the wiring connecting the resistor 36 and the
10 current detector 34 is considered in the current detector
34 illustrated in FIG. 2. In these cases, even when the
voltage applied to the switching semiconductor element 6a
is large, the current flowing through the resistor 36 is
zero. Therefore, the latch circuit 345 outputs a Low
15 signal from the Out terminal to the processor 327.
Accordingly, the processor 327 increases the gate drive
speed of the switching semiconductor element 6a. Since the
current zero state continues unless these open failures are
repaired, the control for increasing the gate drive speed
20 of the switching semiconductor element 6a is continued. As
a result, voltage stress can be applied to the switching
semiconductor element 6a.
[0058] Next, a case where an open circuit failure occurs
in the resistor 36 or a case where an open circuit failure
25 occurs in the wiring connecting the resistor 36 and the
current detector 34 is considered in the current detector
34 illustrated in FIG. 4. As described above, the current
detector 34 can detect that the current flowing through the
resistor 36 is zero by the latch circuit 347 that is the
30 second latch circuit. At this time, the gate driver 32
reduces the drive speed of the switching semiconductor
element 6a. When these open failures are not repaired, the
current zero state continues, but the gate drive speed of
22
the switching semiconductor element 6a does not increase.
Therefore, the possibility that voltage stress is applied
to the switching semiconductor element 6a can be eliminated.
[0059] In the above description, it has been described
5 that the current detector 34 detects that the current
flowing through the resistor 36 is zero, but the detection
threshold may not be strictly zero. The current detector
34 illustrated in FIG. 4 determines that the current is
zero when the charging voltage of the capacitor 341 does
10 not reach a set voltage within a prescribed time. This
detection method may be used to detect zero current. In a
case of the current detector 34 illustrated in FIG. 3, the
configuration of the signal generator 346 is only required
to be temporarily changed when the power conversion device
15 is activated. That is, the delay time of the second signal
relative to the first signal is adjusted to a long time.
The detection threshold of the current detector 34 is
lowered, and the current detector 34 can detect that the
current flowing through the resistor 36 is zero. When the
20 power conversion device is activated, an open circuit
failure in the resistor 36 or an open circuit failure in
the wiring connecting the resistor 36 and the current
detector 34 can be detected. The gate driver 32 reduces
the drive speed of the switching semiconductor element 6a.
25 Therefore, the possibility that voltage stress is applied
to the switching semiconductor element 6a can be eliminated.
When these open failures are not to be detected, the
configuration of the signal generator 346 is restored.
[0060] As described above, a gate drive circuit
30 according to the first embodiment includes a resistor, a
current detector that detects a current flowing through the
resistor, and a gate driver. The gate driver applies an
electric signal between the gate terminal and the source
23
terminal to drive the gate of the switching semiconductor
element. One end of the resistor is connected to the drain
terminal, the opposite end of the resistor is connected to
one end of the current detector, and the opposite end of
5 the current detector is connected to the gate driver. The
current detector outputs a detection value of the current
to the gate driver. The gate driver changes the gate drive
speed of the switching semiconductor element according to
the detection value of the current. Specifically, when the
10 current detector detects that the current flowing through
the resistor is large, the drive speed of the switching
semiconductor element is reduced. Similarly, when the
current detector detects that the current flowing through
the resistor is small, the drive speed of the switching
15 semiconductor element is increased. Parasitic capacitance
exists in an electronic circuit board on which the current
detector is installed, and parasitic capacitance also
exists in the wiring connecting the electronic circuit
board and the gate driver. However, the current detector
20 having a small input impedance can reduce the influence of
the parasitic capacitance. In addition, the gate drive
circuit according to the first embodiment does not require
a capacitor to be connected to a resistor for voltage
detection as in the prior art. Accordingly, by using the
25 gate drive circuit according to the first embodiment, it is
possible to obtain an effect of preventing an increase in
size of a detector that detects a detection value
representing a drive state of the switching semiconductor
element while preventing a decrease in accuracy of the
30 detection value.
[0061] In addition, by using the gate drive circuit
according to the first embodiment, it is possible to reduce
the switching loss while preventing the occurrence of an
24
excessive surge voltage. Accordingly, since a cooler that
cools the switching semiconductor element can be further
reduced in size, it is possible to obtain an effect of
further downsizing a power conversion device.
5 [0062] The current detector of the gate drive circuit
may include a capacitor that receives a current flowing
through the resistor. When the temporal change rate of the
charging voltage of the capacitor is large, the current
detector detects that the current flowing through the
10 resistor is large. In addition, when the temporal change
rate of the charging voltage of the capacitor is small, the
current detector detects that the current flowing through
the resistor is small. Since the current detector is
configured using a circuit element, it is possible to
15 quickly control the speed of the switching semiconductor
element.
[0063] Note that, in the above configuration, it is
assumed that an open circuit failure occurs in a resistor
through which a current flows or that an open failure
20 occurs in the wiring connecting the resistor and the
current detector. The current detector can detect that the
current flowing through the resistor is zero when the
charging voltage of the capacitor does not reach a set
voltage within a prescribed time. When the current
25 detector detects that the current flowing through the
resistor is zero, the gate drive circuit performs control
to reduce the drive speed of the switching semiconductor
element. Such control can eliminate the possibility of
applying voltage stress to the switching semiconductor
30 element.
[0064] Second Embodiment.
FIG. 5 is a diagram illustrating a detailed
configuration of a gate drive circuit 3A according to a
25
second embodiment together with two switching semiconductor
elements 6a and 6b to be driven. In FIG. 5, the same or
equivalent elements as those illustrated in FIG. 2 are
denoted by the same reference signs, and redundant
5 description is appropriately omitted.
[0065] The switching semiconductor element 6a that is a
first switching semiconductor element is a MOSFET. The
switching semiconductor element 6a includes the drain
electrode 61 that is a first drain electrode, the gate
10 electrode 62 that is a first gate electrode, and the source
electrode 63 that is a first source electrode.
[0066] The switching semiconductor element 6b that is a
second switching semiconductor element is also a MOSFET.
The switching semiconductor element 6b includes a drain
15 electrode 71 that is a second drain electrode, a gate
electrode 72 that is a second gate electrode, and a source
electrode 73 that is a second source electrode. The
switching semiconductor elements 6a and 6b are connected in
series and housed in an electrically insulating case to
20 form a module 7.
[0067] The module 7 includes the drain main terminal 64,
the drain terminal 66, the gate terminal 67 that is a first
gate terminal, the source terminal 68 that is a first
source terminal, a source main terminal 75, an output main
25 terminal 76, a gate terminal 77 that is a second gate
terminal, and a source terminal 78 that is a second source
terminal.
[0068] The drain main terminal 64 and the drain terminal
66 are connected to the drain electrode 61 of the switching
30 semiconductor element 6a. The gate terminal 67 is
connected to the gate electrode 62 of the switching
semiconductor element 6a.
[0069] The source electrode 63 of the switching
26
semiconductor element 6a and the drain electrode 71 of the
switching semiconductor element 6b are connected inside the
module 7. The source electrode 63 and the drain electrode
71 are connected to the source terminal 68 and the output
5 main terminal 76.
[0070] The gate terminal 77 is connected to the gate
electrode 72 of the switching semiconductor element 6b.
The source main terminal 75 and the source terminal 78 are
connected to the source electrode 73 of the switching
10 semiconductor element 6b.
[0071] A power capacitor 8 for storing DC power is
provided outside the module 7. A positive electrode of the
power capacitor 8 is connected to the drain main terminal
64, and a negative electrode of the power capacitor 8 is
15 connected to the source main terminal 75. Although not
illustrated in FIG. 5, a load, a reactor, another power
capacitor, or another module is connected to the end of the
output main terminal 76 of the module 7.
[0072] In the module 7, when the switching semiconductor
20 element 6a is turned on, the output main terminal 76
outputs the potential of the positive electrode of the
power capacitor 8. When the switching semiconductor
element 6b is turned on, the output main terminal 76
outputs the potential of the negative electrode of the
25 power capacitor 8. The power conversion device 1 according
to the second embodiment performs power conversion
processing by switching operation of the switching
semiconductor elements 6a and 6b.
[0073] As illustrated in FIG. 5, the gate drive circuit
30 3A and a module external circuit 18 are provided outside
the module 7.
[0074] The gate drive circuit 3A includes the gate
driver 32 that is a first gate driver, a gate driver 33
27
that is a second gate driver, a current detector 34A, and a
signal insulator 357. A detailed circuit configuration of
the current detector 34A will be described later.
[0075] Similarly to the first embodiment, the gate
5 driver 32 includes the positive bias power supply 321, the
negative bias power supply 322, the on-drive switch 323,
the on-drive gate resistor 324, the off-drive switch 325,
the off-drive gate resistor 326, and the processor 327.
Similarly, the gate driver 33 includes a positive bias
10 power supply 331, a negative bias power supply 332, an ondrive switch 333, an on-drive gate resistor 334, an offdrive switch 335, an off-drive gate resistor 336, and a
processor 337.
[0076] In the power conversion device 1 according to the
15 second embodiment, each constituent element of the gate
drive circuit 3A is placed on an electronic circuit board
(not illustrated). In the gate drive circuit 3A, since the
circuit and the components are installed on one board, the
device can be downsized. In addition, since the circuit
20 and the components are installed on one board, signal
degradation is small, and the signal insulator 357 can be
operated at high speed.
[0077] The module external circuit 18 includes a
resistor 358 and an overvoltage prevention diode 355. In
25 the power conversion device 1 according to the second
embodiment, each constituent element of the module external
circuit 18 is installed on an electronic circuit board (not
illustrated) and placed on the module 7.
[0078] The module external circuit 18 includes
30 conductors connected to the gate terminal 67 and the source
terminal 68 of the module 7. These conductors are
connected to the gate driver 32 through a first inter-board
wiring group 351. In addition, the module external circuit
28
18 includes conductors connected to the drain terminal 66,
the gate terminal 77, and the source terminal 78 of the
module 7. These conductors are connected to the gate
driver 33 through a second inter-board wiring group 352.
5 With this configuration, gate driver 32 drives the
switching semiconductor element 6a that is the first
switching semiconductor element, and the gate driver 33
drives the switching semiconductor element 6b that is the
second switching semiconductor element.
10 [0079] In the module external circuit 18, one end of the
resistor 358 is connected to the drain terminal 66 of the
module 7, and the opposite end of the resistor 358 is
connected to one end of the current detector 34A through
the second inter-board wiring group 352. One of the
15 opposite ends of the current detector 34A is connected to a
negative electrode of the negative bias power supply 332 of
the gate driver 33, and the other of the opposite ends of
the current detector 34A is connected to a positive
electrode of the negative bias power supply of the gate
20 driver 33.
[0080] The voltage of the power capacitor 8 can be a
high voltage of several hundred volts to several thousand
volts. The voltage of the power capacitor 8 is always
applied between the drain main terminal 64 and the source
25 main terminal 75 of the module 7. This voltage is
equivalent to the voltage applied between the drain
electrode 61 of the switching semiconductor element 6a and
the source electrode 73 of the switching semiconductor
element 6b, and is equivalent to the voltage applied
30 between the drain terminal 66 of the module 7 and the
positive electrode of the negative bias power supply 332 in
the gate driver 33.
[0081] A voltage drop occurring in the current detector
29
34A is a small value of zero volts or less than several
tens of volts. In addition, the voltage between the
positive electrode and the negative electrode of the
negative bias power supply 332 in the gate driver 33 is a
5 small value of less than several tens of volts. Therefore,
the voltage of the power capacitor 8 is mainly applied to
both ends of the resistor 358 of the module external
circuit 18. The current flowing through the resistor 358
is proportional to the voltage of the power capacitor 8.
10 The current detector 34A detects the current flowing
through the resistor 358 and outputs the detected current
value to the processor 337 of the gate driver 33.
[0082] The processor 337 of the gate driver 33 can
always obtain information regarding the voltage of the
15 power capacitor 8 from the output of the current detector
34A. The gate driver 33 changes the gate drive speed of
the switching semiconductor element 6b according to the
latest information regarding the voltage of the power
capacitor 8. Accordingly, the switching loss of the
20 switching semiconductor element 6b can be reduced.
Accordingly, since a cooler that cools the switching
semiconductor element 6b can be further reduced in size,
the power conversion device can be further downsized.
[0083] Furthermore, the gate driver 33 delivers
25 information regarding the output of the current detector
34A to the gate driver 32 through the signal insulator 357.
That is, the gate driver 32 can always obtain the latest
information regarding the voltage of the power capacitor 8
through the signal insulator 357. The gate driver 32
30 changes the gate drive speed of the switching semiconductor
element 6a according to the latest information regarding
the voltage of the power capacitor 8. Accordingly, the
switching loss of the switching semiconductor element 6a
30
can be reduced. Accordingly, since a cooler that cools the
switching semiconductor element 6a can be further reduced
in size, the power conversion device can be further
downsized.
5 [0084] In this manner, since the current detector 34A is
used as a detector that directly detects the voltage
applied to the switching semiconductor element 6b in the
second embodiment, the highly-accurate and downsized gate
drive circuit 3A can be obtained.
10 [0085] As described above, the voltage of the power
capacitor 8 is mainly applied to both ends of the resistor
358 in the module external circuit 18. Therefore, the
voltage difference among the wirings included in the second
inter-board wiring group 352 is a low voltage of less than
15 several tens of volts. Therefore, the clearance distance
in the wiring and the creepage distance in the wiring can
be reduced. In addition, wiring with thin insulation
coating can be used. In this manner, the wiring of the
second inter-board wiring group 352 can be further
20 downsized.
[0086] However, when an open circuit failure occurs in
the current detector 34A, a current does not flow through
the resistor 358 of the module external circuit 18. The
potential at both ends of the resistor 358 becomes
25 equivalent to the potential of the drain terminal 66 of the
module 7 and can be a high potential of several hundred
volts to several thousand volts. At this time, the voltage
difference among the wirings included in the second interboard wiring group 352 becomes excessive, and there is a
30 risk of failure.
[0087] Therefore, the power conversion device 1
according to the second embodiment is configured to include
the overvoltage prevention diode 355 in the module external
31
circuit 18. In FIG. 5, an anode of the overvoltage
prevention diode 355 is connected to a connection point
between the resistor 358 and the current detector 34A. A
cathode of the overvoltage prevention diode 355 is
5 connected to the source terminal 78 of the module 7.
[0088] With this configuration, even if an open circuit
failure occurs in the current detector 34A, a current flows
through the path of the drain terminal 66 of the module 7,
the resistor 358, the overvoltage prevention diode 355, and
10 the source terminal 78 of the module 7. As described above,
the voltage of the power capacitor 8 is mainly applied to
both ends of the resistor 358 of the module external
circuit 18. Accordingly, since the voltage difference
among the wirings included in the second inter-board wiring
15 group 352 is a low voltage of less than several tens of
volts, the voltage difference among the wirings does not
become excessive.
[0089] An overvoltage prevention resistor may be used
instead of the overvoltage prevention diode 355. The
20 resistance value of the overvoltage prevention resistor is
made smaller than the resistance value of the resistor 358
of the module external circuit 18. In this case, the
voltage of the power capacitor 8 is mainly applied to both
ends of the resistor 358 of the module external circuit 18.
25 Therefore, the voltage difference among the wirings
included in the second inter-board wiring group 352 is a
low voltage of less than several tens of volts. Therefore,
it is possible to prevent the voltage difference among the
wirings included in the second inter-board wiring group 352
30 from becoming excessive.
[0090] However, in a case of using the overvoltage
prevention resistor, a current flows through the path of
the positive electrode of the negative bias power supply
32
332 of the gate driver 33, the source terminal 78 of the
module 7, the overvoltage prevention resistor, the current
detector 34A, and the negative electrode of the negative
bias power supply 332, when the power conversion device 1
5 is operating normally. Due to the influence of the current,
the detection accuracy of the current detector 34A that
detects the current flowing through the resistor 358 can
deteriorate.
[0091] In contrast, in a case of using the overvoltage
10 prevention diode 355, it is possible to prevent a current
from flowing from the source terminal 78 of the module 7 to
the current detector 34A. Accordingly, it is possible to
prevent the detection accuracy of the current detector 34A
from deteriorating. Therefore, it is desirable to use the
15 overvoltage prevention diode 355 rather than the
overvoltage prevention resistor.
[0092] FIG. 6 is a diagram illustrating a configuration
example of the current detector 34A according to the second
embodiment together with peripheral components. In FIG. 6,
20 the same or equivalent elements as those illustrated in FIG.
3 are denoted by the same reference signs, and redundant
description is appropriately omitted.
[0093] In FIG. 6, one end of the current detector 34A is
connected to the resistor 358. In addition, one of the
25 opposite ends of the current detector 34A is connected to
the negative electrode of the negative bias power supply
332 of the gate driver 33, and the other of the opposite
ends of the current detector 34A is connected to the
positive electrode of the negative bias power supply 332 of
30 the gate driver 33.
[0094] Since a reference potential of the processor 337
in the gate driver 33 is the negative electrode of the
negative bias power supply 332, the opposite end of the
33
current detector 34A is also connected to the negative
electrode of the negative bias power supply 332 in the gate
driver 33. With this connection, the reference potential
of the processor 337 and a reference potential of the
5 current detector 34A are made equal to each other.
[0095] The current detector 34A includes the capacitor
341, an upper diode 371, a lower diode 372, and an input
resistor 373. The capacitor 341 and the resistor 36 of the
module external circuit 18 are connected through the input
10 resistor 373. The resistance value of the input resistor
373 is made smaller than the resistance value of the
resistor 36 of the module external circuit 18.
[0096] A cathode of the upper diode 371 is connected to
the positive electrode of the negative bias power supply
15 332, and an anode of the upper diode 371 is connected to a
connection point between the input resistor 373 and the
resistor 36. An anode of the lower diode 372 is connected
to the negative electrode of the negative bias power supply
332, and a cathode of the lower diode 372 is connected to
20 the connection point between the input resistor 373 and the
resistor 36. The other configuration is similar to that of
the current detector 34 in FIG. 3.
[0097] A characteristic of the current detector 34A
according to the second embodiment is that a distance
25 between a first circuit board (not illustrated) on which
the gate drivers 32 and 33 are installed and a second
circuit board on which the module external circuit 18
illustrated in FIG. 5 is mounted is large. As described
above, the first circuit board and the second circuit board
30 are connected by the first inter-board wiring group 351 and
the second inter-board wiring group 352. If the wiring of
the first and second inter-board wiring groups 351 and 352
is long, noise charges can enter due to electrostatic
34
coupling with other terminals in the power conversion
device 1. In this case, the potential of the wiring
connecting the resistor 358 and the current detector 34A
can rise or drop.
5 [0098] In the configuration of the current detector 34A
in FIG. 6, when the potential of the wiring rises, the
noise charges are discharged to the positive electrode of
the negative bias power supply 332 through the upper diode
371. When the potential of the wiring drops, the noise
10 charges are discharged to the negative electrode of the
negative bias power supply 332 through the lower diode 372.
Therefore, by using the current detector 34A in FIG. 6, it
is possible to accurately detect the current flowing
through the resistor 358 while reducing the adverse effect
15 of noise charges.
[0099] In FIG. 6, the configuration including the upper
diode 371, the lower diode 372, and the input resistor 373
is applied to the current detector 34 illustrated in FIG. 3,
but the present disclosure is not limited thereto. The
20 configuration including the upper diode 371, the lower
diode 372, and the input resistor 373 may be applied to the
current detector 34 illustrated in FIG. 4. Even with this
configuration, the above effect can be obtained.
[0100] As described above, a gate drive circuit
25 according to the second embodiment includes a resistor, a
current detector that detects a current flowing through the
resistor, and first and second gate drivers. The first
gate driver applies an electric signal between a first gate
terminal and a first source terminal to drive a gate of a
30 first switching semiconductor element. The second gate
driver applies an electric signal between a second gate
terminal and a second source terminal to drive a gate of a
second switching semiconductor element. One end of the
35
resistor is connected to a first drain terminal, the
opposite end of the resistor is connected to one end of the
current detector, and the opposite end of the current
detector is connected to the second gate driver. The
5 current detector outputs a detection value of the current
to the second gate driver, and the second gate driver
changes the gate drive speed of the second switching
semiconductor element according to the detection value.
Specifically, when the current detector detects that the
10 current flowing through the resistor is large, the first
and second gate drivers reduce the drive speed of the first
and second switching semiconductor elements. Similarly,
when the current detector detects that the current flowing
through the resistor is small, the drive speed of the first
15 and second switching semiconductor elements is increased.
With the gate drive circuit according to the second
embodiment configured as described above, it is not
necessary to connect a capacitor to a resistor for voltage
detection as in the prior art. Therefore, by using the
20 gate drive circuit according to the second embodiment, it
is possible to obtain an effect of preventing an increase
in size of a detector that detects a detection value
representing a drive state of a switching semiconductor
element while preventing a decrease in accuracy of the
25 detection value.
[0101] The gate drive circuit may include a signal
insulator that transmits information regarding the detected
value of the current to the first gate driver. The second
gate driver changes the drive speed of the second switching
30 semiconductor element according to the information
regarding the detection value detected by the current
detector. In contrast, the first gate driver changes the
drive speed of the first switching semiconductor element
36
different from the second switching semiconductor element
according to the information regarding the detection value
obtained through the signal insulator. With this
configuration, it is not necessary to provide the current
5 detector in the first gate driver. Accordingly, it is
possible to prevent the gate drive circuit from increasing
in size in proportion to the number of switching
semiconductor elements.
[0102] The configurations described in the above
10 embodiments are merely examples and can be combined with
other known techniques, the above embodiments can be
combined with each other, and a part of the configurations
can be omitted or changed without departing from the gist
of the present disclosure. In the second embodiment, each
15 constituent element of the gate drive circuit 3A is
installed on an electronic circuit board, but the
electronic circuit board may be placed on the module 7.
Furthermore, the gate drive circuit 3A and the module
external circuit 18 may be installed on the same electronic
20 circuit board and placed on the module 7. With this
configuration, it is possible to reduce the number of
components.
Reference Signs List
25 [0103] 1 power conversion device; 2 inverter circuit;
3, 3A gate drive circuit; 4 control unit; 6, 7 module; 6a,
6b switching semiconductor element; 8 power capacitor; 10
DC power supply; 12 motor; 14 control signal; 16 drive
signal; 18 module external circuit; 32, 33 gate driver;
30 34, 34A current detector; 36, 358 resistor; 61, 71 drain
electrode; 62, 72 gate electrode; 63, 73 source
electrode; 64 drain main terminal; 65, 75 source main
terminal; 66 drain terminal; 67, 77 gate terminal; 68, 78
37
source terminal; 76 output main terminal; 321, 331
positive bias power supply; 322, 332 negative bias power
supply; 323, 333 on-drive switch; 324, 334 on-drive gate
resistor; 325, 335 off-drive switch; 326, 336 off-drive
5 gate resistor; 327, 337 processor; 341 capacitor; 342
discharge transistor; 343 comparator; 344 reference
voltage; 345, 347 latch circuit; 346, 348 signal
generator; 351 first inter-board wiring group; 352 second
inter-board wiring group; 355 overvoltage prevention
10 diode; 357 signal insulator; 371 upper diode; 372 lower
diode; 373 input unit resistor.

WE CLAIM:
[Claim 1] A gate drive circuit to drive a semiconductor
element module, the semiconductor element module including:
at least one switching semiconductor element including a
5 gate electrode, a drain electrode, and a source electrode;
a gate terminal connected to the gate electrode; a drain
terminal connected to the drain electrode; and a source
terminal connected to the source electrode, the gate drive
circuit comprising:
10 a resistor;
a current detector to detect a current flowing through
the resistor; and
a gate driver to apply an electric signal between the
gate terminal and the source terminal to drive the
15 switching semiconductor element, wherein
one end of the resistor is connected to the drain
terminal, an opposite end of the resistor is connected to
one end of the current detector, an opposite end of the
current detector is connected to the gate driver,
20 the current detector outputs a detection value of the
current to the gate driver, and
the gate driver changes a gate drive speed of the
switching semiconductor element according to the detection
value.
25
[Claim 2] The gate drive circuit according to claim 1,
wherein
the gate driver reduces a drive speed of the switching
semiconductor element when the current detector detects
30 that the current flowing through the resistor is large, and
increases the drive speed of the switching semiconductor
element when the current detector detects that the current
flowing through the resistor is small.
39
[Claim 3] The gate drive circuit according to claim 2,
wherein the gate drive circuit reduces the drive speed of
the switching semiconductor element when the current
5 detector detects that the current flowing through the
resistor is zero.
[Claim 4] The gate drive circuit according to any one of
claims 1 to 3, comprising a signal insulator to transmit
10 information regarding the detection value to another gate
driver, wherein
the other gate driver changes a drive speed of another
switching semiconductor element according to the
information regarding the detection value obtained through
15 the signal insulator.
[Claim 5] A gate drive circuit to drive a semiconductor
element module which includes: a first switching
semiconductor element including a first gate electrode, a
20 first drain electrode, and a first source electrode; and a
second switching semiconductor element including a second
gate electrode, a second drain electrode, and a second
source electrode, and in which the first source electrode
is connected to the second drain electrode;
25 wherein the semiconductor element module includes:
a first gate terminal connected to the first gate
electrode;
a first source terminal connected to the first source
electrode;
30 a first drain terminal connected to the first drain
electrode;
a second gate terminal connected to the second gate
electrode; and
40
a second source terminal electrically connected to the
second source electrode,
the gate drive circuit comprises:
a resistor;
5 a current detector to detect a current flowing through
the resistor;
a first gate driver to apply an electric signal
between the first gate terminal and the first source
terminal to drive the first switching semiconductor
10 element; and
a second gate driver to apply an electric signal
between the second gate terminal and the second source
terminal to drive the second switching semiconductor
element,
15 one end of the resistor is connected to the first
drain terminal, an opposite end of the resistor is
connected to one end of the current detector, an opposite
end of the current detector is connected to the second gate
driver,
20 the current detector outputs a detection value of the
current to the second gate driver, and
the second gate driver changes a gate drive speed of
the second switching semiconductor element according to the
detection value.
25
[Claim 6] The gate drive circuit according to claim 5,
comprising a signal insulator to transmit information
regarding the detection value to the first gate driver,
wherein
30 the first gate driver changes a drive speed of the
first switching semiconductor element according to the
information regarding the detection value obtained through
the signal insulator.
41
[Claim 7] The gate drive circuit according to claim 5 or 6,
wherein
the first and second gate drivers reduce a drive speed
5 of the first and second switching semiconductor elements
when the current detector detects that the current flowing
through the resistor is large, and increase the drive speed
of the first and second switching semiconductor elements
when the current detector detects that the current flowing
10 through the resistor is small.
[Claim 8] The gate drive circuit according to claim 7,
wherein the first and second gate drivers reduce the drive
speed of the first and second switching semiconductor
15 elements when the current detector detects that the current
flowing through the resistor is zero.
[Claim 9] The gate drive circuit according to any one of
claims 1 to 8, wherein the current detector includes a
20 capacitor to receive the current flowing through the
resistor, the current detector detects that the current
flowing through the resistor is large when a temporal
change rate of a charging voltage of the capacitor is large,
and the current detector detects that the current flowing
25 through the resistor is small when the temporal change rate
of the charging voltage of the capacitor is small.
[Claim 10] The gate drive circuit according to claim 9,
wherein the current detector detects that the current
30 flowing through the resistor is zero when the charging
voltage of the capacitor does not reach a set voltage
within a prescribed time.
42
[Claim 11] A power conversion device comprising:
the gate drive circuit according to any one of claims
1 to 10; and
a power conversion main circuit including at least one
5 switching semiconductor element driven by the gate drive
circuit.