Description:TECHNICAL FIELD OF THE INVENTION
The present disclosure is related to method and system for generating an equivalent circuit model (ECM) of a battery using regression, RMSE and gradient descent.
BACKGROUND OF THE INVENTION
Embodiments of the present disclosure generally relate to a method and a system for generating an equivalent circuit model (ECM) of a battery.
In the modern digital age electric vehicles are ubiquitous. Electric vehicles are up and coming and they are a boon to the environment. Batteries are used to power the electric vehicles, which obviates the need for using fossil fuels. In particular, Lithium-ion rechargeable battery are used to power electric vehicles.
There is a pronounced need for the users of electric vehicles to know about charge remaining in the battery. In an electric vehicle if charge in the battery becomes nil the user may be potentially stranded in remote roads without any recourse. Thus, there is a pressing need for an accurate Equivalent circuit model (ECM) particularly 2RC for capturing the dynamic behaviour of battery on charging and discharging.
There are multiple application of an ECM. One prominent area where battery ECMs are extensively utilized is in Battery Management Systems (BMS). BMSs are responsible for monitoring and controlling the state of charge (SoC), state of health (SoH), and state of function (SoF) of batteries. By employing ECMs, BMSs can optimize charging and discharging processes, preventing overcharging or over-discharging, and thus extending battery life. ECMs provide crucial insights into battery behaviour, enabling BMSs to accurately estimate SoC and SoH, which are vital for ensuring the reliable and efficient operation of battery systems.
Moreover, ECMs play a crucial role in the development and optimization of electric vehicles (EVs). They assist engineers in understanding the battery's performance under various driving conditions, predicting range and efficiency, and optimizing energy management strategies. By utilizing ECMs, EV manufacturers can design and fine-tune powertrains to enhance performance and maximize the driving range. ECMs enable engineers to make informed decisions regarding the number of cells, their arrangement, and the necessary thermal management systems for efficient and safe operation of the battery pack.
Battery ECMs are also instrumental in the design and operation of energy storage systems (ESS). ESSs are essential for applications such as renewable energy integration and grid stabilization. By accurately modelling battery behavior, ECMs assist in optimizing the performance and reliability of ESSs. They enable system operators to implement effective energy management strategies, improve efficiency, and ensure stable operation of the energy storage system.
Furthermore, battery ECMs play a vital role in battery testing and validation. In laboratory settings, researchers and manufacturers employ ECMs to compare the behaviours of real batteries with the predicted behaviour from the models. This allows for the assessment of the accuracy of ECMs and facilitates their further refinement. Accurate battery models are crucial for reliable testing and validation of batteries before their deployment in various applications.
Conventionally, specific ECM model is required for separate C rate. There is no ECM model optimized for variable charge rates. Thus,
there is a need for an ECM model optimized for various C rates.
Further, existing solutions are complicated and do not accurately predict the dynamic behaviour at very high charging-rates, in extremely high and low state of charge.
Thus, the present invention endeavours to fill these shortcomings.
SUMMARY
The following embodiments present a simplified summary in order to provide a basic understanding of some aspects of the disclosed invention. This summary is not an extensive overview, and it is not intended to identify key/critical elements or to delineate the scope thereof. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
Some example embodiments disclosed herein provide a method for generating an Equivalent Circuit Model of a cell comprising obtaining a first plurality of voltage patterns corresponding to a plurality of C rates of the cell using a first test. The method may also include obtaining a second voltage pattern of the cell using a second test. The method may include comparing difference between the first plurality of voltage patterns and the second voltage pattern. The method may further include identifying zero current rest patterns for each of the first plurality of voltage patterns. The method may also include segregating zero current rest patterns for each of the first plurality of voltage patterns. The method may include extracting longer time constant transient response from the segregated zero current rest patterns. The method may further include modeling longer time constant transient response from the segregated zero current rest patterns. The method may include subtracting the longer time constant transient response from the zero current rest patterns for obtaining a resultant pattern. The method may also include computing second RC branches for a plurality of SoC with the resultant rest pattern. The method may include computing a RC branch value by averaging RC branches of each of the plurality of SoCs for the plurality of C rates.
According to some example embodiments, the method further comprises calculating the zero current rest patterns for different C rates based on the different unique RC branch values corresponding to the different values of the SoC. The method may include comparing calculated zero current rest patterns to the segregated zero current rest patterns.
According to some example embodiments, the method further comprises, calculating a plurality of RMSEs for each of the plurality of SoCs for the plurality of C rates. The method may include averaging the plurality of RMSEs for each of the plurality SoC to generate a RMSE for each of the plurality of SoCs.
According to some example embodiments, the method further comprises, performing gradient descent to optimize the RMSE for the plurality of SoCs.
According to some example embodiments, the method further comprises, obtaining SoC versus voltage curves. averaging voltage values, from the SoC versus voltage curves for the SoCs to obtain resultant voltage values. The method may include performing a spline fitting using the resultant voltage values.
According to some example embodiments, the method further comprises, computing first RC branches for a plurality of SOC from the modelled longer time constant transient response.
Some example embodiments disclosed herein provide a computer system for generating an Equivalent Circuit Model of a battery, the computer system comprises one or more computer processors, one or more computer readable memories, one or more computer readable storage devices, and program instructions stored on the one or more computer readable storage devices for execution by the one or more computer processors via the one or more computer readable memories, the program instructions comprising obtaining a first plurality of voltage patterns corresponding to a plurality of C rates of the cell using a first test. The one or more processors are further configured to obtaining a second voltage pattern of the cell using a second test. The one or more processors are configured to comparing difference between the first plurality of voltage patterns and the second voltage pattern. The one or more processors are further configured to identifying zero current rest patterns for each of the first plurality of voltage patterns. The one or more processors are further configured to segregating zero current rest patterns for each of the first plurality of voltage patterns. The one or more processors are configured to extracting longer time constant transient response from the segregated zero current rest patterns. The one or more processors are configured to modeling longer time constant transient response from the segregated zero current rest patterns. The one or more processors are further configured to subtracting the longer time constant transient response from the zero current rest patterns for obtaining a resultant pattern. The one or more processors are further configured to computing second RC branches for a plurality of SoC with the resultant rest pattern. The one or more processors are configured to computing a RC branch value by averaging RC branches of each of the plurality of SoCs for the plurality of C rates.
The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.
BRIEF DESCRIPTION OF DRAWINGS
The above and still further example embodiments of the present disclosure will become apparent upon consideration of the following detailed description of embodiments thereof, especially when taken in conjunction with the accompanying drawings, and wherein:
FIG. 1 illustrates a 2RC Circuit of an Equivalent Circuit Model, in accordance with an example embodiment.
FIG. 2 illustrates applications of batteries in electric cars.
FIG. 3A is a diagram that illustrates a perspective view of a battery case of an electric vehicle (EV), in accordance with an embodiment of the present disclosure.
FIG. 3B is a diagram that illustrates an exploded perspective view of the battery case of an EV, in accordance with an embodiment of the present disclosure;
FIG. 4 illustrates a block diagram of a computing system, in accordance with an example embodiment.
FIG. 5 illustrates a graph showing state of charge to open circuit voltage relationship of a cell at multiple charging speeds, in accordance with an example embodiment.
FIG. 6 illustrates RMSE profile of a cell, in accordance with an example embodiment.
FIG. 7 illustrates a graph showing application of Gradient Descent Technique, in accordance with an example embodiment.
FIG. 8 illustrates a flow chart for testing a cell with pulse pattern, in accordance with an example embodiment.
FIG. 9 illustrates a flow chart for generating a SoC-OCV curve, in accordance with an example embodiment.
FIG. 10 illustrates a flow chart for comparing the voltage patterns obtained in FIG. 8 and 9, in accordance with an example embodiment.
FIG. 11 illustrates a flow chart for identifying zero current rest patterns, in accordance with an example embodiment.
FIG. 12 illustrates a graph representing an exemplary zero current rest pattern showing the upper and the lower segment, in accordance with an example embodiment.
FIG. 13 illustrates a flow chart computing linear regression across RC branch, in accordance with an example embodiment.
FIG. 14 illustrates a flow chart for computing SoC and RC branch value, in accordance with an example embodiment.
FIG. 15 illustrates a flow chart for optimizing using RMSE and Gradient Descent technique, in accordance with an example embodiment.
FIG. 16 illustrates a flow chart for performing spline fitting, in accordance with an example embodiment.
The figures illustrate embodiments of the invention for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the invention described herein.
DETAILED DESCRIPTION
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art that the present disclosure may be practiced without these specific details. In other instances, systems, apparatuses, and methods are shown in block diagram form only in order to avoid obscuring the present invention.
Reference in this specification to “one embodiment” or “an embodiment” or “example embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. The appearance of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Further, the terms “a” and “an” herein do not denote a limitation of quantity, but rather denote the presence of at least one of the referenced items. Moreover, various features are described which may be exhibited by some embodiments and not by others. Similarly, various requirements are described which may be requirements for some embodiments but not for other embodiments.
Some embodiments of the present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments of the invention are shown. Indeed, various embodiments of the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. Like reference numerals refer to like elements throughout.
The terms “comprise”, “comprising”, “includes”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device, or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus proceeded by “comprises… a” does not, without more constraints, preclude the existence of other elements or additional elements in the system or method.
Furthermore, one or more computer-readable storage media may be utilized in implementing embodiments consistent with the present invention. A computer-readable storage medium refers to any type of physical memory on which information or data readable by a processor may be stored. Thus, a computer-readable storage medium may store instructions for execution by one or more processors, including instructions for causing the processor(s) to perform steps or stages consistent with the embodiments described herein. The term “computer-readable medium” should be understood to include tangible items and exclude carrier waves and transient signals, i.e., are non-transitory. Examples include random access memory (RAM), read-only memory (ROM), volatile memory, non-volatile memory, hard drives, CD ROMs, DVDs, flash drives, disks, and any other known physical storage media.
The embodiments are described herein for illustrative purposes and are subject to many variations. It is understood that various omissions and substitutions of equivalents are contemplated as circumstances may suggest or render expedient but are intended to cover the application or implementation without departing from the spirit or the scope of the present invention. Further, it is to be understood that the phraseology and terminology employed herein are for the purpose of the description and should not be regarded as limiting. Any heading utilized within this description is for convenience only and has no legal or limiting effect.
DEFINITIONS
The term “module” used herein may refer to a hardware processor including a Central Processing Unit (CPU), an Application-Specific Integrated Circuit (ASIC), an Application-Specific Instruction-Set Processor (ASIP), a Graphics Processing Unit (GPU), a Physics Processing Unit (PPU), a Digital Signal Processor (DSP), a Field Programmable Gate Array (FPGA), a Programmable Logic Device (PLD), a Controller, a Microcontroller unit, a Processor, a Microprocessor, an ARM, or the like, or any combination thereof.
The term “equivalent circuit model" (ECM) is a theoretical circuit that retains all of the electrical characteristics of a given circuit. ECM is often used to simplify calculation and analysis of complex circuits by using linear, passive elements or dependent sources. Further, ECM may also be used to model the behaviour of different components such as batteries.
The term “2RC equivalent circuit” is a model the operation of a battery. The 2RC equivalent circuit uses two resistors and two capacitors to implement the elements of an equivalent circuit model.
The term “regression” is a statistical method used to estimate the relationships between a dependent variable and one or more independent variables. Regression may be used in scientific and other disciplines to determine the strength and character of the relationship between variables and perform predictive analysis.
The term “RMSE” stands for Root Mean Square Error. RMSE measures prediction errors around a best fit line or curve. Specifically, RMSE may be used as a measure of the differences between values predicted by a model and the values observed.
The term “gradient descent” is an optimization technique used to minimize the cost function in predictive models. The goal of gradient descent is to find the optimal values of the model parameters that result in the minimum value of the cost function.
The term “spline” is a function defined piecewise by polynomials. A spline is often used to interpolate or approximate a set of data points. It is a flexible and smooth way to fit curves to data, and it may be used in a variety of applications.
END OF DEFINITIONS
Embodiments of the present disclosure may provide a method, a system, and a computer program product for generating an Equivalent Circuit Model of a cell. The method, the system, and the computer program product for generating an Equivalent Circuit Model of a cell are described with reference to FIG.1 to FIG. 16 as detailed below.
Accordingly, the present disclosure provides a method, system, or computer program product for generating an Equivalent Circuit Model of a cell.
FIG. 1 illustrates a 2RC circuit of an Equivalent Circuit Model (ECM). The 2RC Circuit 100 comprises of 2 RC units, the first RC unit R1 102, C1 106, and the second RC unit R2 104, C2 108 unit. In addition, there is the power source 112, a resistance R0 110 and the overall cell voltage 114.
The Equivalent Circuit Model (ECM) for a cell is a model that represents the electrical behaviour of a cell as an equivalent circuit. This model is commonly used to describe the dynamic behaviour of a cell during charge and discharge cycles. In another embodiment, the model may be used to describe the dynamic behaviour of a battery during charge and discharge cycles.
The ECM is composed of a set of electrical elements, such as resistors, capacitors, and inductors, which represent the various physical processes that occur within a cell. For example, the internal resistance of the cell is represented by a resistor, while the cell's capacitance is represented by a capacitor.
By using the ECM, it is possible to predict the voltage and current behaviour of a cell under different operating conditions, such as changes in temperature, load, and charging rate. This information is essential for designing battery management systems, which are used to control the charging and discharging of batteries in applications such as electric vehicles and renewable energy systems.
In the context of batteries, Thevenin's theorem may be used to develop an equivalent circuit model (ECM) of a cell. The ECM represents the cell as an electrical network consisting of a voltage source, a series resistance, and sometimes additional components such as capacitors or inductors. The ECM may be used to predict the cell's voltage and current behaviour under different operating conditions, such as charging or discharging, or when subjected to different loads.
The series resistance represents the battery's internal resistance, which is a measure of the resistance to current flow inside the battery due to factors such as electrode and electrolyte resistance. The ECM may be developed using a variety of methods, including experimental testing, analytical modelling, or a combination of both. The ECM may be used in conjunction with other techniques such as regression analysis, gradient descent, and particle filtering to estimate the cell's state of charge, state of health, and other important parameters.
In the context of batteries, RC stands for "resistance-capacitance" and may represent dynamics of the battery
[¦(¦(?SoC?_(K+1)@V_(R_1 C_(1K+1) )@V_(R_2 C_(2K+1) ) ))]=[¦(¦(1&0&0@0&e^(-?t/?R_1 C?_1 )&0@0&0&e^(-?t/?R_2 C?_2 ) ))][¦(¦(?SoC?_K@V_(R_1 C_1K )@V_(R_2 C_2K ) ))]+[¦(¦(?t/(3600×Capacity)@(1-e^(-?t/?R_1 C?_1 ) ) R_1@(1-e^(-?t/?R_2 C?_2 ) ) R_2 ))] i_(K+1)
Equation 1
?SoC?_(K+1) is the State of Charge for interval K+1
?SoC?_K is the State of Charge for interval K
V_(R_1 C_(1K+1) ) is the voltage across R1C1 for interval K+1
V_(R_1 C_1K ) is the voltage across R1C1 for interval K
V_(R_2 C_(2K+1) ) is the voltage across R2C2 for interval K+1
V_(R_2 C_2K ) is the voltage across R2C2 for interval K
i_(K+1) is the current for interval K+1
e^(-?t/?R_1 C?_1 ) is the decay factor for voltage across R1C1 during discharge
e^(-?t/?R_2 C?_2 ) is the decay factor for voltage across R2C2 during discharge
(1-e^(-?t/?R_1 C?_1 ) ) is the multiply factor for voltage across R1C1 during charge
(1-e^(-?t/?R_2 C?_2 ) ) is the multiply factor for voltage across R2C2 during charge
The above equation 1 is 2RC Equivalent Circuit Model determination equation. In the equation a first RC branch is used to model longer time constant transient and a second RC branch is used to model shorter time constant transient.
In practical terms, a 2RC model may provide a better prediction of the performance of a cell, especially under high loads or fast discharge rates.
Further, whether to use a 1RC or 2RC model for a cell depends on the level of accuracy required for the particular application, as well as the available computational resources. For most applications, a 1RC model is sufficient, but for high-performance applications such as the present application, a 2RC model may be necessary to accurately model the cell's behaviour.
FIG. 2 illustrates applications of batteries in electric cars. A person skilled in the art would understand that the application is not limited only to cars.
In unit 200, an electric car 206 is shown to be charging from a power source 208.
Parameters indicated by a dashboard of an electric car may vary depending on the make and model of the car. However, some common parameters that are typically displayed on an electric car dashboard include:
Battery level: This displays the current level of charge in the car's battery pack.
Range: This indicates how far the car may travel on its remaining battery charge based on the car's energy efficiency and driving conditions.
Speed: This displays the car's current speed.
Energy usage: This displays how much energy is being used by the car, typically measured in kilowatt hour (kWh).
Regenerative braking: This displays how much energy is being recovered by the car's regenerative braking system.
Charging status: This displays the current status of the car's battery charging process, including whether it is actively charging, how much time is remaining until fully charged, and the charging rate.
Navigation: Some electric car dashboards include a navigation system that may display maps, directions, and other information relevant to the driver's journey.
Climate control: This displays the current settings for the car's heating, ventilation, and air conditioning (HVAC) system.
Trip computer: This displays information about the car's trip, such as the distance travelled, average speed, and energy usage.
FIG. 3A is a diagram that illustrates a perspective view of a battery case 300, in accordance with an embodiment of the present disclosure. The battery case 300 illustrated in FIG. 3A is an assembled case with multiple cells arranged therein. The assembled battery case 300 may be utilized for powering an electric vehicle (EV) (not shown).
The battery case 300 includes a battery housing 302 that may be open on sides and may house the cells therein. Further, the battery case 300 includes a first lid 304 and a second lid (shown later in FIG. 3B) to seal the battery housing 302 once the cells are arranged therein. The battery case 300 further includes first and second terminals 306 and 308 that facilitate electrical connection of the battery case 300 with the EV (e.g., electric motors of the EV). In an embodiment, the first and second terminals 306 and 308 correspond to positive and negative terminals of the battery case 300, respectively. In another embodiment, the first and second terminals 306 and 308 correspond to negative and positive terminals of the battery case 300, respectively.
A control system (not shown) of the EV may be connected to various components (e.g., a battery management system (shown later in FIG. 3B)) housed inside the battery housing 302 to receive information regarding various parameters (e.g., a state-of-charge) of the cells. The battery case 300 further includes a wire opening 310 that facilitates passage of wires connecting the control system and the battery management system.
FIG. 3A illustrates various components of the battery case 300 which are not labelled so as to not obscure the description of FIG. 3A. These components are explained in detail in conjunction with subsequent figures.
FIG. 3B is a diagram that illustrates an exploded perspective view of the battery case 300, in accordance with an embodiment of the present disclosure. As illustrated in FIG. 3B, the battery housing 302 of the battery case 300 houses a battery pack 312 (e.g., an arrangement of cells) and the battery management system (hereinafter designated as the “battery management system 314”) that is configured to manage (e.g., monitor and control) the cells of the battery pack 312. Further, the battery housing 302 is open on the sides and is sealed using the first lid 304 and the second lid (hereinafter designated as the “second lid 316”). In an embodiment, the first and second lids 304 and 316 are made of aluminum, aluminum alloy, steel, stainless steel, or any other appropriate material as known in the art.
The battery case 300 further includes first and second insulation sheets 318 and 320 and first and second gaskets 322 and 324. The first and second insulation sheets 318 and 320 are made of mica, Teflon, rubber, plastic, polyvinyl chloride (PVC), glass, ceramic, porcelain, or any other appropriate material having insulation properties. Further, the first and second gaskets 322 and 324 are made of fibre, asbestos, cork, graphite, thermoplastic, or any other suitable sealing material known in the art.
The first insulation sheet 318 and the first gasket 322 may be disposed between the battery housing 302 and the first lid 304 such that when the first lid 304 is sealed, the first gasket 322 is in contact with the first lid 304, the first insulation sheet 318 is in contact with the battery housing 302, and the first insulation sheet 318 and the first gasket 322 are in contact with each other. The first insulation sheet 318 provides insulation to the battery pack 312 from the first lid 304 (e.g., terminals of the cells in the battery pack 312 extending on one side of the battery pack 312). Further, the first gasket 322 ensures that when the first lid 304 is shut, the battery pack 312 is completely sealed from one side. Similarly, the second insulation sheet 320 and the second gasket 324 may be disposed between the battery housing 302 and the second lid 316 such that when the second lid 316 is sealed, the second gasket 324 is in contact with the second lid 316, the second insulation sheet 320 is in contact with the battery housing 302, and the second insulation sheet 320 and the second gasket 324 are in contact with each other. The second insulation sheet 320 provides insulation to the battery pack 312 from the second lid 316 (e.g., terminals of the cells in the battery pack 312 extending on the other side of the battery pack 312). Further, the second gasket 324 ensures that when the second lid 316 is shut, the battery pack 312 is completely sealed from the other side. The first and second lids 304 and 316 are secured on the battery housing 302 by way first and second pluralities of screws 326 and 328, respectively. Although it described that the screws are used to secure the first and second lids 304 and 316 on the battery housing 302, the scope of the present disclosure is not limited to it. In other embodiments, a pin, a rivet, a stud, or any other appropriate arrangement known in the art, may be utilized, without deviating from the scope of the present disclosure.
In the current technology scenario predominantly Lithium-ion batteries are used. However, any suitable battery chemistry may be implemented.
Lithium-ion batteries use different chemistries for their positive and negative electrodes to achieve different performance characteristics. Some of the most common chemistries used in lithium-ion batteries are:
Lithium Cobalt Oxide (LiCoO2 or LCO): LCO is one of the most widely used cathode materials in lithium-ion batteries, due to its high energy density and good cycle life. It is commonly used in consumer electronics, such as smartphones, laptops, and cameras.
Lithium Manganese Oxide (LiMn2O4 or LMO): LMO is another common cathode material that offers good safety, high power density, and long cycle life. LMO is often used in power tools, electric vehicles, and other applications that require high power output.
Lithium Iron Phosphate (LiFePO4 or LFP): LFP is a cathode material that offers excellent thermal and chemical stability, good cycle life, and high-power density. LFP is commonly used in electric vehicles, grid storage systems, and other applications that require high safety and reliability.
Lithium Nickel Cobalt Aluminium Oxide (LiNiCoAlO2 or NCA): NCA is a cathode material that offers high energy density, good cycle life, and excellent thermal stability. NCA is commonly used in electric vehicles and other applications that require high energy density.
Lithium Nickel Manganese Cobalt Oxide (LiNiMnCoO2 or NMC): NMC is a cathode material that offers a good balance of energy density, power density, and cycle life. NMC is commonly used in electric vehicles, portable electronics, and other applications that require high performance.
There are also other battery chemistries, such as lithium titanate oxide (LTO), lithium cobalt nickel oxide (LiCoNiO2 or LCN), and lithium vanadium oxide (LVO), each with their own unique characteristics and applications.
FIG. 4 illustrates a block diagram of an example computing system 400, consistent with embodiments of the present disclosure. The computing system 400 comprises a processor 402, a memory 404, a datastore 406, a bus 408, a network interface 410, and a controller 412.
The computing system 400 comprises the processor 402 for processing information. The term “processor” used herein may refer to a hardware processor including a Central Processing Unit (CPU), an Application-Specific Integrated Circuit (ASIC), an Application-Specific Instruction-Set Processor (ASIP), a Graphics Processing Unit (GPU), a Physics Processing Unit (PPU), a Digital Signal Processor (DSP), a Field Programmable Gate Array (FPGA), a Programmable Logic Device (PLD), a Controller, a Microcontroller unit, a Processor, a Microprocessor, an ARM, or the like, or any combination thereof.
The processor 402 may be embodied in a number of different ways. For example, the processor 402 may be embodied as one or more of various hardware processing means such as a coprocessor, a microprocessor, a controller, a digital signal processor (DSP), a processing element with or without an accompanying DSP, or various other processing circuitry including integrated circuits such as, for example, an ASIC (application specific integrated circuit), an FPGA (field programmable gate array), a microcontroller unit (MCU), a hardware accelerator, a special-purpose computer chip, or the like. As such, in some embodiments, the processor 402 may include one or more processing cores configured to perform independently. A multi-core processor may enable multiprocessing within a single physical package. Additionally, or alternatively, the processor 402 may include one or more processors configured in tandem via the bus to enable independent execution of instructions, pipelining and/or multithreading.
Additionally, or alternatively, the processor 402 may include one or more processors capable of processing large volumes of workloads and operations to provide support for big data analysis. In an example embodiment, the processor 402 may be in communication with the memory 404 via the bus 408 for passing information among components of the computing system 400.
Alternatively, as another example, when the processor 402 is embodied as an executor of software instructions, the instructions may specifically configure the processor 402 to perform the algorithms and/or operations described herein when the instructions are executed. However, in some cases, the processor 402 may be a processor specific device (for example, a mobile terminal or a fixed computing device) configured to employ an embodiment of the present invention by further configuration of the processor 402 by instructions for performing the algorithms and/or operations described herein. The processor 402 may include, among other things, a clock, an arithmetic logic unit (ALU) and logic gates configured to support operation of the processor 402.
The computing system 400 comprises the memory 404 storing information and instructions to be executed by processor 402. The term “memory” used herein may refer to any computer-readable storage medium, for example, volatile memory, random access memory (RAM), non-volatile memory, read only memory (ROM), or flash memory. The memory may include a Random-Access Memory (RAM), a Read-Only Memory (ROM), a Complementary Metal Oxide Semiconductor Memory (CMOS), a magnetic surface memory, a Hard Disk Drive (HDD), a floppy disk, a magnetic tape, a disc (CD-ROM, DVD-ROM, etc.), a USB Flash Drive (UFD), or the like, or any combination thereof.
The memory 404 may be non-transitory and may include, for example, one or more volatile and/or non-volatile memories. In other words, for example, the memory 404 may be an electronic storage device (for example, a computer readable storage medium) comprising gates configured to store data (for example, bits) that may be retrievable by a machine (for example, a computing device like the processor 402). The memory 404 may be configured to store information, data, contents, applications, instructions, or the like, for enabling the apparatus to carry out various functions in accordance with an example embodiment of the present disclosure. For example, the memory 404 could be configured to buffer input data for processing by the processor 402. As exemplarily illustrated in FIG. 3, the memory 404 may be configured to store instructions for execution by the processor 402. As such, whether configured by hardware or software methods, or by a combination thereof, the processor 402 may represent an entity (for example, physically embodied in circuitry) capable of performing operations according to an embodiment of the present invention while configured accordingly. Thus, for example, when the processor 402 is embodied as an ASIC, FPGA or the like, the processor 402 may be specifically configured hardware for conducting the operations described herein.
The computing system 400 comprises the datastore 406. The instructions received by memory 404 may optionally be stored on datastore 406 either before or after execution by processor 402. The datastore 406 may be a magnetic disk, an optical disk, or a USB thumb drive (Flash drive), or any other suitable computer readable storage medium.
The computing system 400 comprises the bus 408 for communicating information. The processor 402, the memory 404, the datastore 406, and the network interface 410 may communicate with each other via the bus 408.
The computing system 400 comprises the network interface 410. The network interface 410 may provide a two-way data communication coupling to a network link. For example, network interface 410 may be an integrated services digital network (ISDN) card, cable modem, satellite modem, or a modem to provide a data communication connection to a corresponding type of telephone line. As another example, network interface 410 may be a local area network (LAN) card to provide a data communication connection to a compatible LAN. Wireless links may also be implemented. In any such implementation, network interface 410 may send and receive electrical, electromagnetic, or optical signals that carry digital data streams representing various types of information.
The computing system 400 comprises the controller 412. The term “controller” is used herein to refer to any method or system for controlling and should be understood to encompass microprocessors, microcontrollers, programmable digital signal processors, integrated circuits, computer software, computer hardware, electrical circuits, application specific integrated circuits, programmable logic devices, programmable gate arrays, programmable array logic, personal computers, chips, and any other combination of discrete analog, digital, or programmable components, or other devices capable of providing processing functions.
The processor 402 of the evaluation system 400 may be embodied in a number of different ways. For example, the processor 402 may be embodied as one or more of various hardware processing means such as a coprocessor, a microprocessor, a controller, a digital signal processor (DSP), a processing element with or without an accompanying DSP, or various other processing circuitry including integrated circuits such as, for example, an ASIC (application specific integrated circuit), an FPGA (field programmable gate array), a microcontroller unit (MCU), a hardware accelerator, a special-purpose computer chip, or the like. As such, in some embodiments, the processor 402 may include one or more processing cores configured to perform independently. A multi-core processor may enable multiprocessing within a single physical package. Additionally, or alternatively, the processor 402 may include one or more processors configured in tandem via the bus to enable independent execution of instructions, pipelining and/or multithreading.
Additionally, or alternatively, the processor 402 may include one or more processors capable of processing large volumes of workloads and operations to provide support for big data analysis. In an example embodiment, the processor 402 may be in communication with the memory 404 via a bus (not shown) for passing information among components of the evaluation system 400.
The memory 404 may be non-transitory and may include, for example, one or more volatile and/or non-volatile memories. In other words, for example, the memory 404 may be an electronic storage device (for example, a computer readable storage medium) comprising gates configured to store data (for example, bits) that may be retrievable by a machine (for example, a computing device like the processor 402). The memory 404 may be configured to store information, data, content, applications, instructions, or the like, for enabling the apparatus to carry out various functions in accordance with an example embodiment of the present invention. For example, the memory 402 may be configured to buffer input data for processing by the processor 402.
The term “memory” used herein may refer to any computer-readable storage medium, for example, volatile memory, random access memory (RAM), non-volatile memory, read only memory (ROM), or flash memory. The memory may include a Random-Access Memory (RAM), a Read-Only Memory (ROM), a Complementary Metal Oxide Semiconductor Memory (CMOS), a magnetic surface memory, a Hard Disk Drive (HDD), a floppy disk, a magnetic tape, a disc (CD-ROM, DVD-ROM, etc.), a USB Flash Drive (UFD), or the like, or any combination thereof.
FIG. 5 illustrates a graph showing state of charge to open circuit voltage relationship of a cell at multiple charging speeds. The graph 500 shows core parameters’ relationship.
The State of Charge (SoC) 504 refers to the amount of energy that a cell has stored, expressed as a percentage of its total capacity. In other words, SoC is a measure of how much energy a cell has left to deliver.
The SoC of a cell may be estimated based on several parameters, including the cell's open circuit voltage (OCV) 502, the current flowing in or out of the cell, and the cell's internal resistance. Battery management systems (BMS) use these parameters to calculate the SoC of the cell and to manage charging and discharging processes.
The SoC of a cell is an important parameter for many applications, including electric vehicles, and portable electronics. Knowing the SoC of a cell allows for better usage control of usage and longer life of the battery.
It is important to note that estimating the SoC of a cell may be challenging, as the voltage and current measurements used to calculate the SoC may be affected by factors such as temperature, aging, and load conditions. As a result, accurate estimation of the SoC requires careful calibration and modelling of the cell's behaviour under different operating conditions.
Open Circuit Voltage (OCV) refers to the voltage of a cell when it is not connected to any external circuit or load. In other words, OCV is the voltage that a cell would have if not being used.
The OCV of a cell is determined by its chemistry and state of charge. As a cell discharges, the OCV gradually decreases, reflecting the decrease in the amount of stored energy. When a cell is charged, the OCV increases, reflecting the increase in the amount of stored energy.
The OCV of a cell is an important parameter for battery management systems, as it provides a quick and easy way to estimate the state of charge of the cell. However, it is important to note that the cell voltage does not always coincide with OCV and is not always a reliable indicator of the state of charge, especially for batteries that have not been sitting idle for a long time or for batteries that are heavily loaded. Therefore, the OCV of a cell is the voltage when it is not connected to any external circuit or load for a long time, and it is an important parameter for estimating the state of charge of the cell.
The SoC vs OCV curve 506 of the cell is a graphical representation of the relationship between the cell's state of charge (SoC) 504 and its open circuit voltage (OCV) 502. The SoC vs OCV curve 506 is unique to each type of cell chemistry and may vary depending on the specific battery cell design and manufacturing process.
The SoC vs OCV curve 506 typically shows a non-linear relationship between SoC 504 and OCV 502, with the OCV 502 decreasing as the SoC 504 decreases. This relationship may be roughly approximated by a logarithmic or polynomial function. Further, the shape of the curve may vary depending on the chemistry of the cell and the temperature at which it is operating.
The SoC vs OCV curve 506 is an important tool for estimating the SoC 504 of a cell. By measuring the OCV 502 of a cell and comparing it to the curve, the SoC 504 of the cell may be estimated. However, it is important to note that the accuracy of this estimation may be affected by factors such as temperature, aging, and load conditions.
In addition to being useful for estimating SoC, the SoC vs OCV curve 506 may also be used to assess the health of a cell. As a cell ages, its OCV vs SoC curve 506 may shift or change shape, indicating changes in its internal chemistry and structure. This may be used to monitor the health of the cell and predict its remaining useful life.
The health of the cell which is state of health or SoH refers to the overall health or condition of a cell. This is a measure of how well a cell may store and deliver energy compared to its original or expected performance when it was new.
The SoH of a cell may be affected by several factors, including the number of charge-discharge cycles, the operating temperature, the charging and discharging rates, and the depth of discharge. Over time, these factors may cause changes in the cell’s internal chemistry and physical structure, leading to a decrease in its capacity and performance.
The SoH of a cell may be estimated using various techniques, such as measuring its capacity, analysing its impedance, or monitoring its voltage and temperature under different operating conditions. Battery management systems (BMS) use these techniques to monitor the health of the cell and to provide warnings or alerts when the cell’s performance or safety is compromised.
Further, SoH of a cell is an important parameter for many applications, especially those that rely on the long-term reliability and performance of the cell. SoH may also be used to predict the remaining useful life of the cell and to optimize its usage and maintenance.
FIG. 6 illustrates RMSE profile of a cell, in accordance with an example embodiment. Further, the profile 600 indicates RMSE scale 602 and variations of max 606, min 608 and average 604 in an example embodiment.
RMSE (Root Mean Squared Error) is a statistical metric used to measure the difference between predicted values and actual values in a dataset. It is commonly used in various fields, including engineering, finance, and data science, to evaluate the performance of predictive models.
The RMSE is calculated by taking the square root of the mean of the squared differences between predicted and actual values.
A lower RMSE value indicates that the predictions are closer to the actual values, while a higher RMSE value indicates a greater discrepancy between the predicted and actual values. In the context of predictive modelling, RMSE is commonly used as a measure of the model's accuracy, as it provides a quantitative assessment of how well the model is able to predict the outcome variable.
In an embodiment, other metrics, such as R-squared, MAE (Mean Absolute Error), and MAPE (Mean Absolute Percentage Error), may also be considered in addition to RMSE to provide a more comprehensive evaluation of the model's performance.
In the context of regression analysis, RMSE (Root Mean Squared Error) is a metric used to evaluate the performance of a regression model. It measures the difference between the actual values of the dependent variable and the predicted values from the regression model.
A lower RMSE value indicates that the model has better predictive accuracy, as it means that the predicted values are closer to the actual values.
In the context of generating an Equivalent Circuit Model (ECM) of a cell, RMSE (Root Mean Squared Error) and regression analysis may be used to evaluate the accuracy of the model and improve its predictive performance.
To generate an ECM using regression analysis, a set of input-output data is collected by performing experiments on the cell. The input variables may include but not limited to current, voltage, temperature, and other environmental factors that affect the cell's behaviour, while the output variable is typically the cell's state of charge (SOC) or state of health (SOH).
Once the input-output data is collected, regression analysis is used to fit a mathematical equation or model to the data. In an alternate embodiment, the model's accuracy is then evaluated using metrics such as RMSE, R-squared, MAE (Mean Absolute Error), MAPE (Mean Absolute Percentage Error), or any suitable combination thereof. These metrics provide information about how well the model fits the data and how accurately it may predict the cell's behaviour under different conditions.
A low RMSE value indicates that the model's predictions are close to the actual values, which means that the model is accurate and may be used to predict the cell's behaviour with confidence. However, if the RMSE value is high, it indicates that the model is not accurate and may need to be refined or improved.
Regression analysis may also be used to identify which input variables are most important in predicting the cell's behaviour. By analysing the coefficients of the regression equation, it's possible to determine which input variables have the greatest impact on the cell's SOC or SOH. This information may be used to optimize cell charging and discharging algorithms and improve the design of battery management systems.
Overall, RMSE and regression analysis are valuable tools for generating an ECM of a cell, as these help to evaluate the accuracy and predictive performance of the model, identify important input variables, and improve the design of battery management systems.
FIG. 7 illustrates a graph showing application of Gradient Descent technique. The graph 700 shows an application of Gradient Descent technique.
Gradient descent is an optimization technique or algorithm used to minimize the cost function or error function of a model. It is commonly used in machine learning and deep learning for training neural networks and other models.
The goal of gradient descent is to find the values of the model's parameters that minimize the cost function. The cost function measures the difference between the predicted output of the model and the actual output. And, the objective of the optimization algorithm is to find the parameters that minimize this difference.
The gradient descent algorithm works by iteratively adjusting the parameters of the model in the direction of the negative gradient of the cost function from a starting point 702.
At each iteration of the algorithm, the gradient of the cost function is computed with respect to each parameter, and the parameters are updated by subtracting a multiple of the gradient from the current parameter values. This multiple is known as the learning rate, and it controls the step size of the algorithm.
The iteration is repeated until the algorithm converges to a minimum of the cost function or until a specified stopping criterion is met.
Gradient descent comes in several variants, including batch gradient descent, stochastic gradient descent, and mini-batch gradient descent. Each variant has its advantages and disadvantages and is used in different scenarios depending on the size of the dataset, the complexity of the model, and the available computing resources.
Gradient descent, RMSE (Root Mean Squared Error), and regression may be used together in the process of modelling an Equivalent Circuit Model (ECM) of a cell to improve the accuracy and efficiency of the model.
To start, a set of input-output data is collected by performing experiments on the cell. The input variables may include current, voltage, temperature, and other environmental factors that affect the cell's behaviour, while the output variable is typically the cell's state of charge (SOC) or state of health (SOH).
Regression analysis is then used to fit a mathematical equation or model to the data. However, simply fitting a model to the data is not enough. The model must be optimized to minimize the cost function or error function, which is where gradient descent comes in.
Gradient descent may be used to adjust the parameters of the model in the direction of the negative gradient of the cost function. By minimizing the cost function, the model becomes more accurate and may better predict the behaviour of the cell under different conditions.
RMSE may be used to evaluate the accuracy of the model at each iteration of the gradient descent algorithm. The RMSE measures the difference between the predicted values and actual values, and it is used to determine how well the model fits the data. As the algorithm iterates, the RMSE should decrease, indicating that the model is becoming more accurate.
To use gradient descent, RMSE, and regression to model an ECM of a cell, the process typically involves the following steps:
Collecting input-output data from experiments on the battery or cell.
Fitting a regression model to the data using gradient descent to minimize the cost function.
Evaluating the accuracy of the model using RMSE.
Adjusting the model parameters using gradient descent to minimize the cost function and improve the model's accuracy.
Repeating the above steps until the model's accuracy is satisfactory.
Overall, the combination of gradient descent, RMSE, and regression is a powerful approach to modelling an ECM of a cell. It allows for the optimization of the model's parameters to improve its accuracy and predictive performance, while also providing a quantitative measure of the model's accuracy through the use of RMSE.
FIG. 8 illustrates a flow chart for testing a cell with pulse pattern to obtain voltage patterns of pulse discharge at certain C-rates, in accordance with an example embodiment. The flow chart 800 for testing a cell with pulse pattern starts at step 802.
The flow chart 800 details executing the Hybrid Pulse Power Characterization test (HPPC) begins at step 802.
HPPC stands for Hybrid Pulse Power Characterization, which is a type of test commonly used to characterize the electrochemical and electrical performance of batteries.
During an HPPC test, a battery is subjected to a series of hybrid pulses of different amplitudes and durations, followed by a relaxation period. These pulses are designed to simulate the power demands of different real-world driving or operating conditions. The battery's voltage and current response to each pulse are measured, and these data are used to construct a model of the battery's behaviour.
The HPPC test is useful for determining several key performance characteristics of a battery, including its capacity, internal resistance, and voltage response. This information is important for designing and optimizing battery management systems, which are used to control the charging and discharging of batteries in applications such as electric vehicles and grid-scale energy storage systems.
Overall, the HPPC test is a valuable tool for battery researchers and engineers, as it provides a comprehensive understanding of a battery's performance under a wide range of operating conditions.
At step 804, the battery is given a rest of 10 seconds or any suitable time period.
In the next step 806, the battery is subjected to discharge at a standard rate to a nil State of Charge (SoC).
Another rest of 10 seconds is provided to the battery at step 808.
In the subsequent step 810, the battery is fully charged to 100% SoC using standard C rate.
After charging, the battery is rested for one hour at step 812. In an another embodiment, the battery may be rested for 30 minutes to 2 hours or any suitable time period.
Further, at step 814 applying discharging pulse at certain C rates for a 5% reduction in SoC. Additionally, the change in voltage during a time period of one second when the discharge pulse starts and when the discharge pulse ends is used to calculate the internal resistance.
Providing a rest for one hour at step 816. In an embodiment, the battery may be rested for 30 minutes to 2 hours or any suitable time period.
Further, at step 818 repeating the steps 814 and 816 for 17 cycles which leads to a reduction of 85% SoC.
Additionally, at step 820 discharging pulse applied based at the certain C rate for a 2% reduction in SoC. Additionally, the change in voltage during a time period of one second when the discharge pulse starts and when the discharge pulse ends is used to calculate the internal resistance.
Providing a rest for one hour at step 822.
Further, at step 824 repeating the steps 820 and 822 for 7 cycles.
The steps 804-824 are repeated to get voltage patterns of pulse discharge at different C rates. For example, the steps 804-824 are performed to get voltage patterns of pulse discharge at 4C rate. The steps 804-824 are repeated to get voltage patterns of pulse discharge at 5C rate. The steps 804-824 are repeated to get voltage patterns of pulse discharge at 3C rate. The steps 804-824 are repeated to get voltage patterns of pulse discharge at 2C rate or any suitable C rate.
FIG. 9 illustrates a flow chart for generating a SoC-OCV curve. The flow chart 900 starting at 902 provides steps for a battery’s SoC – OCV curve to be created.
To generate the battery profile for OCV (Open Circuit Voltage) - SoC (State of Charge) mapping, the follow these general steps are to be followed:
Collect data on the battery's open circuit voltage (OCV) and state of charge (SoC). This may be done by measuring the voltage of the battery at different levels of charge using a multi-meter, a battery management system, or any suitable device.
Plot the OCV vs SoC data on a graph. This will create a curve that represents the battery's behaviour at different levels of charge.
It's important to note that generating an accurate OCV-SoC mapping profile requires precise measurements and careful analysis. Additionally, the profile will only be valid for the specific battery and conditions under which the data was collected and may not be applicable to other batteries or situations.
At step 904, the battery is rested for 10 seconds.
In the next step 906, the battery is subject to charge at a standard C rate to a full 100% State of Charge (SoC).
A rest of 30 minutes is provided at step 908.
In the subsequent step 910, the battery is fully discharged to 0% SoC as per standard C rate.
After discharging, the battery is rested for 30 minutes at step 912.
Further at step 914, the battery is charged at half the C rate.
Provide a rest for one hour at step 916.
Additionally, at step 918 discharge battery at one twentieth of C rate. All the voltage values for the corresponding SoCs are recorded during the step 918.
Provide a rest for one hour at step 920.
Further, at step 922 charge battery at one twentieth of C rate. All the voltage values for the corresponding SoCs are recorded during the step 922.
At step 924, all the voltage values for the corresponding SoCs recorded during the steps 918 and 922 are averaged. The averaged voltage values for the corresponding SoCs are plotted to obtain the OCV vs SoC curve. This will create a curve that represents the battery’s behavior at different levels of charge.
FIG. 10 illustrates a flow chart for comparing the voltage patterns obtained in FIG. 8 and 9. Each of the voltage patterns obtained in FIG. 8 is compared with the voltage pattern obtained in FIG. 9.
After applying the discharge pulses in FIG. 8 to obtain voltage patterns at different C rates, at step 1004, the voltage is allowed to settle near to OCV for each of the voltage patterns.
At step 1006, based on the SoC vs OCV curve (obtained in FIG. 9), the initial SoC of the battery is calculated.
After the voltage is allowed to settle near to OCV for each of the voltage patterns, at step 1008, the voltage is extracted after the discharge current pulse is applied after step 824 of FIG. 8.
. At step 1010, the extracted voltage is noted for each of the voltage patterns obtained in FIG. 8.
At step 1012, SoC is calculated by using coulomb counting method corresponding to the voltage noted for each of the voltage patterns.
The Coulomb counting method is a technique used to estimate the amount of charge (measured in Coulombs) that has been delivered to or extracted from a battery. This method is commonly used to monitor the SoC of a battery, which is the amount of energy remaining in the battery expressed as a percentage of its total capacity.
The Coulomb counting method works by measuring the current flowing into or out of the battery and integrating it over time to determine the total amount of charge that has been delivered to or extracted from the battery. This is based on the principle that the amount of charge that enters or leaves a battery is equal to the product of the current and the time for which it flows.
To use Coulomb counting to estimate the SoC of a battery, the current flowing in and out of the battery is measured and integrated over time to determine the total charge delivered to or extracted from the battery. The resulting charge estimate is then compared to the battery's nominal capacity to determine its SoC.
At step 1014, the voltage noted at step 1010 is compared with the voltage of the SOC-OCV curve corresponding to the calculated SOC. If the compared voltages are not similar then the steps of FIG. 8 are repeated, otherwise, the flow chart terminates at step 1016.
FIG. 11 illustrates a flow chart for identifying zero current rest patterns. The flow chart 1100 is used to identify zero current rest patterns commences at step 1102 and is a continuation of 1000.
Generally, to identify zero current rest patterns from each of the voltage patterns obtained, these general steps need to be followed:
Plot the current data from the HPPC test for each of the different C rates on a graph with time on the x-axis and current on the y-axis. From the graphs corresponding to each of the different C rates, identify periods where the current is zero or close to zero. These identified periods will be referred as “zero current periods” and the voltage plots corresponding to these periods will be referred as “zero current rest patterns”. Before the zero current period, the pulse current duration was sufficient to charge the capacitance in the RC branches and no current is flowing through the capacitance.
Identify the zero current periods and analyse them to determine their duration and characteristics. For example, some zero current periods may be very short and occur between charge and discharge pulses, while others may be longer and occur during periods where the cell is at rest.
Analyse trends in the zero current rest patterns over time or as the battery undergoes different test conditions. For example, zero current periods after applying the discharging pulse at a certain C rate for a 5 % SoC reduction and a 2 % SoC reduction are analysed.
Recording SoCs corresponding to the identified zero current rest patterns for each of the voltage patterns is performed at step 1104.
At step 1106, the zero current rest patterns are segregated as per the different SoCs.
In practice, at step 1108, the voltage corresponding to each of the zero current rest patterns may be modeled using a sum of exponentials having negative power for each case. Each exponent term represents the voltage in each RC branch.
A first RC branch represents the longer time constant transient. A second RC branch represents the shorter time constant transient. A zero current rest pattern comprises two segments- a lower segment and an upper segment. The lower segment represents Sum of Shorter and Longer time constant transient response, and the upper segment represents longer time constant transient response.
At step 1110, the upper segment of the zero current rest pattern may be modeled as a single exponential since the voltage change is being driven by the slower first RC branch.
FIG. 12 illustrates a graph representing an exemplary zero current rest pattern showing the upper and the lower segment. The lower segment is the sum of shorter and longer time constant transient response. And the upper segment is the longer time constant transient response. Further, extracted rest pattern is shown along with the fitted rest pattern.
FIG. 13 illustrates a flow chart computing linear regression across RC branch. The flow chart 1300 performs linear regression across the first RC branch starting at step 1302 and follows 1200.
Linear regression is a statistical method used to model the linear relationship between a dependent variable and one or more independent variables. It assumes that the relationship between the variables is linear and may be expressed as a straight line. Linear regression models may be simple (with only one independent variable) or multiple (with multiple independent variables). Linear regression is widely used in various fields, including finance, economics, and social sciences.
Non-linear regression, on the other hand, is a statistical method used to model the non-linear relationship between a dependent variable and one or more independent variables. It assumes that the relationship between the variables is non-linear and cannot be expressed as a straight line. Non-linear regression models may take many different forms, including polynomial, exponential, logarithmic, and power functions.
The main difference between linear and non-linear regression is that linear regression models assume a linear relationship between the dependent variable and the independent variable(s), while non-linear regression models allow for non-linear relationships between these variables. Non-linear regression models may provide more flexibility in modelling complex relationships between variables, but they may also be more difficult to interpret and require more advanced statistical techniques.
Voltage pattern towards upper segment of the rest pattern is extracted at step 1304. The voltage pattern is exponential, hence non-linear in nature.
Subsequently, at step 1306 a natural logarithm of the extracted voltage pattern is computed. However, computing a natural logarithm on an exponential function converts the function to linear on which linear regression may be generated.
Further, fitted to a line using a linear regression and the values of the resistance and capacitance of the longer time constant RC branch is discovered at step 1308.
At step 1310 the voltage due to the first RC branch is extrapolated. Further, subtracting the extrapolated voltage from the rest pattern to get a resultant pattern.
FIG. 14 illustrates a flow chart for computing SoC and RC branch value. The flow chart 1400 for calculating SoC and RC branch value commences at 1402 is a continuation of 1300.
The start of the resultant pattern obtained from 1310 is fitted to an exponential function at step 1404. This step will facilitate obtaining the values of the resistance and capacitance of the second RC branch.
At step 1406, the values of the first and second RC branches are discovered for all the SoCs on which rest pattern is available. Thus, there are different RC branches values for same SoCs corresponding to different C rates.
The values of the first and second RC branches are of same SoCs but of different C rates are averaged to find a unique RC branch value corresponding to the same SoCs at step 1408. Thus, we will get different unique RC branch values corresponding to different values of the SoCs.
FIG. 15 illustrates a flow chart for optimizing using RMSE and Gradient Descent technique. The flow chart 1500 teaches optimizing using RMSE and Gradient Descent technique commences at 1502 and follows 1400.
Gradient descent is an optimization algorithm that may be used to minimize the root mean square error (RMSE) in a regression model. Here are the general steps for using gradient descent to reduce RMSE:
The cost function measures how well the regression model fits the data. In the case of RMSE, the cost function is the square root of the mean squared error (MSE).
The regression model typically includes one or more coefficients that need to be estimated and start by initializing the coefficients to some values.
The gradient of the cost function with respect to the coefficients gives the direction of steepest descent. Further, the gradient is calculated using partial derivatives.
Adjust the coefficients by moving in the direction of the negative gradient. The size of the adjustment is determined by the learning rate, which is a hyperparameter that needs to be tuned.
Finally, keep iterating until the cost function converges to a minimum.
In conclusion, by minimizing the cost function using gradient descent, the coefficients that minimize the RMSE between the predicted values and the actual values may be found. The goal is to find the coefficients that produce the lowest RMSE on the training data, and then evaluate the model on new data to see how well it generalizes.
At step 1504, the zero current rest patterns is calculated for different C rates based on the different unique RC branch values corresponding to the different values of the SoC.
The calculated zero current rest patterns are compared to actual zero current rest patterns (obtained in FIG. 11) to find RMSE for different SoCs and of different C rates at step 1506.
At step 1508, the RMSEs of different C rates of same SoCs are averaged to generate a single RMSE for the same SoCs.
Gradient descent is performed to lower the generated single RMSEs for all the SoCs at step 1510 to obtain a resultant set of the first and second RC branch values. The resultant set of the first and second RC branch values fits better for representing the cell model behaviour for a wide range of C rates.
FIG. 16 illustrates a flow chart for performing spline fitting. The flow chart 1600 is used for performing spline fitting is a continuation of 1500 and starts at 1602.
At step 1604, SoC vs voltage curves for C/20 charge (obtained in step 918 of FIG. 9) and discharge (obtained in step 922 of FIG. 9) are obtained.
From the SoC vs voltage curves, the voltage values at same SOCs for charge and discharge are averaged to obtain resultant voltage values at step 1606.
The resulting voltage values obtained after averaging are used to perform a spline fitting at step 1608.
Spline fitting is a mathematical technique used to approximate a function that passes through a set of given data points. It involves constructing a piecewise polynomial function, called a spline, that matches the data points as closely as possible.
The spline function is constructed by dividing the data range into smaller sub-intervals, and then constructing a polynomial function for each sub-interval. These polynomial functions are then joined together at the sub-interval boundaries in such a way that the resulting function is smooth and continuous across the entire data range.
The order of the polynomial function used to construct the spline depends on the number of data points and the desired degree of smoothness of the resulting curve. For example, a cubic spline uses a cubic polynomial function for each sub-interval, and is the most commonly used spline in practice.
The spline fitting process involves finding the coefficients of the polynomial functions that minimize the error between the spline and the data points. This may be done using various numerical optimization techniques, such as least-squares regression or constrained optimization.
Spline fitting has many applications in engineering, science, and data analysis. It is commonly used for curve fitting, interpolation, and extrapolation of data points, as well as for smoothing noisy data and removing outliers.
Spline fitting may be used in generating an Equivalent Circuit Model (ECM) of a cell by fitting the obtained function which represents open circuit voltage in terms of SoC.
The internal resistance calculated in FIG. 8, the resultant set of the first and second RC branch values of FIG. 15, and obtained function which represents open circuit voltage in terms of SoC of FIG. 16 are used to finally generate an Equivalent Circuit Model (ECM) of a cell.
Accordingly, blocks of the flow diagram support combinations of means for performing the specified functions and combinations of operations for performing the specified functions for performing the specified functions. It will also be understood that one or more blocks of the flow diagram, and combinations of blocks in the flow diagram, may be implemented by special purpose hardware-based computer systems which perform the specified functions, or combinations of special purpose hardware and computer instructions.
Many modifications and other embodiments of the inventions set forth herein will come to mind to one skilled in the art to which these inventions pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is to be understood that the inventions are not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims. Moreover, although the foregoing descriptions and the associated drawings describe example embodiments in the context of certain example combinations of elements and/or functions, it should be appreciated that different combinations of elements and/or functions may be provided by alternative embodiments without departing from the scope of the appended claims. In this regard, for example, different combinations of elements and/or functions than those explicitly described above are also contemplated as may be set forth in some of the appended claims. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.
It is to be understood that the above description is intended to be illustrative, and not restrictive. For example, the above-discussed embodiments may be used in combination with each other. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description.
With respect to the use of substantially any plural and/or singular terms herein, those having skill in the art may translate from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or application. The various singular/plural permutations may be expressly set forth herein for sake of clarity.
While the present invention has been described with reference to particular embodiments, it should be understood that the embodiments are illustrative and that the scope of the invention is not limited to these embodiments. Many variations, modifications, additions, and improvements to the embodiments described above are possible. It is contemplated that these variations, modifications, additions, and improvements fall within the scope of the invention.
TECHNICAL ADVANAGES OF THE INVENTION
The advantages of the present invention is providing a system and method for generating an Equivalent Circuit Model for a battery. The present invention particularly uses regression, RMSE and Gradient Descent technique for an accurate model. The invention provides better accuracy in SoC prediction due to model accuracy. Further, the commonly used state estimation algorithms such as Kalman and Particle may have an improved performance with a better Thevenin RC model
The present invention also provides for an accurate distance to empty prediction of an electric vehicle due to robust SoC prediction. Also achieved by the present invention is a higher accuracy in State of Power (SoP) prediction due to model accuracy.
Further, the invention minimizes occurrence of premature undervoltage and premature overvoltage cut off due to proper behaviour modelling helping in State of Power (SoP) prediction. In addition, the invention provides for accurate State of Health (SoH) prediction as the battery begins to age and thus provides better understanding in the degradation pattern of the Lithium ion battery. Also, typical SoH algorithms based on parameter estimation can perform better since the initialization of the parameter estimation algorithm may be accurate.
The present invention accurately predicts behaviour in high pulsating discharge and charging current, continuous high C rates charging and variety of C rates.
The benefits and advantages which may be provided by the present invention have been described above with regard to specific embodiments. These benefits and advantages, and any elements or limitations that may cause them to occur or to become more pronounced are not to be construed as critical, required, or essential features of any or all of the embodiments.
, Claims:CLAIMS
We Claim:
1. A method for generating an Equivalent Circuit Model of a cell comprising:
obtaining a first plurality of voltage patterns corresponding to a plurality of C rates of the cell using a first test;
obtaining a second voltage pattern of the cell using a second test;
comparing difference between the first plurality of voltage patterns and the second voltage pattern;
identifying zero current rest patterns for each of the first plurality of voltage patterns;
segregating zero current rest patterns for each of the first plurality of voltage patterns;
extracting longer time constant transient response from the segregated zero current rest patterns;
modeling longer time constant transient response from the segregated zero current rest patterns;
subtracting the longer time constant transient response from the zero current rest patterns for obtaining a resultant pattern;
computing second RC branches for a plurality of SoC with the resultant rest pattern; and
computing a RC branch value by averaging RC branches of each of the plurality of SoCs for the plurality of C rates.
2. The method of claim 1, further comprising:
calculating the zero current rest patterns for different C rates based on the RC branch values corresponding to the different values of the SoC; and
comparing calculated zero current rest patterns to the segregated zero current rest patterns.
3. The method of claim 2, further comprising:
calculating a plurality of RMSEs for each of the plurality of SoCs for the plurality of C rates; and
averaging the plurality of RMSEs for each of the plurality SoC to generate a RMSE for each of the plurality of SoCs.
4. The method of claim 3, further comprising, performing gradient descent to optimize the RMSE for the plurality of SoCs.
5. The method of claim 1, further comprising:
obtaining SoC versus voltage curves;
averaging voltage values, from the SoC versus voltage curves for the SoCs to obtain resultant voltage values; and
performing a spline fitting using the resultant voltage values.
6. The method of claim 1, further comprising, computing first RC branches for a plurality of SOC from the modelled longer time constant transient response.
7. A computer system for generating an Equivalent Circuit Model of a cell, the computer system comprising, one or more computer processors, one or more computer readable memories, one or more computer readable storage devices, and program instructions stored on the one or more computer readable storage devices for execution by the one or more computer processors via the one or more computer readable memories, the program instructions comprising:
obtaining a first plurality of voltage patterns corresponding to a plurality of C rates of the cell using a first test;
obtaining a second voltage pattern of the cell using a second test;
comparing difference between the first plurality of voltage patterns and the second voltage pattern;
identifying zero current rest patterns for each of the first plurality of voltage patterns;
segregating zero current rest patterns for each of the first plurality of voltage patterns;
extracting longer time constant transient response from the segregated zero current rest patterns;
modeling longer time constant transient response from the segregated zero current rest patterns;
subtracting the longer time constant transient response from the zero current rest patterns for obtaining a resultant pattern;
computing second RC branches for a plurality of SoC with the resultant rest pattern; and
computing a RC branch value by averaging RC branches of each of the plurality of SoCs for the plurality of C rates.
8. The system of claim 7, further comprising:
calculating the zero current rest patterns for different C rates based on the RC branch values corresponding to the different values of the SoC; and
comparing calculated zero current rest patterns to the segregated zero current rest patterns.
9. The system of claim 8, further comprising:
calculating a plurality of RMSEs for each of the plurality of SoCs for the plurality of C rates; and
averaging the plurality of RMSEs for each of the plurality SoC to generate a RMSE for each of the plurality of SoCs.
10. The system of claim 9, further comprising, performing gradient descent to optimize the RMSE for the plurality of SoCs.
11. The system of claim 7, further comprising:
obtaining SoC versus voltage curves;
averaging voltage values, from the SoC versus voltage curves for the SoCs to obtain resultant voltage values; and
performing a spline fitting using the resultant voltage values.
12. The system of claim 7, further comprising, computing first RC branches for a plurality of SOC from the modelled longer time constant transient response.