Description:BACKGROUND
[0001] Circuit boards are ubiquitous in modern electronics. Circuit boards can connect various components, such as voltage regulators and integrated circuit components. Circuit boards can have a large number of connections in multiple layers connecting different components. In some cases, a circuit board can have a high-speed signal trace and a component such as a voltage regulator. In order to prevent or mitigate noise from the voltage regulator, the high-speed signal trace may be routed far away from the voltage regulator. In some cases, a circuit board can have exposed power planes that can cause radiofrequency interference. To prevent or mitigate interference from power planes, circuit board layers and or/shielding component may be required.

BRIEF DESCRIPTION OF THE DRAWINGS
[0002] FIG. 1 is an isometric view of a system with a substrate and several inductors mounted on the substrate.
[0003] FIG. 2 is a top-down view of the system of FIG. 1.
[0004] FIG. 3 is a cross-sectional view of the substrate of FIG. 1.
[0005] FIG. 4 is a graph showing voltage noise as a function of distance with and without a shielding layer.
[0006] FIG. 5 is a graph showing voltage noise as a function of distance with and without a shielding layer.
[0007] FIG. 6 is a flowchart of one embodiment of a method of creating the system of FIG. 1.
[0008] FIG. 7 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0009] FIG. 8 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0010] FIG. 9 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0011] FIG. 10 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0012] FIG. 11 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0013] FIG. 12 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0014] FIG. 13 is a cross-sectional view of one embodiment of a system at one stage of the flowchart of FIG. 6.
[0015] FIG. 14 illustrates an embodiment of a block diagram for a compute system that may include the system of FIG. 1.

DETAILED DESCRIPTION
[0016] In various embodiments disclosed herein, a substrate may support one or more inductors and one or more integrated circuit components. The substrate may have a solder mask layer and a silk screen layer, with the silk screen layer including one or more conductive shield regions. The conductive shield regions may be made out of conductive ink. The conductive shield regions may be below and/or around the inductors. The conductive shield regions can partially shield traces in the substrate from noise induced by the inductors, reducing noise on the traces. In some embodiments, the conductive shield regions may be above and/or near surface power planes, reducing radiofrequency interference (RFI) from the power planes.
[0017] As used herein, the phrase “communicatively coupled” refers to the ability of a component to send a signal to or receive a signal from another component. The signal can be any type of signal, such as an input signal, an output signal, or a power signal. A component can send or receive a signal to another component to which it is communicatively coupled via a wired or wireless communication medium (e.g., conductive traces, conductive contacts, air). Examples of components that are communicatively coupled include integrated circuit dies located in the same package that communicate via an embedded bridge in a package substrate and an integrated circuit component attached to a printed circuit board that send signals to or receives signals from other integrated circuit components or electronic devices attached to the printed circuit board.
, C , C , Claims:A circuit board comprising:
a substrate comprising one or more layers;
a solder mask, wherein a bottom surface of the solder mask is adjacent a top surface of the substrate; and
one or more conductive regions adjacent a top surface of the solder mask.