DESC:TECHNICAL FIELD
The present disclosure relates to the field of multiphase inverter. More particularly, the disclosure relates to a multiphase inverter with symmetrically placed half bridges and method for optimizing inverter performance.
BACKGROUND
A multiphase inverter is an electrical system designed to convert direct current (DC) voltage into an alternating current (AC) source. This conversion is essential for powering electrical systems that require AC for operation. The output of the multiphase inverter can be utilized to control electrical machines, such as motors, and serve as a power source for various other electrical systems.
A conventional inverter circuit typically consists of several key components, including a DC-DC converter, a microcontroller for control, analog and digital circuits, gate drivers, and half bridges. In high-power applications, power switches are connected in parallel to manage increased current flow while ensuring the thermal stability of the inverter. This design allows the circuit to efficiently handle high-power demands without compromising performance. The conventional inverter circuit often employs an asymmetrical layout, where the half bridges are positioned at varying distances from the microcontroller, resulting in non-equidistant trace lengths. This layout, while functional, can introduce complexities in signal timing and power distribution, potentially impacting overall efficiency and system reliability.
The non-equidistant lengths between the half bridges and the microcontroller lead to a time shift in signal propagation, which affects the synchronization of signals from the microcontroller to the half bridges. This issue becomes more pronounced when the inverter module size is scaled up by paralleling additional switches to handle higher currents in power-intensive applications. The asymmetrical layout introduces both static and dynamic asymmetries in the control signal, which disrupts commutation timing. Longer signal traces create loop inductance, resulting in voltage ringing, an undesirable oscillation during switching operations. Furthermore, the performance of the inverter degrades at high switching frequencies due to these asymmetries, as the uneven heat distribution caused by the layout increases thermal stress on certain components. These factors collectively pose risks of unexpected behaviour, making the conventional asymmetrical layout less reliable for high-power, high-frequency applications.
Therefore, there is a need for technology that to address the limitations of prior art by associated with the asymmetrical layout in the inverter circuit to optimize inverter performance minimize energy consumption, provide uniform heat distribution, and provides enhanced control capabilities.
SUMMARY
In one aspect of the present disclosure, a multiphase inverter with symmetrically placed half bridges is provided.
A circuit for an inverter unit, wherein the microcontroller unit with a closed loop motor control is configured to monitor voltage and current waveforms for feedback and operate each half-bridge to drive a motor. A one or more of half-bridge configured to convert Direct Current (DC) into Alternating Current (AC). Furthermore, one or more of trace connections between the microcontroller and the one or more half-bridge, wherein each trace connection has an equidistant length from the microcontroller to each respective half-bridge. Wherein the equidistant trace lengths eliminate time shifts in signal propagation from the microcontroller to the half-bridge, such that switching signals arrive at the half-bridge circuits simultaneously for synchronized switching operation.
In some aspect of the present disclosure, the inverter unit further comprises a Direct Current to Direct Current (DC-DC) converter including a feedback loop configured to regulate output voltage or current based on user-defined parameters.
In some aspect of the present disclosure, the microcontroller is programmed with control operations selected from the group consisting of proportional-integral-derivative (PID) control, field-oriented control (FOC), and space vector modulation (SVM) for dynamic inverter control.
In some aspect of the present disclosure, the inverter unit further comprises an analog and digital circuit configured to process continuous and discrete electrical signals for the inverter unit.
In some aspect of present disclosure, the analog and digital circuit includes a plurality of sensors for monitoring inverter parameters such as speed, temperature, and current, and providing feedback to the microcontroller for closed-loop control.
In some aspect of the present disclosure, the inverter unit further includes gate drivers configured to provide high-speed switching signals to the half-bridge circuits for efficient inverter control.
In some aspect of the present disclosure, the inverter unit further comprising a protection circuit configured to detect fault conditions including overvoltage, undervoltage, overcurrent, and short circuit, and trigger protective measures to prevent inverter damage.
In some aspect of the present disclosure, the power switches in the half-bridge are selected from high-performance devices including insulated gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), or silicon carbide (SiC) devices.
In some aspect of the present disclosure, the microcontroller includes communication interfaces selected from Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), and Universal Asynchronous Receiver-Transmitter (UART) for integration with external devices.
In some aspect of the present disclosure, the half bridges are placed around the microcontroller in any form of shapes not limited to Triangle, Square, Rhombus.

BRIEF DESCRIPTION OF DRAWINGS
The accompanying drawings, which are incorporated in and constitute a part of this specification, show certain aspects of the subject matter disclosed herein and together with the description, help explain some of the principles associated with the disclosed implementations. In the drawing,
Figure 1 illustrates an asymmetrical module layout with non-equidistant trace lengths, in accordance with an aspect of the conventional multiphase inverter circuit;
Figure 2 illustrates a symmetrical module layout with equidistant trace lengths, in accordance with an aspect of the present disclosure; and
Figure 3 illustrates a block diagram of multiphase inverter with symmetrically placed half bridges, in accordance with an aspect of the present disclosure.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Various embodiments of the disclosure are discussed in detail below. While specific implementations are discussed, it should be understood that this is done for illustration purposes only. A person skilled in the relevant art will recognize that other components and configurations may be used without parting from the spirit and scope of the disclosure. Thus, the following description and drawings are illustrative and are not to be construed as limiting. Numerous specific details are described to provide a thorough understanding of the disclosure. However, in certain instances, known details are not described in order to avoid obscuring the description.
References to one or an embodiment in the present disclosure can be references to the same embodiment or any embodiment; and such references mean at least one of the embodiments.
Reference to "one embodiment", "an embodiment", “one aspect”, “some aspects”, “an aspect” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Moreover, various features are described which may be exhibited by some embodiments and not by others.
The terms used in this specification generally have their ordinary meanings in the art, within the context of the disclosure, and in the specific context where each term is used. Alternative language and synonyms may be used for any one or more of the terms discussed herein, and no special significance should be placed upon whether or not a term is elaborated or discussed herein. In some cases, synonyms for certain terms are provided.
A recital of one or more synonyms does not exclude the use of other synonyms.
The use of examples anywhere in this specification including examples of any terms discussed herein is illustrative only and is not intended to further limit the scope and meaning of the disclosure or of any example term. Likewise, the disclosure is not limited to various embodiments given in this specification. Without intent to limit the scope of the disclosure, examples of instruments, apparatus, methods and their related results according to the embodiments of the present disclosure are given below. Note that titles or subtitles may be used in the examples for convenience of a reader, which in no way should limit the scope of the disclosure. Unless otherwise defined, technical and scientific terms used herein have the meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. In the case of conflict, the present document, including definitions will control.
Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or can be learned by practice of the herein disclosed principles. The features and advantages of the disclosure can be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the disclosure will become more fully apparent from the following description and appended claims or can be learned by the practice of the principles set forth herein.
As mentioned before, there is a need for technology that overcomes these drawbacks, in multiphase inverter with symmetrically placed half bridges. The present disclosure aims to a multiphase inverter with symmetrically placed half bridges, ensuring equidistant trace lengths between the microcontroller and half bridges. This design eliminates time shift in signal propagation, improving inverter performance, efficiency, and heat distribution. It is ideal for high-power applications like electric vehicles and solar power systems.
Figure 1 illustrates an asymmetrical module layout with non-equidistant trace lengths, in accordance with an aspect of the conventional multiphase inverter circuit. Herein after a circuit for an inverter unit 100 is referred to as circuit 100. The circuit 100 includes a microcontroller 102, one or more gate drivers 108 A-F, a first phase 110, a second phase 112, and third phase 114. In the conventional circuit 100, a power switches are connected in parallel for handling more current in high power applications and ensuring thermal stability of the inverter. In conventional method, this is implemented in an inverter circuit with asymmetrical layout.
In one aspects of the present disclosure, in the asymmetrical layout, the half bridges 108 A-F are placed at non equidistant trace lengths from the microcontroller 102. A first trace length 104 which is longest trace length. The first trace length 104 is between the microcontroller 102 and the half bridges 108 A-F.
In one aspects of the present disclosure, a second trace length 106 which is shortest trace length. The second trace length 106 is between the half bridges 108 A-F and phase 110 (power switch). Like wise the half bridges 108 A-F are connected to second phase 112 & third phase 114 with the second trace length 106. The phase 110, phase 112 and phase 114 are power switches and are connected in parallel.
In some aspects of the present disclosure, the non-equidistant lengths from the half bridges 108A-F to the microcontroller 102 results in time shift of signal propagation from the microcontroller 102 to the half bridges 108A-F. The above-mentioned problem worsens when module size is scaled up by paralleling more switches to handle more current for higher power applications. The asymmetrical layout causes static and dynamic asymmetries of the control signal resulting in shifting of commutation timing. A loop inductance in the longer signal trace length causes voltage ringing (an unwanted oscillation of a voltage) during switching. Also, the asymmetrical layout degrades inverter performance at high switching frequencies. The asymmetrical layout has uneven heat distribution.
Figure 2 illustrates a symmetrical module layout with equidistant trace lengths, in accordance with an aspect of the present disclosure. The circuit 200 includes a microcontroller 202, one or more gate drivers 216 A-F, a first trace length 204, a second trace length 206, a third trace length 208, a phase 210, a phase 212 and a phase 214.
In one aspects of the present disclosure, the circuit 200 includes the micro controller 202 with a closed loop motor control is configured to monitor voltage and current waveforms for feedback and operate each half-bridge to drive a motor.
In some aspect of the present disclosure, the micro-controller 202 may include non-volatile memory to store inverter control parameters, operation logs, and configuration settings, facilitating reconfiguration and ensuring data persistence during power cycles or system resets.
In some aspect of the present disclosure, the micro-controller 202 may be programmed with control operations, including but not limited to proportional-integral derivative (PID) control, field-oriented control (FOC), or space vector modulation (SVM), for inverter control and dynamic response.
In some aspect of the present disclosure, the micro-controller 202 may be equipped with communication interfaces, such as Serial Peripheral Interface (SPI), Inter- Integrated Circuit (I2C), or Universal Asynchronous Receiver-Transmitter (UART), enabling seamless integration with external devices and control systems.
In some aspect of the present disclosure, the inverter may include gate drivers and half bridges 216A-F. The gate drivers 216A-F in the inverter may be configured to provide high-speed switching signals to the half bridges for efficient inverter control.
In some aspect of the present disclosure, the inverter may include a protection circuit that detects fault conditions, such as overvoltage, undervoltage, overcurrent, and short circuit, and triggers appropriate protective measures to prevent inverter damage.
In some aspect of the present disclosure, the micro-controller 202 and the half bridges 216 A-F may be placed at an equidistant trace length to form symmetrical layout and eliminate time shift in signal propagation from the microcontroller 202 to the half bridges 216 A-F in switching operations.
In some aspect of the present disclosure, the phase 210, phase 212 and phase 216 are power switches. The power switches in the inverter circuit may be implemented by the way of high-performance insulated gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), or silicon carbide (SiC) devices capable of handling higher currents and voltages, making it suitable for high-power inverter applications.
Figure 3 illustrates a block diagram of multiphase inverter with symmetrically placed half bridges, in accordance with an aspect of the present disclosure. A circuit 300 may include a Direct Current to Direct Current (DC-DC) convertor 302, an analog and digital circuit 304, an inverter circuit 306, and a micro-controller 308 to control the operation of the circuit 300.
In some aspect of the present disclosure, the Direct Current to Direct Current (DC-DC) converter 302 may include a feedback loop to regulate the output voltage or current based on user-defined parameters.
In some aspect of the present disclosure, the analog and digital circuit 304 may be configured to process the continuous and discrete electrical signals in the circuit 300.
In some aspect of the present disclosure, the analog and digital circuit 304 may include a plurality of sensors for monitoring inverter parameters, including but not limited to speed, temperature, and current, and providing feedback to the micro-controller for closed-loop control.
In some aspect of the present disclosure, the circuit 300 may include gate drivers and half bridges 310. The circuit 300 may be configured to convert the Direct Current (DC) current into Alternate Current (AC) current.
In some aspect of the present disclosure, the gate drivers 310 in the circuit 300 may be configured to provide high-speed switching signals to the half bridges for efficient inverter control.
In some aspect of the present disclosure, the inverter 306 may include a protection circuit that detects fault conditions, such as overvoltage, undervoltage, overcurrent, and short circuit, and triggers appropriate protective measures to prevent inverter damage.
In some aspect of the present disclosure, the micro-controller 308 may be coupled with a DC-DC convertor 302, analog and digital circuit 304, and the inverter 306.
In some aspect of the present disclosure, the micro-controller 308 may be programmed with control operations, including but not limited to proportional-integral derivative (PID) control, field- oriented control (FOC), or space vector modulation (SVM), for inverter control and dynamic response.
In some aspect of the present disclosure, the micro-controller 308 may be equipped with communication interfaces, such as Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), or Universal Asynchronous Receiver-Transmitter (UART), enabling seamless integration with external devices and control systems.
In some aspect of the present disclosure, the micro-controller 308 and the half bridges 310 may be placed at an equidistant trace length to form symmetrical layout and eliminate time shift in signal propagation from the microcontroller 308 to the half bridges 310 in switching operations.
In some aspect of the present disclosure, the power switches in the circuit 300 may be implemented by the way of high-performance insulated gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), or silicon carbide (SiC) devices capable of handling higher currents and voltages, making it suitable for high-power inverter applications.
In some aspect of the present disclosure, the micro-controller 308 with a closed loop motor control is configured to monitor voltage and current waveforms for feedback and operate each half-bridge to drive a motor.
In some aspect of the present disclosure, the micro-controller 308 may include non-volatile memory to store inverter control parameters, operation logs, and configuration settings, facilitating reconfiguration and ensuring data persistence during power cycles or system resets.
In some aspect of the present disclosure, the DC-to-DC converter 302 is an electronic circuit in this disclosure of multiphase inverter that converts a source of direct current (DC) from one voltage level to another. The converted voltage is then given as an input to the LDO 314 (Low Dropout Regulator), it is a linear regulator that generates a regulated input voltage which is used to operate all other circuit sections of the disclosure. The microcontroller 308 of the circuit 300 is used to generate digital signals that in turn are used to operate the Gate driver, half bridge circuits 310.
In some aspect of the present disclosure, the gate driver and half bridges 310 are used to drive high current inputs. The gate driver is a power amplifier that accepts a low-power input from a controller IC and produces a high-current drive input for the gate of a high-power transistor such as an IGBT or power MOSFET. The half bridges are used in controlling the speed and direction of motors by modulating the voltage and current supplied. The digital signals from gate driver and half bridges 310 are given to the inverter circuit 306. The inverter circuit 306 is used to convert the DC signals to AC which in turn is connected to the motor 316. The motor 316 may be BLDC motor. In this disclosure the inverter designed is a multiphase inverter. They can handle multiple AC outputs and are capable of handling higher levels of power compared to single- or three-phase inverters.
In some aspect of the present disclosure, the circuit 300 of this disclosure is constructed with two from of boards namely controller board and power board. The controller board consists of a microcontroller 308 and analog and digital circuit 304, half bridge 310, DC-DC converter 302 circuits and whereas the power board consists of an inverter circuit 306. The layout construction and the mounting or Interfacing of the power board and controller board are made in such a way that the micro-controller 308 and the half bridges 310 are placed at an equidistant trace length.
In some aspect of the present disclosure, instead of placing the half bridges 310 in a straight line near the microcontroller 308, the half bridges 310 can be placed around the microcontroller 308 in any form of shapes like Triangle, Square, Rhombus etc., to make this disclosure of multiphase inverter circuit with symmetrically placed half bridges.
In some aspect of the present disclosure, the power board and controller board are mounted one over the other to form the interfacing between the microcontroller 308 and half bridges 310 using Board to Board connectors
Advantages:
• The present disclosure provides an inverter unit that is scaled up while maintaining the equidistant trace lengths from microcontroller to half bridges.
• The present disclosure offers improved inverter performance during operations at higher switching frequencies.
• The present disclosure facilitates ease of assembly and is easily repairable.
• The present disclosure simplifies the routing of power connections to the terminals and allowing high-power tracks to be separated from the control circuit PCB
• In the present disclosure, the use of busbars or copper strips of various dimensions is facilitated for efficient current carrying capacity.
• In the present disclosure, the interconnection between the control circuit and the half bridges can be established through various methods.
• In the present disclosure, the layout ensures even heat distribution and enables rapid heat absorption by the heatsink. Additionally, provisions for forced cooling near the devices can be implemented using various methods.

The implementation set forth in the foregoing description does not represent all implementations consistent with the subject matter described herein. Instead, they are merely some examples consistent with aspects related to the described subject matter. Although a few variations have been described in detail above, other modifications or additions are possible. In particular, further features and/or variations can be provided in addition to those set forth herein. For example, the implementation described can be directed to various combinations and sub combinations of the disclosed features and/or combinations and sub combinations of the several further features disclosed above. In addition, the logic flows depicted in the accompanying figures and/or described herein do not necessarily require the particular order shown, or sequential order, to achieve desirable results. Other implementations may be within the scope of the following claims.
,CLAIMS:1. A circuit for an inverter unit (200), comprising;
a microcontroller unit (202) , wherein the microcontroller unit (202) with a closed loop motor control is configured to monitor voltage and current waveforms for feedback and operate each half-bridge to drive a motor;
the one or more half-bridge (216 A-F) configured to convert Direct Current (DC) into Alternating Current (AC);
a one or more traces (204, 206, 208) connections between the microcontroller (202) and the one or more half-bridge (216 A-F), wherein each trace connection has an equidistant length from the microcontroller (202) to each respective half-bridge (216),
wherein the equidistant trace lengths eliminate time shifts in signal propagation from the microcontroller (202) to the half-bridge (216 A-F), such that switching signals arrive at the half-bridge (216) circuits simultaneously for synchronized switching operation.
2. The circuit for the inverter unit (200) as claimed in claim 1, wherein the inverter unit (200) further comprises a Direct Current to Direct Current (DC-DC) converter including a feedback loop configured to regulate output voltage or current based on user-defined parameters.
3. The circuit for the inverter unit (200) as claimed in claim 1, wherein the microcontroller (202) is programmed with control operations selected from the group consisting of proportional-integral-derivative (PID) control, field-oriented control (FOC), and space vector modulation (SVM) for dynamic inverter control.
4. The circuit for the inverter unit (200) as claimed in claim 1, wherein the inverter unit (200) further comprises an analog and digital circuit configured to process continuous and discrete electrical signals for the inverter unit (200).
5. The circuit for the inverter unit (200) as claimed in claim 1, wherein the analog and digital circuit includes a plurality of sensors for monitoring inverter parameters such as speed, temperature, and current, and providing feedback to the microcontroller (202) for closed-loop control.
6. The circuit for the inverter unit (200) as claimed in claim 1, wherein the inverter unit (200) further includes gate drivers configured to provide high-speed switching signals to the half-bridge (216 A-F) circuits for efficient inverter control.
7. The circuit for the inverter unit (200) as claimed in claim 1, wherein the inverter unit (200) further comprises a protection circuit configured to detect fault conditions including overvoltage, undervoltage, overcurrent, and short circuit, and trigger protective measures to prevent inverter damage.
8. The circuit for the inverter unit (200) as claimed in claim 1, wherein the power switches in the half-bridge (216 A-F) are selected from high-performance devices including insulated gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), or silicon carbide (SiC) devices.
9. The circuit for the inverter unit (200) as claimed in claim 1, wherein the microcontroller (202) includes communication interfaces selected from Serial Peripheral Interface (SPI), Inter-Integrated Circuit (I2C), and Universal Asynchronous Receiver-Transmitter (UART) for integration with external devices.
10. The circuit for the inverter unit (200) as claimed in claim 1, wherein the half bridges (216 A-F) is placed around the microcontroller (202) in any form of shapes not limited to Triangle, Square, Rhombus