Sign In to Follow Application
View All Documents & Correspondence

Unified Architecture Of Qtl Block Cipher For Rfid Applications

Abstract: The lightweight cryptographic algorithms are immensely important for secure communication between resource-constrained devices. The hardware architectures of these algorithms were implemented on FPGA and/or ASIC platforms. However, design modification and resource optimization for these lightweight algorithms are still an open issue. QTL is a lightweight block cipher, performs two operations data path processing and key scheduling. This block cipher serves inputs of 64-bits plaintext & 64-/128-bits master keys and produces output of 64-bits cipher text. As all other lightweight block ciphers are implemented only encryption algorithm for one key variant, area footprint is less. However, unified architecture results are for all key variants of QTL cipher such as 64-bitsand 128-bits. Hence, unified architecture provided the flexibility to use a variant of any key sizes according to the required multiple security levels. Due to this, hardware requirement is large but invented architecture achieved high throughput compared to other lightweight block ciphers as well as previous method of QTL cipher. Hence, the invented architecture was found suitable for high throughput RFID applications to transform secure information through the internet by enabling devices for communication and computing process. 4 claims & 3 Figures

Get Free WhatsApp Updates!
Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
13 October 2023
Publication Number
42/2023
Publication Type
INA
Invention Field
COMMUNICATION
Status
Email
Parent Application

Applicants

MLR Institute of Technology
Laxman Reddy Avenue, Dundigal-500043

Inventors

1. Dr. Pulkit Singh
Department Electronics and Communication Engineering, MLR Institute of Technology, Laxman Reddy Avenue, Dundigal-500043
2. Dr. Rajan Singh
Department Electronics and Communication Engineering, MLR Institute of Technology, Laxman Reddy Avenue, Dundigal-500043
3. Dr. Kiran Chand Ravi
Department Electronics and Communication Engineering, MLR Institute of Technology, Laxman Reddy Avenue, Dundigal-500043
4. Dr. T. S. Arulananth
Department Electronics and Communication Engineering, MLR Institute of Technology, Laxman Reddy Avenue, Dundigal-500043

Specification

Description:Field of Invention
The present invention is QTL (a lightweight block cipher) that provides multiple security levels in resource-constrained applications such as Radio Frequency Identification (RFID). QTL encrypts 64-bits plaintext with two key sizes of 64-bits, and 128-bits producing 64-bits ciphertext.

The objectives of this invention

For secure communication between resource-constrained devices, lightweight cryptographic algorithms are immensely important. The hardware architectures of these algorithms were implemented on FPGA and/or ASIC platforms. However, design modification and resource optimization for these lightweight algorithms are still an open issue. QTL is a lightweight block cipher, performs two operations datapath processing and key scheduling. This block cipher serves inputs of 64-bits plaintext & 64-/128-bits master keys and produces output of 64-bits ciphertext. As all other lightweight block ciphers are implemented only encryption algorithm for one key variant, area footprint is less. However, unified architecture results are for all key variants of QTL cipher such as 64-bits, and 128-bits. Hence, unifiedarchitecture provided the flexibility to use a variant of any key sizes according to the required multiple security levels. Due to this, hardware requirement is large but invented architecture achieved high throughput compared to other lightweight block ciphers as well as previous method of QTL cipher. Hence, the invented architecture was found suitable for high throughput RFID applications to transform secure information through the internet by enabling devices for communication and computing process.

Background of the invention
Cryptography plays a significant role in making secure communication. It is used to send information or message in a secure way to protect it from unauthorized access Cryptography is the study of statistical procedures inter-related to information security characteristics such as confidentiality, non-repudiation, data integrity, and authentication. It involves two processes namely, encryption and decryption to secure the data while transmission through the channels. Ciphers are data encrypting technique that involves several processes to protect the hidden information during data transmission. Using these methodologies, data can be barred from meticulous attacks. Lightweight cipher techniques are more preferable for low-resource devices because of their limited computing power. Moreover, block cipher techniques play a very important role in security of such devices.
Conclusively, various lightweight block ciphers have been developed in recent past. The hardware of these ciphers was implemented on FPGA and/or ASIC platforms. However, design modification and resource optimization for these lightweight ciphers are still an open issue. Some of the current ciphers such as HIGHT, PRESENT, QTL, KATAN/ KTANTAN, LBlock, MIBS, Piccolo, Rectangle, PRINCE, SFN, Twine, and MISTY1 are lightweight algorithms specially designed for resource-constrained applications. The hardware implementation is mainly motivated by bringing optimization of lightweight primitives such as area, power, and speed. Different design techniques are developed to rework the designs for different applications. With the implementation of many techniques, the speed of cryptographic algorithms can be increased. One approach is to implement parallel modular exponentiation computations for large pieces of data. Other strategy is to add pipeline registers in the architecture of the hardware. Several works have proposed pipeline techniques in self-controller architecture. Moreover, parallel data transmission processing lines have also been introduced to increase the speed of the m-Crypton algorithm whereas pipelined design can also increase the speed/ throughput of cryptographic algorithm (H. E. Michail, G. S. Athanasiou, V. I. Kelefouras, G. Theodoridis, T. Stouraitis, and C. E. Goutis, “Area-throughput trade-offs for SHA-1 and SHA-256 hash functions’ pipelined designs,” Journal of Circuits, Systems and Computers, vol. 25, no. 4, pp. 1–26, 2016). A brief description presented about cryptographic architecture that incorporates different efficient models (H. D. Azari and D. P. V Joshi, “An efficient implementation of present cipher model with 80 bit and 128 bit key over FPGA based hardware architecture,” International Journal of Pure and Applied Mathematics, vol. 119, no. 14, pp. 1825–1832, 2018). Azari et al proposed architecture for PRESENT cipher that includes encryption process as well as decryption process by means of 64-bits input data security using 80-bits and 128-bits keys at different hardware levels.
The number of previous hardware implementations of lightweight block ciphers have been presented on FPGA platform. QTL block cipher has a block length of 64 bits and is quite lightweight. According to key size, the number of encryption rounds is decided. It takes 16 rounds to encrypt a key with 64 bits, whereas 20 rounds are needed for a key with 128 bits. When creating round subkeys, the authors didn't apply any kind of key scheduling technique. In doing so, the cipher's hardware requirements are decreased, and the amount of energy used is decreased (L. Li, B. Liu and H. Wang “QTL: a new ultra-lightweight block cipher,” Microprocessors and Microsystems, vol. 45, pp.45–55). In (B. Rashidi, “Flexible structures of lightweight block ciphers PRESENT, SIMON and LED,” IET Circuits, Devices & Systems, vol. 14, no. 3, pp. 369-380), Rashidi et al have developed a flexible architecturefor lightweight block ciphers PRESENT, SIMON and LED suitable for constrained devices. From these implementations one can see that there was slight decrease in area but throughput was reduced tremendously when design moved from low-bit key implementation to high-bit key implementation. It was caused by an increase in the amount of control signals. As a result, these adaptable designs will be beneficial in applications such as the Internet of Things (IoT). The Internet of Things (IoT) is a network that connects embedded objects like sensors that can generate, interact with, and share data with one another. There are numerous applications for the Internet of Things, including e-health, e-commerce, smart homes, smart cities, smart hospitals, and so on. These devices transmit massive amounts of data. These applications are optimized and advanced by building new IoT-based devices and solutions.
Description of Prior Art
The study of securing communications and data is known as cryptography. The fast advancement and application of telecommunications technology in recent years has increased the significance of cryptographic systems. More and more private data is being transmitted through telecommunications networks and kept on file servers. This data includes everything from financial data to computerized voting. A data encryption method can be used to encrypt an n-bit block of input across a number of rounds; n is preferably 128 bits or greater. In contrast to the linear combination function, which combines two different one-to-one rounds, each of which is determined by a predefined number of bits in a memory for storing and loading sections, the bit-moving function can rotate, shift, or bit-permute round sections by predetermined numbers of bits, preferably to achieve active and effective fixed rotation. Nonlinear functions include S-boxes and variable rotation functions. Typically, each round uses a subkey combining function to create new round sections by joining a round Segment and a subkey section. (US6182216B1). The system and method for verifying a lightweight security protocol for a specific type of radio frequency identification equipment were disclosed in the past invention, this system included server end, read write line end and the electronic tag being sequentially connected with, wherein: server end, for creating and store read write line information table and tag resolution information table, and for setting up communication connection so that read write line to be certified to be authenticated with read write line end;read write line end, in the read write line information table stored by server end in the Original Equipment Manufacturer (OEM) configuration data of the radio-frequency module of corresponding information write valid reader, and for setting up communication connection to be authenticated read write line to be certified with server end; Electronic tag, was used for being arranged on corresponding product, to be identified corresponding product. The prior invention was a compact security protocol verification system and method for radio frequency identification equipment that could overcome the limitations of the prior art, such as its limited applicability and high energy consumption, and achieve the benefits of good safety and low energy consumption. (CN103281189B).
For a general-purpose CPU, an adaptable AES instruction set is offered. The instruction set contains instructions for key generation as well as a "one round" pass for AES encryption or decryption. When generating keys for 128/192/256-bit keys, an immediate can be used to specify the key size and a round number. Because tracking of implicit registers is not necessary, the flexible AES instruction set permits full use of pipelining capabilities. (US9641320B2).In the invention, the work was generally focused on a lightweight cryptographic engine (LCE). Data confidentiality and/or integrity were assured at a device and/or during transmission from or to the device using an LCE configured to implement one or more cryptographic primitives, also known as crypto primitives. The LCE's primary function is to offload cryptographic operations from a host system and implement the cryptographic primitive (s) within a confined size (for example, die area) and power budget. The restrictions were applicable to, say, a system that utilized the LCE. The system can, for instance, be a device from the Internet of Things (IoT). (US9773432B2). By utilizing an error coefficient and a chain block hash, the security service equipment and method described in the invention offered lightweight security. To create an encryption key, it was utilized to synchronize time with the terminal. This made it more challenging to secure security for a blockchain-based encryption key as well as security for communication with terminals. The encryption key of the terminal was generated as a hash through the hash algorithm in accordance with the invention to ensure the security of the communication session between the service-providing apparatus and the terminal. To create a symmetrical encryption, the hash was created using data from the other terminal's encryption key that was kept in the blockchain. (US20200213106A1).

Summary of Invention
According to requirement, this architecture is capable to handle multiple levels of security. By changing the control input, key scheduling algorithm can work any one of three key variants into a single design. Hence, unified architecture provides the flexibility to use a variant of key sizes according to the required security level.

Detailed description of the invention
Smart devices are increasingly using the Internet. The internet has connected the entire world, and even homes are starting to have smart locks, smart TVs, smart phones, PCs, and other devices. At the moment, these appliances are being watched online. The internet also allows for remote operation of refrigerators and air conditioners. Many customers are eager to adopt these IoT applications in order to support improved transportation, healthcare, and lifestyle options. In order to encourage the adaptation process for all smart applications, IoT must offer suitable protection and numerous levels of security.
The unified hardware architecture helps to create a more secure design. Area is a more important aspect than security in some RFID security applications, such as supply chain management and asset tracking. These gadgets use radio waves to recognize a variety of items and collect data from the database. By choosing a 64-bit key schedule, the invented design assigns a less secure technique. However, some RFID applications, such as contactless payment and counterfeit protection, require greater security than others. These devices store confidential information that intruders shouldn't have access to. By choosing a key mechanism with 128 bits, the unified design increases security. Consequently, the user is given the choice of selecting various security settings in accordance with their needs.
Now let us discuss about key updating part. First of all, the given input master key will be padded by zeroes to make it length of 128-bit if the key length is below 128-bit. After that, the first word will be left shifted by 3-bits and fourth word is left shifted by 8-bits in key length of 96 and 128 bits, respectively. This can be made very easily by using multiplexers in the unifiedarchitecture. The input master key will be given to the multiplexers according to the key lengths of 64, 96, and 128 bits. The output of the multiplexers will be selected by using select line provided for different selection of keys as shown in Figure.
FIG. 2 depicts a typical RFID architecture in which access control over "things" is obtained by innovative design. With the help of smart sensor RFID tags, actuators, and network connectivity, these devices are equipped with the ability to exchange, collect, and send data to a server. Examples of such applications include dependable and secure access to mobile devices, cloud databases, ATMs, and smart buildings. A senior citizen can also update the IoT healthcare system about their health status by logging in. In IoT applications, security levels differ in accordance with the availability of hardware resources and strength of security. Some appliances like smart buildings, smart phones, computers, ATMs etc., require high level of security. Here, security provided by 96-bits key is sufficient and appropriate. On the other hand, some systems like healthcare system, logistic and tracking applications etc., need low level of security. Therefore, 64-bits key security is enough and doesn't have large number of hardware resources. Hence, different applications in IoT can be connected with multiple security levels with limited hardware resources. The capacity to change system settings, such as key size, is referred to as flexibility. It is particularly important for applications with a variety of requirements. An excellent illustration of this is in IoT applications. Depending on the tasks they carry out, different levels of security will be needed by IoT devices and the systems that enable them. Depending on the degree of confidence in the sensors, the key size in a unified construction can vary within a reasonable range. High-speed computations are made possible in a less essential application by employing a less secure encryption technique (a shorter key). Encrypting sensitive network data, such as healthcare IoT applications, necessitates a greater level of security (a longer key). As a result, these adaptable architectures will be useful for Internet of Things (IoT) applications. The Internet of Things (IoT) is a network that connects embedded objects like sensors that can generate, interact with, and share data. Many applications exist for the Internet of Things, including e-health, e-commerce, smart homes, smart cities, smart hospitals, and so on. These devices transmit large amounts of information. Building new gadgets and solutions based on IoT systems optimizes and advances these applications.
Brief Description of Drawing
The List ofFigures, which are illustrated exemplary embodiments of the invention.
Figure 1 is an example of an embodiment of a hardware architecture that includes the invention;
Figure 2 is an example of used of invented architecture in IoT applications.
Figure 3 Performance of invention in terms of speed.
Detailed description of the drawing
As described above present invention relates to implement a single architecture for all available key sizes of QTL lightweight block cipher.
FIG. 1 shows the invented unified architecture of the QTL cipher.The fundamental architectures of the 64-bit and 128-bit key schemes and the unified architecture operate in an exact equivalent manner. This implies that the invented architecture accommodates both key sizes inside its own framework. The unified idea of key scheduling necessitates more space overhead. 2x1 multiplexers are responsible for this. In addition, the first input of the multiplexers does the 64-bit key operation, while the second input of the multiplexers performs encryption for the 128-bit key scheduling. Three sections—M1, M2, and M3—have seen the most significant alterations to the architecture. The unified architecture for encryption clearly operates in a manner identical to that of the QTL cipher's fundamental architecture. Only the choice of a crucial scheduling component is altered. As seen in the M1 section, one of the important scheduling strategies is chosen utilizing two multiplexers. When 'EN' is entered, a key scheduling option either 64 or 128 bits is available. 64-bits of key flow through the multiplexer when the 'EN' input is high. The LSB bit of COUNT determines whether the 128-bit key is transferred in round function using 64 bits from the MSB or 64 bits from the LSB side. The 8-bit counter known as COUNT manages the encryption process for a specific number of cycles. Additionally, it aids in the creation of constants for round functions. For creating constant values for two important scheduling techniques, Section M2 is introduced. Additionally, it chooses the constant values C1 and C2 determined by the 'EN' input. The constants for 64-bits of key scheduling are applied when the 'EN' input is high. When 'EN' input is low, the constant values for a 128-bit key are chosen. Additionally, the counter COUNT generates these constant values.
FIG. 2 depicts a typical Internet of Things architecture that has employed innovative design to gain access control over the "things." These devices can exchange, collect, and send data to a server since they have actuators, smart sensor RFID tags, and network connectivity. These apps, as examples, provide dependable and secure access to smart buildings, mobile devices, cloud databases, ATMs, and other devices. Additionally, by logging into the IoT healthcare system, an elderly person can report their health status. In IoT applications, security levels differ in accordance with the availability of hardware resources and strength of security. Some appliances like smart buildings, smart phones, computers, ATMs etc., require high level of security. Here, security provided by 96-bits key is sufficient and appropriate. On the other hand, some systems like healthcare system, logistic and tracking applications etc., need low level of security. Therefore, 64-bits key security is enough and doesn't have large number of hardware resources. Hence, different applications in IoT can be connected with multiple security levels with limited hardware resources.
FIG. 3 shows the present invention of unified architecture of QTL lightweight block cipher achieved high efficiency in terms of throughput per area (Mbps/slice) than other lightweight block ciphers in respective of FPGA devices. The inventedunified architecture of QTL cipher is implemented on different FPGA platforms such as Spartan-3, Virtex-4, and Virtex-5 devices. The architecture is implemented in such a way that it provides a hardware solution to introduce secure implementation for resource-constrained applications.Moreover, the invented implementation has high hardware efficiency in terms of throughput per area (Mbps/slice) compared to other state-of-the-art implementations of lightweight block ciphers such as m-Crypton, LBlock, PRESENT, Lilliput, Clefia, PRINTCIPHER, XTEA, KLEIN, Humming bird, Piccolo, LEA etc., on same FPGA devices. Hence, inventedunified implementation of QTL lightweight block cipher showed higher speed in terms of throughput (Mbps).
4 Claims & 3 Figures , Claims:The following claims define the scope of the invention:

Claims:
1. The invention is to implement an architecture of QTL (a lightweight block cipher) that provides multiple security levels in resource-constrained applications such as Radio Frequency Identification (RFID).
a) The unified architecture worked for all key variants of QTL cipher such as 64-bitsand 128-bits.
b) The unifiedarchitecture provided the flexibility to use a variant of any key sizes according to the required multiple security levels.
c) The invented architecture was found suitable for high throughput RFID applications to transform secure information through the internet by enabling devices for communication and computing process.
2. As per Claim 1, a single architecture has been designed for all available key sizes.
3. As per Claim 1, the multiple security levels can be achieved by varying key sizes and available longer key size (128-bits).
4. As per Claim 1, the invented unifiedarchitecture showed high throughput for high-speed IoT applications.

Documents

Application Documents

# Name Date
1 202341069042-REQUEST FOR EARLY PUBLICATION(FORM-9) [13-10-2023(online)].pdf 2023-10-13
2 202341069042-FORM-9 [13-10-2023(online)].pdf 2023-10-13
3 202341069042-FORM FOR STARTUP [13-10-2023(online)].pdf 2023-10-13
4 202341069042-FORM FOR SMALL ENTITY(FORM-28) [13-10-2023(online)].pdf 2023-10-13
5 202341069042-FORM 1 [13-10-2023(online)].pdf 2023-10-13
6 202341069042-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [13-10-2023(online)].pdf 2023-10-13
7 202341069042-EVIDENCE FOR REGISTRATION UNDER SSI [13-10-2023(online)].pdf 2023-10-13
8 202341069042-EDUCATIONAL INSTITUTION(S) [13-10-2023(online)].pdf 2023-10-13
9 202341069042-DRAWINGS [13-10-2023(online)].pdf 2023-10-13
10 202341069042-COMPLETE SPECIFICATION [13-10-2023(online)].pdf 2023-10-13