Description:TECHNICAL FIELD
[0001] The present disclosure relates, in general, to electrical devices for ultra-wideband communications, and more specifically, relates to ultra-wideband passive gain flattening apparatus to equalize the input differential gain gradient for any broadband critical electronic system applications.

BACKGROUND
The demand for modern miniaturized systems has been increased in commercial, military and space applications. This requires flat system responses over an ultra-wide frequency spectrum. Thereby, equalization networks must have attractive electrical features like a low loss at height frequency and excellent slope gradient over the interested band and they should maintain good matching over wide frequency band. At the same time, it must meet high yield rate, small size, lightweight and low-cost requirements. There are lots of applications of gain flattening apparatus in the modern microwave and mm-wave electronic warfare (EW) receiver systems (0.5-18GHz or 2-40GHz) and radio astronomy which often combat excessive gain slopes and passband ripple problems due to ultra-wideband in nature. It can also be used to provide a flat response of narrow as well as wideband power amplifier systems. To attain this, the present disclosure contemplates a filtering technique with asymmetric matching elements to make the device compact, low loss and excellent slope gradient.
There are few well-established methodologies to design such networks discussed in prior art. An example of such apparatus is recited in a patent 2022/US 0231716 A1 that describes an on-chip multi-band equalizer for adjusting the signal strength of a wideband receiver. This multi-band equalizer comprises multiple series connected tapped LC resonators. The tapped LC resonators may be or may not be capacitive and inductive tapping, whereas, both the frequency and gain of the frequency bands may be programmed by tuning the capacitances of the programmable capacitors and/or selecting the tapped-out terminals of the inductors.
Yet another example is recited in a patent 2022/US 0131512 A1 that discloses mechanical mm-Wave (25–30GHz) tunable slope equalizer for equalizing PA response. This device comprises a rectangular waveguide and cylindrical posts configured to move inside the waveguide cavity. Slope (positive or negative) variation over the frequency of the equalizer depends upon the ‘depth’ of the posts. The above disclosures are related to either equalizer design or equalization corrections or are grossly used for spectral band equalization and suffer from limitations.
Therefore, it is desired to overcome the drawbacks, shortcomings, and limitations associated with existing solutions, and develop a cost-effective ultra-wideband passive gain flattening apparatus to equalize the input differential gain gradient for any broadband critical electronic system applications.

OBJECTS OF THE PRESENT DISCLOSURE
An object of the present disclosure relates, in general, to electrical devices for ultra-wideband communications, and more specifically, relates to ultra-wideband passive gain flattening apparatus to equalize the input differential gain gradient for any broadband critical electronic system applications.
Another object of the present disclosure provides an apparatus that is capable of effectively flattening the gain response across an extensive frequency range from 10MHz to 20GHz. This broad coverage makes it versatile for applications that require handling signals over a wide spectrum.
Another object of the present disclosure provides an apparatus that incorporates a multi-section matching circuit from both ends to ensure efficient matching at lower frequencies, thereby enhancing the overall performance of the apparatus across the entire frequency range, maintaining signal integrity and minimizing reflections.
Another object of the present disclosure provides a compact and lightweight apparatus making it suitable for applications where space and weight considerations are critical. Additionally, its cost-effectiveness ensures accessibility and affordability without compromising performance.
Yet another object of the present disclosure provides an apparatus that offers adaptability by providing an option to change the slope gradient. This flexibility is achieved through the use of discrete shunt elements.

SUMMARY
The present disclosure relates in general, to ultra-wideband passive gain flattening apparatus to equalize the input differential gain gradient for any broadband critical electronic system applications, and more specifically, relates to an electrical device for ultra-wideband communications. The main objective of the present disclosure is to overcome the drawbacks, limitations, and shortcomings of the existing system and solution, by providing a wideband gain flattening apparatus that can include three blocks such as first and second asymmetric bidirectional impedance equalization sections and a wideband reciprocal frequency select block. These three sections are used to cater to various purposes such as to ensure driving point impedance matching and/or to produce monotonically increasing attenuation characteristics across a wide frequency spectrum. Each block has been constituted by N or multiple of N elements whereas, N is greater than or equal to three. In another embodiment, the first and the last series elements of the frequency select network, are electromagnetically coupled with either the last/first elements of corresponding asymmetric multi-octave multi-section impedance equalization circuits whereas, shunt elements are communicatively coupled to a perfectly electrically conductive strip having zero potential difference between any two points of the strip. Although reciprocal and asymmetric blocks are contained in wideband gain flattening apparatus overall, it works as a reciprocal bidirectional device from both ends.
The present disclosure relates to a wideband gain flattening apparatus that includes a wideband frequency select circuit configured to provide a monotonically increasing attenuation gradient over a wide frequency spectrum. At least two asymmetric multi-octave multi-section impedance equalization circuits include a first asymmetric multi-octave multi-section impedance equalization circuit and a second asymmetric multi-octave multi-section impedance equalization circuit coupled to each other between which wideband frequency select circuit is positioned, the at least two asymmetric multi-octave multi-section impedance equalization circuit contribute to impedance equalization over multi-octave frequency response, wherein the wideband frequency select circuit configured to generate a differential gain gradient response for a multi-octave band. The wideband frequency selects circuit and the at least two asymmetric multi-octave multi-section impedance equalization circuits are bidirectional, reciprocal, and/or non-reciprocal networks defining a two-port reciprocal device.
In an aspect, the first asymmetric multi-octave multi-section impedance equalization circuit can include a plurality of series elements connected by intermediate signal paths, where one end of the first asymmetric multi-octave multi-section impedance equalization circuit coupled to a first external signal path to receive a signal from an external source and another end of the first asymmetric multi-octave multi-section impedance equalization circuit coupled to a first internal signal path to pass the signal to the wideband frequency select circuit.
In another aspect, the second asymmetric multi-octave multi-section impedance equalization circuit can include a plurality of series elements connected by intermediate signal paths, wherein one end of the second asymmetric multi-octave multi-section impedance equalization circuit coupled to a second external signal path to receive signal from the external source and another end of the second asymmetric multi-octave multi-section impedance equalization circuit coupled to a second internal signal path to pass the signal to the wideband frequency select circuit.
In another aspect, the wideband frequency select circuit can include a plurality of series elements, first shunt elements and second shunt elements contribute to frequency-selective behavior of the wideband frequency select circuit, wherein the second shunt elements are a parallel combination of two shunt elements.
In another aspect, the other end of the first internal signal path and the second internal signal path of the corresponding asymmetric multi-octave multi-section impedance equalization circuits coupled to the plurality of series elements of the wideband frequency select circuit to process the signals from the corresponding asymmetric multi-octave multi-section impedance equalization circuits. The one of the second shunt element is directly coupled to the plurality of series elements through the first shunt elements and the other end of the second shunt element are connected to an electrically conductive pathway.
In another aspect, the intermediate signal paths of the first asymmetric multi-octave multi-section impedance equalization circuit and the intermediate signal paths of the second asymmetric multi-octave multi-section impedance equalization circuit having different pathway widths with commensurate lengths contribute to impedance matching. The impedance of the first external signal path and second internal signal path of the corresponding asymmetric multi-octave multi-section impedance equalization circuit is not equal to the impedance of the first internal signal path and second external signal path, whereas, the impedance of the first external and internal signal paths are equal to the impedance of the second external and internal signal paths to ensure smooth signal flow between the external and internal paths.
In another aspect, at least two asymmetric multi-octave multi-section impedance equalization circuits, define a single reciprocal network to and extend input/output matching around MHz frequency.
In another aspect, the second shunt elements of the wideband frequency select circuit are directly coupled to a perfectly electrically conductive pathway, wherein the second shunt elements decouple the electrically conductive pathway at highest frequency to transfer maximum energy from the first and second external signal paths, where the second shunt elements at lowest frequency become short circuit pathways for the first shunt elements.
In another aspect, the first shunt elements a discrete or distributive elements, wherein the plurality of shunt elements absorb reflected energy at the lower frequency and absorb almost zero energy at the highest resonating frequency of the second shunt elements, wherein the first shunt elements assist the first asymmetric multi-octave multi-section impedance equalization circuit and the second asymmetric multi-octave multi-section impedance equalization circuit to enhance lower frequency matching.
Yet another aspect, the apparatus is realized on a single mil soft substrate having a very low relative dielectric constant, wherein the soft substrate is supported by a µm metallic plate.
Various objects, features, aspects, and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.

BRIEF DESCRIPTION OF THE DRAWINGS
The following drawings form part of the present specification and are included to further illustrate aspects of the present disclosure. The disclosure may be better understood by reference to the drawings in combination with the detailed description of the specific embodiments presented herein.
FIG. 1 illustrates an exemplary view of a block diagram of a wideband gain flattening apparatus, in accordance with an embodiment of the present disclosure.
FIG. 2 illustrates an exemplary view of a block diagram of a first asymmetric multi-octave multi-section impedance equalization circuit, in accordance with an embodiment of the present disclosure.
FIG. 3 illustrates an exemplary view of a block diagram of a second asymmetric multi-octave multi-section impedance equalization circuit, in accordance with an embodiment of the present disclosure.
FIG. 4 illustrates an exemplary view of a block diagram of a wideband frequency select circuit, in accordance with an embodiment of the present disclosure.
FIG. 5 illustrates a wideband reciprocal frequency select block where only a single element is kept in the shunt path, in accordance with an embodiment of the present disclosure.
FIG. 6 illustrates an individual response of the wideband gain flattening apparatus and depicts the overall system response, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
The present disclosure relates, in general, to ultra-wideband passive gain flattening apparatus to equalize the input differential gain gradient for any broadband critical electronic system applications, and more specifically, relates to an electrical device for ultra-wideband communications.
The present disclosure relates to a wideband gain flattening apparatus that includes a wideband frequency select circuit configured to provide a monotonically increasing attenuation gradient over a wide frequency spectrum. At least two asymmetric multi-octave multi-section impedance equalization circuits include a first asymmetric multi-octave multi-section impedance equalization circuit and a second asymmetric multi-octave multi-section impedance equalization circuit coupled to each other between which wideband frequency select circuit is positioned, the at least two asymmetric multi-octave multi-section impedance equalization circuit contribute to impedance equalization over multi-octave frequency response, wherein the wideband frequency select circuit configured to generate a differential gain gradient response for a multi-octave band. The wideband frequency select circuit and the at least two asymmetric multi-octave multi-section impedance equalization circuits are bidirectional, reciprocal, and/or non-reciprocal networks defining a two-port reciprocal device.
In an aspect, the first asymmetric multi-octave multi-section impedance equalization circuit can include a plurality of series elements connected by intermediate signal paths, where one end of the first asymmetric multi-octave multi-section impedance equalization circuit coupled to a first external signal path to receive a signal from an external source and another end of the first asymmetric multi-octave multi-section impedance equalization circuit coupled to a first internal signal path to pass the signal to the wideband frequency select circuit.
In another aspect, the second asymmetric multi-octave multi-section impedance equalization circuit can include a plurality of series elements connected by intermediate signal paths, wherein one end of the second asymmetric multi-octave multi-section impedance equalization circuit coupled to a second external signal path to receive signal from the external source and another end of the second asymmetric multi-octave multi-section impedance equalization circuit coupled to a second internal signal path - to pass the signal to the wideband frequency select circuit.
In another aspect, the wideband frequency select circuit can include a plurality of series elements, a first shunt elements and a second shunt elements contribute to frequency-selective behavior of the wideband frequency select circuit, wherein the shunt elements is a parallel combination of two shunt elements. In another aspect, the other end of the first internal signal path and the second internal signal path of the corresponding asymmetric multi-octave multi-section impedance equalization circuits coupled to the plurality of series elements of the wideband frequency select circuit to process the signals from the corresponding asymmetric multi-octave multi-section impedance equalization circuits. The one of the second shunt element is directly coupled to the plurality of series elements through the first shunt elements and the other end of the second shunt element are connected to an electrically conductive pathway.
In another aspect, the intermediate signal paths of the first asymmetric multi-octave multi-section impedance equalization circuit and the intermediate signal paths of the second asymmetric multi-octave multi-section impedance equalization circuit having different pathway widths with commensurate lengths contribute to impedance matching. The impedance of first external signal path and second internal signal path of the corresponding asymmetric multi-octave multi-section impedance equalization circuit are not equal to the impedance of the first internal signal path and second external signal path, whereas, the impedance of the first external and internal signal paths are equal to the impedance of the second external and internal signal paths to ensure smooth signal flow between the external and internal paths. In another aspect, the at least two asymmetric multi-octave multi-section impedance equalization circuits, define a single reciprocal network to and extend input/output matching around MHz frequency.
In another aspect, the second shunt elements of the wideband frequency select circuit are directly coupled to the electrically conductive pathway, wherein the second shunt elements decouple electrically conductive pathway at highest frequency to transfer maximum energy from the first and second external signal paths, wherein the second shunt elements at lowest frequency becomes short circuit pathways for the first shunt elements.
In another aspect, the first shunt elements a discrete or distributive elements, wherein the plurality of shunt elements absorb reflected energy at the lower frequency and absorb almost zero energy at the highest resonating frequency of the second shunt elements, wherein the first shunt elements assist the first asymmetric multi-octave multi-section impedance equalization circuit and the second asymmetric multi-octave multi-section impedance equalization circuit to enhance lower frequency matching.
Yet another aspect, the apparatus is realized on a single mil soft substrate having a very low relative dielectric constant, wherein the soft substrate is supported by a µm metallic plate. The present disclosure can be described in enabling detail in the following examples, which may represent more than one embodiment of the present disclosure.
The advantages achieved by the apparatus of the present disclosure can be clear from the embodiments provided herein. The apparatus is capable of effectively flattening the gain response across an extensive frequency range spanning from 10MHz to 20GHz. This broad coverage ensures its adaptability for applications requiring the handling of signals over a wide spectrum. The apparatus incorporates a multi-section matching circuit from both ends, enhancing performance by ensuring efficient matching at lower frequencies. This feature contributes to maintaining signal integrity and minimizing reflections throughout the entire frequency range. Furthermore, the invention presents a compact and lightweight design, catering to applications where space and weight considerations are critical. Its cost-effectiveness ensures accessibility and affordability without compromising performance. The apparatus offers adaptability by providing an option to change the slope gradient, achieved through the utilization of discrete shunt elements. This flexibility allows users to tailor the gain response to specific requirements, enhancing the overall functionality and customization of the apparatus for diverse operational needs. The description of terms and features related to the present disclosure shall be clear from the embodiments that are illustrated and described; however, the invention is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents of the embodiments are possible within the scope of the present disclosure. Additionally, the invention can include other embodiments that are within the scope of the claims but are not described in detail with respect to the following description.
FIG. 1 illustrates an exemplary view of a block diagram of a wideband gain flattening apparatus, in accordance with an embodiment of the present disclosure.
Referring to FIG. 1, wideband gain flattening apparatus 100 can include a wideband frequency select circuit 106 positioned between at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104). At least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) can include a first asymmetric multi-octave multi-section impedance equalization circuit 102 and a second asymmetric multi-octave multi-section impedance equalization circuit 104. The wideband frequency select circuit 106 and the at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) are bidirectional, reciprocal, and/or non-reciprocal networks.
The present disclosure provides a compact, lightweight, and cost-effective ultra-wideband gain flattening apparatus 100 along with its method of operation. To achieve this objective, the wideband frequency select circuit 106 is positioned between two multi-octave impedance equalization circuits (102, 104). Both the frequency select network and the multi-octave impedance equalization circuit are inherently bidirectional, reciprocal, and/or non-reciprocal networks. In one embodiment, the wideband frequency select circuit (also referred to as frequency select network 106, herein) may include (N+1)/2 electromagnetically coupled series elements and (N-1)/2 first and second electromagnetically non-coupled shunt conductive pathways, while the multi-octave impedance equalization circuits (102, 104) have only N communicatively coupled series conductive pathways. In another embodiment, the frequency select network (106) generates a differential gain gradient response for a multi-octave band, and the asymmetric multi-octave multi-section impedance equalization circuits (also referred to as impedance equalization circuits (102, 104), herein) are used to achieve matching across the frequency spectrum. As a result, the entire circuit is realized as a reciprocal network in terms of both electrical and spatial characteristics along the direction of electromagnetic energy propagation from both ends.
The first asymmetric multi-octave multi-section impedance equalization circuit (102) can include a plurality of series elements (108-1 to 108-N) connected by intermediate signal paths (110-1 to 110-N), wherein one end of the first asymmetric multi-octave multi-section impedance equalization circuit (102) coupled to a first external signal path (116-1) to receive a signal from an external source and another end of the first asymmetric multi-octave multi-section impedance equalization circuit (102) coupled to a first internal signal path (118-1) to pass the signal to the wideband frequency select circuit (106).
Similarly, the second asymmetric multi-octave multi-section impedance equalization circuit (104) can include a plurality of series elements (112-1 to 112-N) connected by intermediate signal paths (114-1 to 114-N), wherein one end of the second asymmetric multi-octave multi-section impedance equalization circuit (104) coupled to a second external signal path (116-2) to receive the signal from the external source and another end of the second asymmetric multi-octave multi-section impedance equalization circuit (104) coupled to a second internal signal path (118-2) to pass the signal to the wideband frequency select circuit (106). The at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) define a single reciprocal network and extend input/output matching around 10MHz frequency.
Further, the wideband frequency select circuit 106 can include a plurality of series elements (120-1 to 120-N) e.g., (N+1)/2 series elements (120-1 to 120-N), a first shunt elements (122-1 to 122-N) and a second shunt elements (502-2 to 502-N-1) contribute to frequency-selective behavior of the wideband frequency select circuit (106). The second shunt elements (502-2 to 502-N-1) is a parallel combination of two shunt elements such as (N-1)/2 shunt elements (124-1 to 124-N) and 2*(N-1)/2 shunt elements (126-1 to 126-N).
In an embodiment, the other end of the first internal signal path (118-1) and the second internal signal path (118-2) of the corresponding asymmetric multi-octave multi-section impedance equalization circuits (102, 104) coupled to the plurality of series elements (120-1 to 120-N) of the wideband frequency select circuit (106) to process the signals from the corresponding asymmetric multi-octave multi-section impedance equalization circuits (102, 104).
One of the (N-1)/2 second shunt elements (502-2 to 502-N-1) is directly coupled to the plurality of series elements (120-1 to 120-N) through first shunt elements (122-1 to 122-N) to obtain impedance matching at certain frequencies and the other end of the (N-1)/2 second shunt element (502-2 to 502-N-1) are connected to electrically conductive pathway 504 to establish a reference point.
The internal signal path 118-1 of the first asymmetric multi-octave multi-section impedance equalization circuit 102 and the internal signal path 118-2 of the second asymmetric multi-octave multi-section impedance equalization circuit 104 respectively are electromagnetically coupled to the first and last series elements (120-1 to 120-N) of the wideband frequency select circuit 106. The external signal path 116-1 of the first asymmetric multi-octave multi-section impedance equalization circuit 102 and the external signal path 116-2 of the second asymmetric multi-octave multi-section impedance equalization circuit 104 are communicatively coupled to an external object.
In one embodiment, the first asymmetric multi-octave multi-section impedance equalization circuit 102 and the second asymmetric multi-octave multi-section impedance equalization circuit 104 are bidirectional and asymmetric and wideband frequency select circuit 106 is reciprocal. In another embodiment, when these three reciprocal and asymmetric coupled together, it behaves as a two-port reciprocal device.
In an embodiment, the intermediate signal paths (108-1 to 108-N) of the first asymmetric multi-octave multi-section impedance equalization circuit (102) and the intermediate signal paths (112-1 to 112-N) of the second asymmetric multi-octave multi-section impedance equalization circuit (104) having different pathway widths with commensurate lengths contribute to impedance matching. The impedance of first external signal path (202) and second internal signal path (302) of the corresponding asymmetric multi-octave multi-section impedance equalization circuit (102, 104) are not equal to the impedance of the first internal signal path (204) and second external signal path (304), whereas, the impedance of the first external and internal signal paths (202, 204) are equal to the impedance of the second external and internal signal paths (304, 302) to ensure smooth signal flow between the external and internal paths and wherein the impedance of the first and second external signal paths (202, 304) are generally real in nature whereas, the impedance of the first and the second internal signal paths (204, 302) may be or may not be complex in nature. Whereas, impedance of second internal signal paths (204, 302) are complex conjugate of impedance (402, 404).
The first asymmetric multi-octave multi-section impedance equalization circuit 102, the second asymmetric multi-octave multi-section impedance equalization circuit 104 and the wideband frequency select circuit 106 are used to cater various purposes like; to ensure driving point impedance matching and/or to produce monotonically increasing attenuation characteristics across a wide frequency spectrum. Each block has been constituted by N or multiple of N elements whereas, N is greater than or equal to three. In other embodiment, the first and the last series elements (120- 1, 120-N) of frequency select network 106 are electromagnetically coupled with either last series elements (112-1 to 112-N) of the second asymmetric multi-octave multi-section impedance equalization circuit 104 and the first series elements (108-1 to 108-N) of the first asymmetric multi-octave multi-section impedance equalization circuit 102, whereas, shunt elements are communicatively coupled to a perfectly electrically conductive pathway (504) having zero potential difference between any two points of the strip. Although reciprocal and asymmetric blocks are contained in wideband gain flattening apparatus overall, it works as a reciprocal bidirectional device from both ends.
In an embodiment, the second shunt elements (502-2 to 502-N-1) of the wideband frequency select circuit (106) are directly coupled to a perfectly electrically conductive pathway (504). The second shunt elements (502-2 to 502-N-1) decouple the electrically conductive pathway (504) at highest frequency to transfer maximum energy from the first and second external signal paths (116-1, 116-2), wherein the second shunt elements (502-2 to 502-N-1) at lowest frequency becomes short circuit pathways for the first shunt elements (122-1 to 122-N). The first shunt elements (122-1 to 122-N) is a discrete or distributive element. The plurality of -shunt elements (122-1 to 122-N) absorb reflected energy at the lower frequency and absorb almost zero energy at highest resonating frequency of the second shunt elements (502-2 to 502-N-1). The first shunt elements (122-1 to 122-N) assist the first asymmetric multi-octave multi-section impedance equalization circuit (102) and the second asymmetric multi-octave multi-section impedance equalization circuit (104) to enhance lower frequency matching. Further, the apparatus is realized on a single 10 mil soft substrate having a very low relative dielectric constant, wherein the soft substrate is supported by a 400µm metallic plate.
Thus, the present invention overcomes the drawbacks, shortcomings, and limitations associated with existing solutions, and provides a versatile apparatus capable of effectively flattening the gain response across an extensive frequency range spanning from 10MHz to 20GHz. This broad coverage ensures its adaptability for applications requiring the handling of signals over a wide spectrum. The apparatus incorporates a multi-section matching circuit from both ends, enhancing performance by ensuring efficient matching at lower frequencies. This feature contributes to maintaining signal integrity and minimizing reflections throughout the entire frequency range. Furthermore, the present disclosure presents a compact and lightweight design, catering to applications where space and weight considerations are critical. Its cost-effectiveness ensures accessibility and affordability without compromising performance. The apparatus offers adaptability by providing an option to change the slope gradient, achieved through the utilization of discrete shunt elements. This flexibility allows users to tailor the gain response to specific requirements, enhancing the overall functionality and customization of the apparatus for diverse operational needs.
FIG. 2 illustrates an exemplary view of a block diagram 200 of a first asymmetric multi-octave multi-section impedance equalization circuit, in accordance with an embodiment of the present disclosure.
As described in FIG. 2, the first asymmetric multi-octave multi-section impedance equalization circuit 102 can include the plurality of series elements (108-1 to 108-N), intermediate signal paths (110-1 to 110-N), external signal path 116-1 and internal signal path 118-1. In an exemplary embodiment, the first asymmetric multi-octave multi-section impedance equalization circuit 102 can include N series elements (108-1 to 108-N) and (N+1) signal paths (110-1 to 110-N). The external signal path 116-1 communicatively couples external signals to the plurality of series elements (108-1 to 108-N), and the internal signal path 118-1 couples electromagnetically to the plurality of series elements (120-1 to 120-N) i.e., first and last series of wideband frequency select circuit 106.
In one embodiment, the plurality of series elements (108-1 to 108-N) have different pathway widths which result in unequal impedance (202, 204). Thereby, for instance, the input impedance of each section is governed by the equation (1), wherein, ?L210N is p/2 or 90° at the highest frequency.
?Z_210?_N (IN)= (Z_130 (3)*?Z_210?_N+j??Z^2?_210?_N tanh????L_210?_N ?)/(?Z_210?_N+jZ_130 (3) tanh????L_210?_N ? ) (1)
Impedance equalization is possible by using multiple pathways and calculated by applying the above equation for a wide frequency band thus multi-octave multi-section impedance equalization circuit matches the input line impedance of the overall network to the characteristic impedance from the external signal path 116-1.
FIG. 3 illustrates an exemplary view of a block diagram 300 of a second asymmetric multi-octave multi-section impedance equalization circuit, in accordance with an embodiment of the present disclosure.
As described in FIG. 3, second asymmetric multi-octave multi-section impedance equalization circuit 104 can include a plurality of series elements (112-1 to 112-N), intermediate signal paths (114-1 to 114-N), external signal path 116-2 and internal signal path 118-2. In an exemplary embodiment, the second asymmetric multi-octave multi-section impedance equalization circuit 104 can include N series elements (112-1 to 112-N) and (N+1) signal paths(114-1 to 114-N), external signal path 116-2 and internal signal path 118-2. The external signal path 116-2, communicatively couples wideband gain flattening apparatus 100 to the external object and internal signal path 118-2 couples electromagnetically to the plurality of series elements (120-1 to 120-N) i.e., first and last series elements (120-1 to 120-N) of wideband frequency select circuit 106.
In an embodiment, the N series elements (112-1 to 112-N) have different pathway widths which results in unequal impedance (302, 304), thus asymmetric multi-octave multi-section impedance equalization circuit 104 matches line impedances of the overall network to the characteristic impedances from external signal path 116-2.
FIG. 4 illustrates an exemplary view of a block diagram 400 of a wideband frequency select circuit, in accordance with an embodiment of the present disclosure.
In FIG. 4, wideband frequency select circuit 106 can include a plurality of series elements (120-1 to 120-N) e.g., (N+1)/2 series elements (120-1 to 120-N), first shunt elements (122-1 to 122-N) and second shunt elements (502-2 to 502-N-1) shown in FIG. 5 which is a parallel combination of two shunt elements such as (N-1)/2 shunt elements (124-1 to 124-N) and 2*(N-1)/2 shunt elements (126-1 to 126-N). In an exemplary embodiment, the wideband frequency select circuit 106 can include (N+1)/2 series elements (120-1 to 120-N). At low-frequency applications, second shunt elements which is a parallel combination of two shunt elements such as (N-1)/2 first shunt elements (124-1 to 124-N) and 2*(N-1)/2 second shunt elements (126-1 to 126-N) can be realized as separate entities but for wideband application, those two elements can be realized as a single resonating element to ease the realization process. In another embodiment, the first and the last series elements of wideband frequency select circuit 106 are electromagnetically coupled to the plurality of series elements (108-1 to 108-N) of the first asymmetric multi-octave multi-section impedance equalization circuit 102 and plurality of series elements (112-1 to 112-N) of the second asymmetric multi-octave multi-section impedance equalization circuit 104 whereas, the second shunt elements are communicatively coupled to a perfectly electrically conductive medium 504. The wideband frequency select circuit 106 is reciprocal thereby, the impedance (402, 404) are identical. In the design it is ensured that the impedance 202 and 402 are complex conjugates as well as the impedance 204, and 404 are also complex conjugates which refers the equation (2)
Z 116-1(2) = Z* 116-1 (3) and Z 118-2 (4) = Z* 118-2 (3)
In another embodiment, first shunt elements (124-1 to 124-N) are used to absorb reflected power within the network as the frequency of interest deviates from its maximum resonating frequency thereby it additionally helps the first asymmetric multi-octave multi-section impedance equalization circuit 102 and the second asymmetric multi-octave multi-section impedance equalization circuit 104. The (N-1)/2 first shunt elements (124-1 to 124-N) can be discrete components as well as distributed elements.
FIG. 5 illustrates wideband reciprocal frequency select block where only single element is kept in the shunt path, in accordance with an embodiment of the present disclosure.
In FIG. 5, the block 500 can include a series and shunt elements only for wideband application, whereas the (N+1)/2 series elements (120-1 to 120-N) are directly coupled to the next element. The shunt elements (502- 2 to 502-N-1) are coupled to the main brunch via series elements (120-1 to 120-N) whereas, the other end is communicatively coupled to the electrically conductive 504. One of (N-1)/2 second shunt pathway, 502R of the wideband frequency select circuit 106 is directly coupled to series pathways via series elements (120-1 to 120-N) and other end are connected to perfectly electrically conductive strip (504), wherein every series pathways, except first and the last elements, are electromagnetically coupled to two series pathways and two first shunt discrete elements, for an instance, series element 120R are electromagnetically coupled to two series conductive trails 120R-1 and 120R+1 as well as the 122R and 122R+1, whereas one end of any first shunt elements is communicatively coupled to the common point of two series pathways as well as a single second shunt pathways, for an instance, 122R are directly coupled to two series conductive trails 120R-1 and 120R+1 and one end of second shunt element 502R-1. In another embodiment, each shunt element decouples from the electrically conductive pathway 504 thereby maximum energy couples from internal signal paths (118-1, 118-2). As frequency decreases, a fraction of input energy reaches the electrically conductive pathway 504 and reflects back and gets absorbed by the first shunt elements (122-1 to 122-N).
FIG. 6 illustrates an individual response 600 of the wideband gain flattening apparatus and also depicts the overall system response, in accordance with an embodiment of the present disclosure. FIG–6 depicts the response on the wideband gain flattening apparatus 100 whereas, the input output through path response 602, driving point matching response 606 for multi-octave frequency. Thereby entrance of the input external signal can be either from the external signal path (116-1, 116-2) respectively, but signal transmission, attenuation, differential gain gradient response and reflection phenomenon shall remain identical.
Thus, the present invention overcomes the drawbacks, shortcomings, and limitations associated with existing solutions, and provides a versatile apparatus capable of effectively flattening the gain response across an extensive frequency range spanning from 10MHz to 20GHz. This broad coverage ensures its adaptability for applications requiring the handling of signals over a wide spectrum. The apparatus incorporates a multi-section matching circuit from both ends, enhancing performance by ensuring efficient matching at lower frequencies. This feature contributes to maintaining signal integrity and minimizing reflections throughout the entire frequency range. Furthermore, the present disclosure presents a compact and lightweight design, catering to applications where space and weight considerations are critical. Its cost-effectiveness ensures accessibility and affordability without compromising performance. The apparatus offers adaptability by providing an option to change the slope gradient, achieved through the utilization of discrete shunt elements. This flexibility allows users to tailor the gain response to specific requirements, enhancing the overall functionality and customization of the apparatus for diverse operational needs.
It will be apparent to those skilled in the art that the apparatus 100 of the disclosure may be provided using some or all of the mentioned features and components without departing from the scope of the present disclosure. While various embodiments of the present disclosure have been illustrated and described herein, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the disclosure, as described in the claims.

ADVANTAGES OF THE PRESENT INVENTION
The present invention provides an apparatus that is capable of effectively flattening the gain response across an extensive frequency range from 10MHz to 20GHz. This broad coverage makes it versatile for applications that require handling signals over a wide spectrum.
The present invention provides an apparatus that incorporates multi-section matching circuit from both ends ensuring efficient matching at lower frequencies, thereby enhancing the overall performance of the apparatus across the entire frequency range, maintaining signal integrity and minimizing reflections.
The present invention provides a compact and lightweight apparatus making it suitable for applications where space and weight considerations are critical. Additionally, its cost-effectiveness ensures accessibility and affordability without compromising performance.
The present invention provides an apparatus that offers the adaptability by providing an option to change the slope gradient. This flexibility is achieved through the use of discrete shunt elements.

, Claims:1. A wideband gain flattening apparatus (100) comprising:
a wideband frequency select circuit (106) configured to provide monotonically increasing attenuation gradient over a wide frequency spectrum; and
at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) comprising a first asymmetric multi-octave multi-section impedance equalization circuit and a second asymmetric multi-octave multi-section impedance equalization circuit coupled to each other between which wideband frequency select circuit (106) is positioned, the at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) contribute to impedance equalization over multi-octave frequency response, wherein the wideband frequency select circuit (106) configured to generate a differential gain gradient response for a multi-octave band, and
wherein the wideband frequency select circuit and the at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) are bidirectional, reciprocal, and/or non-reciprocal networks defining a two-port reciprocal device.

2. The apparatus as claimed in claim 1, wherein the first asymmetric multi-octave multi-section impedance equalization circuit (102) comprises a plurality of series elements (108-1 to 108-N) connected by intermediate signal paths (110-1 to 110-N), wherein one end of the first asymmetric multi-octave multi-section impedance equalization circuit (102) coupled to a first external signal path (116-1) to receive/transmit a signal from/to an external source/receiver and another end of the first asymmetric multi-octave multi-section impedance equalization circuit (102) coupled to a first internal signal path (118-1) to pass the signal to the wideband frequency select circuit (106).
3. The apparatus as claimed in claim 1, wherein the second asymmetric multi-octave multi-section impedance equalization circuit (104) comprises a plurality of series elements (112-1 to 112-N) connected by intermediate signal paths (114-1 to 114-N), wherein one end of the second asymmetric multi-octave multi-section impedance equalization circuit (104) coupled to a second external signal path (116-2) to transmit/receive signal to/from the external receiver/source and another end of the second asymmetric multi-octave multi-section impedance equalization circuit (104) coupled to a second internal signal path (118-2) to pass the signal to the wideband frequency select circuit (106).

4. The apparatus as claimed in claim 1, wherein the wideband frequency select circuit (106) comprises a plurality of series elements (120-1 to 120-N), first shunt elements (122-1 to 122-N) and second shunt elements (502-2 to 502-N-1) that contributes to frequency-selective behavior of the wideband frequency select circuit (106), wherein the second shunt elements is a parallel combination of two shunt elements pertain to (N-1)/2 shunt elements (124-1 to 124-N) and 2*(N-1)/2 shunt elements (126-1 to 126-N),

5. The apparatus as claimed in claim 1, wherein other ends of the first internal signal path (118-1) and the second internal signal path (118-2) of the corresponding asymmetric multi-octave multi-section impedance equalization circuits (102, 104) coupled to the plurality of series elements (120-1 to 120-N) of the wideband frequency select circuit (106) to process the signals from the corresponding asymmetric multi-octave multi-section impedance equalization circuits (102, 104), wherein one end of the second shunt element (502-2 to 502-N-1) is directly coupled to the plurality of series elements (120-1 to 120-N) through first shunt elements (122-1 to 122-N) to obtain impedance matching at certain frequencies and other end of the second shunt element (502-2 to 502-N-1) are connected to an electrically conductive pathway (504) to establish a reference point.
6. The apparatus as claimed in claim 1, wherein the intermediate signal paths ( 108-1 to 108-N) of the first asymmetric multi-octave multi-section impedance equalization circuit (102) and the intermediate signal paths ( 112-N to 112-1) of the second asymmetric multi-octave multi-section impedance equalization circuit (104) having different pathway widths with commensurate lengths contribute to impedance matching, wherein the impedance of first external signal path (202) and second internal signal path (302) of the corresponding asymmetric multi-octave multi-section impedance equalization circuit (102, 104) is not equal to the impedance of the first internal signal path (204) and second external signal path (304), whereas, the impedance of the first external and internal signal paths (202, 204) are equal to the impedance of the second external and internal signal paths (304, 302) to ensure smooth signal flow between the external and internal paths, whereas, impedance of second internal signal (204, 302) are complex conjugate of impedance (402, 404)

7. The apparatus as claimed in claim 1, wherein the at least two asymmetric multi-octave multi-section impedance equalization circuits (102, 104) define a single reciprocal network and extend input/output matching around 10MHz frequency.

8. The apparatus as claimed in claim 1, wherein the second shunt elements (502-2 to 502-N-1) of the wideband frequency select circuit (106) are directly coupled to the electrically conductive pathway (504), wherein the second shunt elements (502-2 to 502-N-1) decouple the electrically conductive pathway (504) at highest frequency to transfer maximum energy from the first and second external signal paths (116-1, 116-2), wherein the second shunt elements (502-2 to 502-N-1) at lowest frequency becomes short circuit pathways for the first shunt elements (122-1 to 122-N).

9. The apparatus as claimed in claim 1, wherein the first shunt elements (122-1 to 122-N) is discrete or distributive, wherein the first shunt elements (122-1 to 122-N) absorb reflected energy at the lower frequency and absorb almost zero energy at highest resonating frequency of the second shunt elements (502-2 to 502-N-1), wherein the first shunt elements (122-1 to 122-N) assist the first asymmetric multi-octave multi-section impedance equalization circuit (102) and the second asymmetric multi-octave multi-section impedance equalization circuit (104) to enhance lower frequency matching.

10. The apparatus as claimed in claim 1, wherein the apparatus is realized on a single 10 mil soft substrate having a low relative dielectric constant, wherein the soft substrate is supported by a 400µm metallic plate.