Description:TECHNICAL FIELD
[0001] The present invention relates to the field of Secondary Surveillance Radars (SSR) and Identification of Friend or Foe (IFF) used in air traffic surveillance and control. In particular, the present disclosure relates to a system and a method for decoding SSR interrogation replies.

BACKGROUND
[0002] Background description includes information that may be useful in understanding the present disclosure. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed disclosure, or that any publication specifically or implicitly referenced is prior art.
[0003] The function of a Secondary Surveillance Radars (SSR)/Identification of Friend or Foe (IFF) system is to classify any aircraft as a friend or a foe by sending distinctly spaced pulses as query signals, also known as interrogations, from an interrogator, and accordingly expecting the aircraft transponder to reply back with the prescribed reply signal frame format. Two modes of reply signal modes/formats are Mk-X reply which is a Pulse Amplitude Modulation (PAM) signal and Mode-S which is a Pulse Position Modulation (PPM) signal.
[0004] Systems and methods exist for decoding either an Mk-X reply signal or Mode- S reply signal. But, in an airspace having huge air traffic, replies from various transponders may overlap on each other creating an ambiguous situation for the reply decoder at the interrogator. The possible reasons for overlapping replies may be due to multiple transponders responding at same time or due to multipath interference. The overlapping different replies results in phenomenon called garbling and FRUIT (False Replies Unsynchronized in Time) which create confusion in the reply decoding process. Garbling occurs when replies of two nearby transponders get overlapped in time. Whereas, FRUIT occurs when a reply intended for an interrogator is mistakenly received by some other interrogator.
[0005] Therefore, there is a need for a robust solution to decode reply signals that have multiple overlapped reply signals from multiple transponders.

OBJECTS OF THE PRESENT DISCLOSURE
[0006] Some of the objects of the present disclosure, which at least one embodiment herein satisfies are as listed below.
[0007] The principal objective of the present disclosure is to provide a system and a method for decoding Secondary Surveillance Radars (SSR) interrogation replies from aircraft transponders.
[0008] Another object of the present disclosure is to provide a system and a method for decoding SSR interrogation replies that can handle different overlapped reply signals causing phenomena called garbling and False Replies Unsynchronized in Time (FRUIT) to detect and identify reply modes (Mk-X and Mode-S) from the reply signals, and decode the replies based on their reply modes.
[0009] Another object of the present disclosure is to provide a system and a method for decoding SSR interrogation replies to decode multiple replies parallelly.

SUMMARY
[0010] The present invention relates to the field of Secondary Surveillance Radars (SSR) and Identification of Friend or Foe (IFF) used in air traffic surveillance and control. In particular, the present disclosure relates to a system and a method for decoding SSR interrogation replies.
[0011] In an aspect, the present disclosure relates to a system for decoding Secondary Surveillance Radar (SSR) interrogation replies. The system includes a transceiver to transmit one or more signals to one or more vehicles and receive one or more reply signals from the one or more vehicles based on the one or more signals, where the transceiver is communicatively coupled to the system. The system includes at least one processor and a memory operatively coupled to the at least one processor, where said memory stores executable instructions. When the executable instructions are executed by the at least one processor, the at least one processor performs the following steps. The at least one processor receives the one or more reply signals via the transceiver. The at least one processor determines one or more Pulse Position Modulation (PPM) signals by filtering the one or more reply signals using a matched filter technique. The at least one processor determines one or more Pulse Amplitude Modulation (PAM) signals among the one or more reply signals. The at least one processor simultaneously decodes one or more PAM signals and the one or more PPM signals. The at least one processor generates one or more responses based on the decoded one or more PAM signals and one or more PPM signals with an information of the one or more vehicles.
[0012] In an embodiment, the method for decoding the one or more PAM signals may include the following steps. The at least one processor may detect a leading edge and a trailing edge associated with a PAM signal among the one or more PAM signals. The at least one processor may modify a shape of one or more pulses associated with the PAM signal to fit a width. The at least one processor may separate the one or more PAM signals from the one or more reply signals. The at least one processor may simultaneously decode the separated one or more PAM signals.
[0013] In an embodiment, the method for decoding the one or more PPM signals may include the following steps. The at least one processor may detect a leading edge and a trailing edge associated with a PPM signal among the one or more PPM signals. The at least one processor may modify a shape of one or more pulses in the PPM signal to fit a width. The at least one processor may decode a unique identification of a vehicle associated with the PPM signal. The at least one processor may determine a validity of the PPM signal by comparing the unique identification associated with the PPM signal with a unique identification associated with a transmitted signal among the one or more signals. The at least one processor may decode a data block associate with the PPM signal, based on the validity of the PPM signal.
[0014] In an aspect the present disclosure relates to a method for decoding Secondary Surveillance Radar (SSR) interrogation replies. The method includes the following steps. Receiving, by at least one processor associated with a system, one or more reply signals from one or more vehicles based on one or more signals transmitted to the one or more vehicles, via a transceiver. Determining, by the at least one processor, one or more PPM signals by filtering the one or more reply signals using a matched filter technique. Determining, by the at least one processor, one or more PAM signals among the one or more reply signals. Simultaneously decoding, by the at least one processor, the one or more PAM signals and the one or more PPM signals. Generating, by the at least one processor, one or more responses, based on the decoded one more PAM signals and the decoded one or more PPM signals with an information of the one or more vehicles.
[0015] In an embodiment, the method for decoding the one or more PAM signals may include the following steps. The at least one processor may detect a leading edge and a trailing edge associated with a PAM signal among the one or more PAM signals. The at least one processor may modify a shape of one or more pulses associated with the PAM signal to fit a width. The at least one processor may separate the one or more PAM signals from the one or more reply signals. The at least one processor may simultaneously decode the separated one or more PAM signals.
[0016] In an embodiment, the method for decoding the one or more PPM signals may include the following steps. The at least one processor may detect a leading edge and a trailing edge associated with a PPM signal among the one or more PPM signals. The at least one processor may modify a shape of one or more pulses associated with the PPM signal to fit a width. The at least one processor may decode a unique identification of a vehicle associated with the PPM signal. The at least one processor may determine a validity of the PPM signal by comparing the unique identification associated with the PPM signal with a unique identification associated with a transmitted signal among the one or more signals. The at least one processor may decode a data block associate with the PPM signal, based on the validity of the PPM signal.

BRIEF DESCRIPTION OF DRAWINGS
[0017] The accompanying drawings are included to provide a further understanding of the present disclosure, and are incorporated in, and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure, and together with the description, serve to explain the principles of the present disclosure.
[0018] In the figures, similar components, and/or features may have the same reference label. Further, various components of the same type may be distinguished by following the reference label with a second label that distinguishes among the similar components. If only the first reference label is used in the specification, the description is applicable to any one of the similar components having the same first reference label irrespective of the second reference label.
[0019] FIG. 1 illustrates (100) and example system (104) for decoding Secondary Surveillance Radars (SSR) interrogation replies, in accordance with an embodiment of the present disclosure.
[0020] FIG. 2A and FIG. 2B illustrate the Mk-X reply signal format (200A) and Mode-S reply signal format (200B).
[0021] FIG. 3 illustrates (300) an example system similar to the system (104) shown in FIG. 1 for decoding SSR interrogation replies with structural and functional components, in accordance with an embodiment of the current disclosure.
[0022] FIG. 4 illustrates (400) the processing engine (308) of an example system (104) for decoding SSR interrogation replies implemented as a part (reply decoder (434)) the interrogator receiver system.
[0023] FIG. 5A illustrates (500A) the combined flow chart of edge detector (456), pulse reshaper (458) and de-garbler block (460) of Mk-X reply decoder module (454), in accordance with an embodiment of the present disclosure. FIG. 5B illustrates (500B) the pulse separation technique used for overlapping pulses with distinct amplitude variation of at least ??1 within the pulse in step 526. FIG. 5C illustrates (500C) the pulse separation technique used for overlapping pulses with amplitude variation less than ??1 within the pulse in step (524).
[0024] FIG. 6 illustrates (600) the flow chart of reply analyzer block 466 of Mk-X reply decoder module, in accordance with an embodiment of the present disclosure.
[0025] FIG. 7A shows the shift register structure (700A) for storing pulse positions of Mk-X replies updated by the reply analyser block (466), in accordance with an embodiment of the present disclosure. FIG. 7B illustrates the flow chart (700B) of reply decoder block (466) using shift register (700A) of Mk-X reply decoder module (454), in accordance with an embodiment of the present disclosure.
[0026] FIG. 8 illustrates an examples method (800) for decoding SSR interrogation replies, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION
[0027] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure as defined by the appended claims.
[0028] The ensuing description provides exemplary embodiments only, and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the exemplary embodiments will provide those skilled in the art with an enabling description for implementing an exemplary embodiment. It should be understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the invention as set forth.
[0029] Specific details are given in the following description to provide a thorough understanding of the embodiments. However, it will be understood by one of ordinary skill in the art that the embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form in order not to obscure the embodiments in unnecessary detail. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.
[0030] Reference throughout this specification to “one embodiment” or “an embodiment” or “an instance” or “one instance” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
[0031] Various aspects of the present disclosure are described with respect to FIG. 1 to FIG. 8.
[0032] The present invention relates to the field of Secondary Surveillance Radars (SSR) and Identification of Friend or Foe (IFF) used in air traffic surveillance and control. In particular, the present disclosure relates to a system and a method for decoding SSR interrogation replies.
[0033] The following acronyms and symbols have been used in the description below:
[0034] VED: Signal sample at the output of envelop detector.
[0035] NTH: Noise threshold.
[0036] STEMP: Temporary signal to store valid VED samples.
[0037] fs: Sampling rate (Hz).
[0038] PLcount: Counter to store number of samples in a pulse.
[0039] PW: Pulse width (µs).
[0040] LE(n): Leading edge of nth reply (µs).
[0041] (??): Trailing edge of ????h reply (µs).
[0042] ??????????: Register to store all leading edges.
[0043] ????????: Register to store all trailing edges.
[0044] ??1(??): Frame start position of ????h thread.
[0045] ????????????????t: Counter to find sample position.
[0046] ????: Shift register to store pulse positions.
[0047] ????(0) : Least Significant Bit (LSB) of shift register
[0048] ????(31) : Most Significant Bit (MSB) of shift register
[0049] ????????p: Shift register to store amplitude of samples.
[0050] In an aspect, the present disclosure relates to a system for decoding Secondary Surveillance Radar (SSR) interrogation replies. FIG. 1 illustrates (100) and example system (104) for decoding SSR interrogation replies, in accordance with an embodiment of the present disclosure. The system (104) may work with or may be a part of an interrogator system which interrogates the aircraft transponders by sending interrogation signals, receives, and decodes the replies sent in return by the aircraft transponders. The system (104) may receive reply signals (102) and may generate a response with decoded information (106).
[0051] The system (104) decodes Mk-X and Mode-S transponder replies from vehicles (aircrafts) which are Pulse Amplitude Modulation (PAM) signals and Pulse Position Modulation (PPM) signals. FIG. 2A and FIG 2B illustrate the Mk-X reply signal format (200A) and Mode-S reply signal format (200B). Referring to FIG 2A, a valid Mk-X reply frame is marked by the presence of framing pulses F1 (202) and F2 (230), which are separated by 20.3µs. This frame consists of twelve data pulses (204 - 228) while each pulse has a pulse width of 0.45µs and the pulse separation is 1.45µs. An optional pulse SPI (232) located at 4.35µs from F2 (230) is also used in certain critical situations. Referring to FIG. 2B, a valid Mode-S reply has four pulses (236 - 242), each of duration 0.5µs, that together form a preamble (234) of duration 8µs. The preamble (234) is followed by a reply data block (244) which can be of 56µs or 112µs duration, out of which last 24 bits are allocated for (aircraft) address/parity check (248).
[0052] FIG. 3 illustrates (300) an example system similar to the system (104) shown in FIG. 1 for decoding SSR interrogation replies with structural and functional components, in accordance with an embodiment of the current disclosure. Referring to FIG. 3, the system (104) may include at least one processor (302) that may be implemented as one or more microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, logic circuitries, and/or any devices that process data based on operational instructions. Among other capabilities, the processor(s) (302) may be configured to fetch and execute computer-readable instructions stored in a memory (304) of the system (104). The memory (304) may be configured to store one or more computer-readable instructions or routines in a non-transitory computer readable storage medium, which may be fetched and executed to create or share data packets over a network service. The memory (304) may comprise any non-transitory storage device including, for example, volatile memory such as random-access memory (RAM), or non-volatile memory such as erasable programmable read only memory (EPROM), flash memory, and the like.
[0053] In an embodiment, the system (104) may include an interface(s) (306). The interface(s) (306) may include a variety of interfaces, for example, interfaces for data input and output devices, referred to as I/O devices, storage devices, and the like. The interface(s) (306) may facilitate communication to/from the system 104. The interface(s) (306) may also provide a communication pathway for one or more components of the system (104). Examples of such components include, but are not limited to, a processing unit/engine(s) (308) and a local database (310). In an embodiment, the local database (310) may be separate from the system (104).
[0054] In an embodiment, the processing engine(s) (308) may be implemented as a combination of hardware and programming (for example, programmable instructions) to implement one or more functionalities of the processing engine(s) (308). In examples described herein, such combinations of hardware and programming may be implemented in several different ways. For example, the programming for the processing engine(s) (308) may be processor-executable instructions stored on a non-transitory machine-readable storage medium and the hardware for the processing engine(s) (308) may comprise a processing resource (for example, one or more processors), to execute such instructions. In the present examples, the machine-readable storage medium may store instructions that, when executed by the processing resource, implement the processing engine(s) (308). In such examples, the system (104) may include the machine-readable storage medium storing the instructions and the processing resource to execute the instructions, or the machine-readable storage medium may be separate but accessible to the system (104) and the processing resource. In other examples, the processing engine(s) (308) may be implemented by electronic circuitry.
[0055] FIG. 4 illustrates the processing engine (308) of an example system (104) for decoding SSR interrogation replies (reply decoder (434)) implemented as a part the interrogator receiver system. In an embodiment, the system (104) includes a transceiver (402) at the Radio Frequency (RF) stage. In an exemplary embodiment, the interrogator receiver system (300) may be implemented on Field-Programmable Gate Array (FPGA) hardware (422) for processing digital signals, and the processor (s) (302) for control, timing and synchronization that may be connected to the interrogator generator (480) via virtual Local Area Network (LAN) (484). The transceiver (402) may act as transmitter for transmitting interrogations (one or more signals) and also as a receiver for receiving reply signals (102) from several transponders with the diplexer blocks (408, 410) acting as switches to change between transmission and reception mode frequencies. The interrogations may be generated by the interrogation generator block (480) which are further amplified by the signal power amplifier (420) before transmission. During reception, the reply signals (104) from transponder are captured by two antennas (404,406) corresponding to ?? channel receiver (412) and ? channel receiver (414). The analogue signals captured by both channels may be digitized using Radio Frequency (RF) Analogue to Digital Converters (ADCs) (416, 418), and further down-converted using Digital Down Converters (DDCs) (424, 426). The down-converted signals also may also include ? channel signals (430) which are used in monopulse processing (432). The decoded replies along with the monopulse measurements may further go to the hit report generator (482). The system (104) for decoding SSR interrogation replies may be implemented by a reply decoder module (434) that takes the samples from ?? channel (428) for further processing and decoding. The system (104) may further include an envelope detector (436), background noise calculator (440), de-fruiter block (444) to detect Mode-S (PPM signals) signals among the reply signals, Mode-S decoder module (468) to decode Mode-S reply signals, and Mk-X decoder module (454) for decoding Mk-X reply signals (PAM signals).
[0056] In an exemplary embodiment, the processor (302) may detect the envelope signals ?????? (438) of the reply signals (102) in the reply decoder module (434) via the envelope detector (436) from in-phase (??I) and quadrature (??Q) digital samples (428) of ?? channel by determining . In an exemplary embodiment, the processor(s) (302) may calculate a noise threshold ?????? (442) via a background noise calculator (440) by calculating a noise estimate NE by averaging first ?? samples of ?????? (438), and then, multiplying by with an appropriate multiplication factor ??. The values of ?? and ?? depend on the sampling rate used and noise floor.
[0057] In an exemplary embodiment, the processor(s) (302) via the reply decoder (434) may further processes and decode envelop samples ?????? for simultaneously decoding Mk-X replies and Mode-S replies. The processor (302) via the de-fruiter block (444) present in reply decoder module (434) may detect a Mode-S reply using a matched filter (446) matched to the Mode-S preamble (234) of Mode-S reply, may generate a threshold using the filtered signal via threshold generator (448), and may threshold the filtered signal via thresholding block (450). Processor(s) (302) may decode the Mode-S signal by enabling the Mode-S decoder module (468) in case a Mode-S preamble (234) is detected via an enable signal EN (452). The processor(s) (302) may simultaneously decode the Mk-X replies and the Mode-S replies (if a valid Mode-S preamble (234) is detected). The processor(s) (302) may generate one or more responses based on the decoded one or more PAM signals and one or more PPM signals with an information of the one or more vehicles. In an exemplary embodiment, the information of the one or more vehicles may include at least one of a classification of the aircraft as friend or foe, aircraft ID, and a destination.
[0058] In an embodiment, in the absence of Mode-S reply (PPM signal), processor(s) (302) may decode the reply signals via Mk-X decoder module (454) using a method for decoding Mk-X replies (PAM signals) which may include the following steps. The processor(s) (302) may detect a leading edge and a trailing edge associated with an Mk-X reply among the Mk-X replies via an edge detector (456), may modify a shape of one or more pulses associated with the Mk-X reply to fit a width via a pulse reshaper (458), and may separate the Mk-X reply signals from the reply signals (102) via a de-garbler (460). The processor(s) (302) may simultaneously decode the separated Mk-X replies via the scheduler (464) scheduling a separate thread for each Mk-X reply and parallelly analyzing and decoding each Mk-X reply (466).
[0059] In an embodiment, the processor(s) (302) may decode the Mode-S replies using the Mode-S decoder module (468) using a method for decoding Mode-S replies (PPM signals) that may include the following steps. The processors (s) (302) may detect a leading edge and a trailing edge associated with a Mode-S reply using the edge detector (470), may modify a shape of one or more pulses associated with the Mode-S reply to fit a width using the pulse reshaper block (472), may decode a unique identification of a vehicle associated with the Mode-S reply via an address/parity block decoder (474), and may determine a validity of Mode-S reply by comparing the unique identification associated with the reply with a unique identification associated with a transmitted signal among the one or more signals using the parity check block (478). The processor (s) (302) may decode a data block associated with the Mode-S reply via data block decoder (476) only if only the aircraft address decoded by parity check block (478) matches with the aircraft address interrogated by a Mode-S interrogation.
[0060] FIG. 5A illustrates the combined flow chart of edge detector (456), pulse reshaper (458) and de-garbler block (460) of Mk-X reply decoder module (454), in accordance with an embodiment of the present disclosure. In an exemplary embodiment, the edge detection, pulse reshaping, and de-garbling via the edge detector (456), pulse reshaper (458), and de-garbler (460) may include the following steps. At step 502, in the edge detector block (456) the samples ?????? (438) out of envelope detector (436) may be first compared with the calculated noise threshold ?????? (442). If the sample (438) crosses threshold (442), the sample may be stored in a temporary signal ?????????? and a counter ?????????????? is incremented in step 504. The samples which are below threshold (442) may be forced to zero value and the counter ?????????????? may be reset in step 506. From the valid stored samples the leading edge ????, trailing edge ???? and pulse width ???? = ?????????????? *1/????= ???? - ???? may also be calculated in step 506. These calculated parameters may then be input to the pulse re-shaper block (458) which may compare ???? with 0.45µs. In check (508) the ???? is compared with ??1. If ???? is less than ??1, then the pulse is discarded as shown in step 510. Else the ???? is compared to ??2 in check (512). If the pulse width ???? is less than ??2 then the pulse may be considered as a valid pulse and its ???? & ???? are stored in a memory ?????????? (462) and ?????????? respectively as shown in step 514. Else, the ???? may be compared with ??3 in check 516. If ???? is greater than ??3 the pulse may be discarded as in step 518, else, the pulse may be declared to be a garble of two overlapping pulses as shown in step 520. In case the PW is less than T3, the amplitude variation within the wide pulse may be compared with a threshold ??1 to find the hidden ???? and ???? as in check (522). If the amplitude variation is at least ??1 as shown in FIG. 5B, the hidden ???? (528, 530) and ???? (532, 534) may be found and stored in ?????????? (464) and ?????????? respectively as shown in step 526. Else, the hidden ???? (536, 538) and ???? (540, 542) positions may be assumed as shown in FIG.5C and stored in ?????????? and ?????????? respectively as shown in step 524. Values of ??1, ??2, ??3 and ??1 may dependent on application and noise levels. In an exemplary embodiment, the following values may be chosen: ??1 as 0.35µs, ??2 as 0.55µs and ??3 as 1.05µs. The value of ??1 may be taken as 4.6 dB.
[0061] FIG. 6 illustrates (600) the flow chart of reply analyser block 466 of Mk-X reply decoder module, in accordance with an embodiment of the present disclosure. In an exemplary embodiment, the scheduler (464) may call (invoke) and control multiple reply analyser threads based on the number of overlapping replies. For each valid ??1 (202) pulse in ?????????? (462), the scheduler may invoke a thread (????h thread) of reply analyser and decoder block (466) as shown in step 602, and may be initialized as shown in step 604. At every increment of SAMPLEcnt (606), the analyser may check for leading edges first at time instances that are at multiples of 1.45µs from ??1(??) as in step 608, and then at time instances that are not at multiples of 1.45µs from ??1(??) as in step 610, where, k is the number of previous threads. In each thread, at time instances of multiples of 1.45µs the shift register ???? may be updated and shifted left once as in steps 614 and 616 depending on the presence of pulse checked using check (612) for presence of a leading edge, and SR decode logic as shown in FIG. 7B may be invoked as shown in step 618. A shifter register ?????????? may also be updated with the average amplitude present in the corresponding pulse and shifted left along with ????.
[0062] FIG. 7A shows the shift register structure (700A) for storing pulse positions of Mk-X replies updated by the reply analyser block (466), in accordance with an embodiment of the present disclosure. In an exemplary embodiment, the shift register may have 32 bits so as to accommodate two nonoverlapping replies. Each time a valid pulse is found by reply analyser (466), the shift register may be updated and shifted left once as shown in FIG. 6. The 31st bit (702) and 17th bit (704) of shift register may correspond to F1 (202) and F2 (230) pulses of a first reply respectively. The 14th bit (706) may correspond to SPI pulse of first reply or a valid pulse of some other reply. The LSB 0th bit (708) of shift register may be storing ??2 pulse of second reply whose F1 may be at 14th bit (706), because the 14th bit and the LSB are separated by 20.3µs. If first reply has an SPI pulse (232) as shown in FIG. 2A, the SPI pulse position may be stored in the 14th bit position (706) of shift register. While decoding the 14th bit (706), the amplitude comparison may be used to identify whether the bit corresponds to SPI of first reply or F1 of second reply.
[0063] FIG. 7B illustrates the flow chart (700B) of reply decoder block (466) using shift register (700A) of Mk-X reply decoder module (454), in accordance with an embodiment of the present disclosure. In an exemplary embodiment, in the reply decoder block (466), the bits of shift register ???? (as shown in FIG. 7A) may be mapped to corresponding pulse positions of Mk-X reply (shown in FIG. 2A). Amplitude comparison may also be done to see whether pulses are part of a single reply or two different replies. After initialization (710), the first decision block (712) may look for the presence of ‘1’ in 31st bit (702) and 17th bit (704) and compares their amplitude. If amplitude variation is less than the set threshold ??2 then amplitudes of 17th bit (704) and 14th bit (706) may be compared if 14th bit is set in check (714). If this value is not less than ??2 then the decision of no SPI pulse in the first reply may be made, and may start mapping the bits 31 to 17 to pulse positions as in step 716. Else, re-checking may be performed to decide whether the 14th bit is an SPI of first reply or F1 of second reply by comparing the amplitude difference between 0th bit (708) &14th bit (706) and the amplitude difference between 14th bit (706) & 17th bit (704) using check (718). If the amplitude difference between the bits (706) & (708) is not less than the amplitude difference between bits 704 & 706, the decision may be made about SPI not being present in 1st reply. Then, bits 31 to 17 of shift register may be mapped to corresponding pulses as in step 722. Otherwise, the decision that the reply has a valid SPI pulse may be made and the bits 31 to 14 of shift register may be mapped to corresponding pulses as in step 720. In an exemplary embodiment, value of ??2 may be taken as 3 dB based on experimental observations of the real data.
[0064] In an aspect the present disclosure relates to a method for decoding Secondary Surveillance Radar (SSR) interrogation replies. The FIG. 8 illustrates an example method (800) for decoding Secondary Surveillance Radar (SSR) interrogation replies, in accordance with an embodiment of the present disclosure. The system, transceiver, referred to in method (300) are similar to system (104) and transceiver (402) shown FIG. 1 and FIG. 4 respectively. The method (800) may include the following steps. At step 802, a system (104) may receive one or more reply signals (102) from one or more vehicles based on one or more signals transmitted to the one or more vehicles, via a transceiver (402). At step 804, the system (104) may determine one or more PPM signals (Mode-S reply) by filtering the one or more reply signals (102) using a matched filter technique. At step 806, the system (104) may determine one or more PAM signals (Mk-X replies) among the one or more reply signals (102). At step 808, the system (104) may simultaneously decode the one or more PAM signals and the one or more PPM signals. At step 810, the system (104) may generate one or more responses, based on the decoded one more PAM signals and the decoded one or more PPM signals with an information of the one or more vehicles.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0065] The present disclosure provides a system and a method for decoding Secondary Surveillance Radars (SSR) interrogation replies from aircraft transponders.
[0066] The present disclosure provides a system and a method for decoding SSR interrogation replies that can handle different overlapped reply signals, to identify reply modes from the reply signals and decode the replies based on their reply modes.
[0067] The present disclosure provides a system and a method for decoding SSR interrogation replies to decode multiple replies parallelly.

, Claims:1. A system (104) for decoding Secondary Surveillance Radar (SSR) interrogation replies, the system (104) comprising:
a transceiver (402) to transmit one or more signals to one or more vehicles and to receive one or more reply signals (102) from the one or more vehicles based on the one or more signals, wherein the transceiver (402) is communicatively coupled to the system (104);
at least one processor (302); and
a memory (304) operatively coupled to the at least one processor (302), wherein said memory (302) stores executable instructions which when executed by the at least one processor (302), cause the at least one processor (302) to:
receive, the one or more reply signals (102), via the transceiver (402);
determine one or more Pulse Position Modulation (PPM) signals by filtering the one or more reply signals (102) using a matched filter technique;
determine one or more Pulse Amplitude Modulation (PAM) signals among the one or more reply signals (102);
simultaneously decode the one or more PAM signals and the one or more PPM signals; and
generate one or more responses based on the decoded one more PAM signals and one or more PPM signals with an information of the one or more vehicles.
2. The system (104) as claimed in claim 1, wherein the method for decoding the one or more PAM signals comprises:
detecting, by the at least one processor (302), a leading edge and a trailing edge associated with a PAM signal among the one or more PAM signals;
modifying, by the at least one processor (302), a shape of one or more pulses associated with the PAM signal to fit a width;
separating, by the at least one processor (302), the one or more PAM signals from the one or more reply signals (102); and
simultaneously decoding, by the at least one processor (302), the separated one or more PAM signals.
3. The system (104) as claimed in claim 1, wherein the method for decoding the one or more PPM signals comprises:
detecting, by the at least one processor (302), a leading edge and a trailing edge associated with a PPM signal;
modifying, by the at least one processor (302), a shape of one or more pulses associated with the PPM signal to fit a width;
decoding, by the at least one processor (302), a unique identification of a vehicle associated with the PPM signal;
determining, by the at least one processor (302), a validity of the PPM signal by comparing the unique identification associated with the PPM signal with a unique identification associated with a transmitted signal among the one or more signals; and
decoding, by the at least one processor (302), a data block associate with the PPM signal, based on the validity of the PPM signal.
4. A method (800) for decoding Secondary Surveillance Radar (SSR) interrogation replies, the method (800) comprising:
receiving (802), by at least one processor (302) associated with a system (104), one or more reply signals (102) from one or more vehicles based on one or more signals transmitted to the one or more vehicles, via a transceiver (402);
determining (804), by the at least one processor (302), one or more PPM signals by filtering the one or more reply signals (102) using a matched filter technique;
determining (806), by the at least one processor (302), one or more PAM signals among the one or more reply signals (102);
simultaneously decoding (808), by the at least one processor (302), the one or more PAM signals and the one or more PPM; and
generating (810), by the at least one processor (302), one or more responses, based on the decoded one or more PAM signals and the decoded one or more PPM signals with an information of the one or more vehicles.
5. The (800) method as claimed in claim 4 wherein the method for decoding the one or more PAM signals comprises:
detecting, by the at least one processor (302), a leading edge and a trailing edge associated with a PAM signal among the one or more PAM signals;
modifying, by the at least one processor (302), a shape of one or more pulses associated with the PAM signal to fit a width;
separating, by the at least one processor (302), the one or more PAM signals from the one or more reply signals (102); and
simultaneously decoding, by the at least one processor (302), the separated one or more PAM signals.
6. The method (800) as claimed in claim 4, wherein the method for decoding the one or more PPM signals comprises:
detecting, by the at least one processor (302), a leading edge and a trailing edge associated with a PPM signal among the one or more PPM signals;
modifying, by the at least one processor (302), a shape of one or more pulses associated with the PPM signal to fit a width;
decoding, by the at least one processor (302), a unique identification of a vehicle associated with the PPM signal;
determining, by the at least one processor (302), a validity of the PPM signal by comparing the unique identification associated with the PPM signal with a unique identification associated with a transmitted signal among the one or more signals; and
decoding, by the at least one processor (302), a data block associate with the PPM signal, based on the validity of the PPM signal.