Description:TECHNICAL FIELD
[0001] The embodiments of the present disclosure generally relate to communication systems. In particular, the present disclosure relates to a system and a method for adaptive receiver tuning, for example, in a communication system.

BACKGROUND
[0002] A transceiver system is a device or a unit that combines the functions of transmission and reception of signals in one integrated unit. The transceivers are commonly used in various fields including telecommunications, networking, and radio frequency (RF) communication. There are different types of transceivers such as RF transceivers, optical transceivers, Software-Defined Radio (SDR) transceivers, and the like. In a fifth generation (5G) radio transceiver system, there are two types of interferences, e.g., in-band interference and out-of-band interference. The out-of-band interference is handled by an analogue RF filter. However, in-band interference management has its challenges. There are two types of in-band interference that influence receiver performance, e.g., adjacent channel interference, and in-channel interference.
[0003] FIG. 1 illustrates an example representation of a conventional radio receiver (100). The conventional receiver (Rx) chain of a base station consists of an antenna, low noise amplifier (LNA), band pass filter (BPF), down converter, analog to digital converter (ADC), and baseband processor which implement digital front end (DFE) block in the low physical (PHY) processing followed by high PHY processing. The antenna receives the required RF signal and an interferer signal. The BPF filters interferer signal present outside its pass bandwidth. The LNA provides a fixed gain to the signals present within its operational bandwidth. The downconverter converts the RF signal to a baseband signal. The ADC quantizes the analog baseband signal based on its resolution. The DFE then performs calibration, digital filtering, and fast Fourier transform (FFT) in the low PHY followed by high PHY uplink processing. The receiver (100) works well when the received signal strength does not have highly varying fluctuations.
[0004] The in-band interference is present in a time domain sample space of the received RF signal. The ADC quantizes a downconverter analogue signal containing the interferer signal and the required signal, with a sampling frequency based on the signal bandwidth. Under a given operating temperature, the ADC resolution of the required signal is affected by high power interferer as well as the bit-width of the ADC. When the operating temperature changes, the electrical characteristics of the ADC may change which impacts the accuracy level of the converter, resulting in errors. Similarly, when the required signal goes below the minimum threshold voltage of the ADC due to interference or temperature effect, the demodulator in a processing layer, cannot decode the modulated signal.
[0005] The current systems are not able to effectively manage the interferer signal level as compared to the required signal for successful decoding of the modulated signal. In the in-band interferer, the performance of ADC is limited by the interferer in case of a higher power. The high interferer power saturates the ADC and reduces the resolution of the low-power signal. Due to lack of adaptive receiver gain adjustment, the ADC enters into saturation. The current systems for receiver tuning are unable to adaptively identify the reliability thresholds. The system performance may be degraded if the reliability threshold is not flexible.
[0006] There is, therefore, a need for an improved system and method for adaptive tuning by overcoming at least the above-mentioned deficiencies in the conventional systems and methods.

OBJECTS OF THE PRESENT DISCLOSURE
[0007] An object of the present disclosure is to provide a system and a method for adaptive receiver tuning.
[0008] Another object of the present disclosure is to effectively manage an interferer signal level for successful decoding a modulated signal.
[0009] Another object of the present disclosure is to provide thermal management, by effectively dissipating heat and minimizing temperature fluctuations.

SUMMARY
[0010] In an aspect, the present disclosure relates to a system for adaptive tuning. The system includes a baseband processor and a memory. The memory is operatively coupled with the baseband processor, including instructions which, when executed, by the baseband processor. The memory causes the system to determine whether a voltage level of an input signal exceeds a threshold voltage value of one of a first low noise amplifier (LNA) and a second LNA. The input signal includes a required signal and an interferer signal. If the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA or the second LNA, the system is configured to activate a termination switch to ground the input signal. If the voltage level of the input signal does not exceed the threshold voltage value, the system is configured to perform adaptive gain adjustment of an output signal generated by a digital step attenuator corresponding to the input signal, by calibrating at least one of: an attenuation vector of the digital step attenuator, threshold input voltages corresponding to an analogue to digital converter (ADC), and gain corresponding to the first LNA and the second LNA, based on an operating temperature of the system, and adjusting an operating mode of a plurality of modes of the second LNA and the attenuation vector based on a power detector output voltage.
[0011] In an embodiment, to perform the adaptive gain adjustment, the system may be configured to determine a minimum input voltage and a maximum input voltage corresponding to the ADC, compare a voltage of the output signal with the minimum input voltage and the maximum input voltage, and adaptively adjust the attenuation vector of the digital step attenuator based on the comparison.
[0012] In an embodiment, to adaptively adjust the attenuation vector of the digital step attenuator, the system may be configured to perform one of reduce the attenuation vector by a first delta value in response to a determination that the voltage of the output signal is less than the minimum input voltage or increase the attenuation vector by a second delta value in response to a determination that the voltage of the output signal is greater than the maximum input voltage or else, continue with uncalibrated attenuation vector.
[0013] In an embodiment, the first delta value may be a difference between the minimum input voltage and the voltage of the output signal, and the second delta value may be a difference between the voltage of the output signal and the maximum input voltage.
[0014] In an embodiment, the threshold input voltages may include a minimum input voltage and a maximum input voltage corresponding to the ADC, and the threshold input voltages may be based on an offset error, a gain drift error, and uncalibrated voltage value of the ADC.
[0015] In an embodiment, to determine whether the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA or the second LNA, the system may be configured to compare input voltage corresponding to the first LNA with the threshold voltage value of the first LNA, compare input voltage corresponding to the second LNA with the threshold voltage value of the second LNA, and in response to the input voltage corresponding to the first LNA being greater than the threshold voltage value of the first LNA or the input voltage corresponding to the second LNA being greater than the threshold voltage value of the second LNA, activate the terminating switch to ground the input signal.
[0016] In an embodiment, in response to a determination that the input voltage corresponding to the second LNA is less than the threshold voltage value of the second LNA, the system may be configured to compare the power detector output voltage with a threshold voltage value of the digital step attenuator, in response to the power detector output voltage being greater than the threshold voltage value of the digital step attenuator, adjust the operating mode of the second LNA to a bypass mode, or in response to the power detector output voltage being less than the threshold voltage value of the digital step attenuator, perform the adaptive gain adjustment of the output signal.
[0017] In an embodiment, the plurality of modes of the second LNA may include an active mode for amplifying the input signal; a bypass mode for bypassing the second LNA, and an isolation mode for grounding the input signal.
[0018] In an embodiment, the system may be configured to determine whether the operating temperature of the system is greater than a predefined threshold temperature value, in response to the operating temperature being greater than the predefined threshold temperature value, calibrate said at least one of: the attenuation vector of the digital step attenuator, the threshold input voltages corresponding to the ADC, and the gain corresponding to the first LNA and the second LNA, and in response to the operating temperature being less than the predefined threshold temperature value, perform the adaptive gain adjustment using previous calibrated values for said at least one of: the attenuation vector of the digital step attenuator, the threshold input voltages corresponding to the ADC, and the gain corresponding to the first LNA and the second LNA.
[0019] In an embodiment, to perform the calibration, the system may be configured to retrieve information from a lookup table corresponding to the operating temperature, the lookup table having temperature as input with corresponding gain of the first LNA and gain of the second LNA as output.
[0020] In an embodiment, to calibrate the gain of the first LNA, the system may be configured to adjust the operating mode of the second LNA to a bypass mode, and to calibrate the gain of the second LNA, the system may be configured to adjust the operating mode of the second LNA to an active mode.
[0021] In an embodiment, the previous calibrated values may be retrieved from a lookup table having temperature and frequency as input, and gain of the first LNA and gain of the second LNA as output.
[0022] In an embodiment, the system may be configured to remove the interferer signal from the output signal by removing in-band interferer signal and in-channel interferer signal to generate the required signal, apply equivalent digital gain corresponding to the adaptive gain adjustment to the required signal, and decode the required signal.
[0023] In an embodiment, the in-band interferer signal may be removed via a low pass filter, and the in-channel interfere signal may be removed via mask filtering.
[0024] In another aspect, the present disclosure relates to a method for adaptive tuning. The method includes determining, by a baseband processor associated with a system, whether a voltage level of an input signal exceeds a threshold voltage value of one of a first LNA and a second LNA. The input signal includes a required signal and an interferer signal. If the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA or the second LNA, the method includes activating, by the baseband processor, a termination switch to ground the input signal. If the voltage level of the input signal does not exceed the threshold voltage value, the method includes performing, by the baseband processor, adaptive gain adjustment of an output signal generated by a digital step attenuator corresponding to the input signal, by calibrating at least one of: an attenuation vector of the digital step attenuator, threshold input voltages corresponding to an ADC, and gain corresponding to the first LNA and the second LNA, based on an operating temperature of the system, and adjusting an operating mode of a plurality of modes of the second LNA and the attenuation vector based on a power detector output voltage.

BRIEF DESCRIPTION OF DRAWINGS
[0025] The accompanying drawings, which are incorporated herein, and constitute a part of this invention, illustrate exemplary embodiments of the disclosed methods and systems in which like reference numerals refer to the same parts throughout the different drawings. Components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present invention. Some drawings may indicate the components using block diagrams and may not represent the internal circuitry of each component. It will be appreciated by those skilled in the art that the invention of such drawings includes the invention of electrical components, electronic components, or circuitry commonly used to implement such components.
[0026] FIG. 1 illustrates an example representation of a conventional radio receiver.
[0027] FIG. 2 illustrates a representation of an architecture of a system for adaptive tuning, in accordance with an embodiment of the present disclosure.
[0028] FIG. 3 illustrates an exemplary architecture of attenuation cells in a digital signal attenuator (DSA) of the system, in accordance with an embodiment of the present disclosure.
[0029] FIG. 4 illustrates a flow chart of an example method for thermal calibration, in accordance with an embodiment of the present disclosure.
[0030] FIGs. 5A-5C illustrate gain characteristics of low noise amplifier (LNA) for three modes, in accordance with embodiments of the present disclosure.
[0031] FIG. 6 illustrates a flow chart of an example method for automatic calibration of LNA, in accordance with an embodiment of the present disclosure.
[0032] FIGs. 7A and 7B illustrate schematic representations of offset error drift and gain error drift in analog to digital converter (ADC), respectively, in accordance with embodiments of the present disclosure.
[0033] FIGs. 8A and 8B illustrate schematic representations of attenuation error in DSA, in accordance with embodiments of the present disclosure.
[0034] FIG. 9 illustrates a flow chart of an example method for automatic gain control, in accordance with an embodiment of the present disclosure.
[0035] FIG. 10 illustrates an example block diagram of a baseband processor for interference cancellation, in accordance with an embodiment of the present disclosure.
[0036] FIG. 11 illustrates a flow chart of an example method for interference cancellation, in accordance with an embodiment of the present disclosure.
[0037] FIG. 12 illustrates a block diagram representing a computer system for adaptive receiver tuning, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION OF INVENTION
[0038] In the following description, for the purposes of explanation, various specific details are set forth in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent, however, that embodiments of the present disclosure may be practiced without these specific details. Several features described hereafter can each be used independently of one another or with any combination of other features. An individual feature may not address all of the problems discussed above or might address only some of the problems discussed above. Some of the problems discussed above might not be fully addressed by any of the features described herein.
[0039] Various embodiments of the present disclosure will be explained in detail with reference to FIGs. 2-12.
[0040] FIG. 2 illustrates a representation of an architecture of a system (200) for adaptive tuning, in accordance with an embodiment of the present disclosure.
[0041] In an embodiment, and as shown in FIG. 2, the system (200) may include a baseband processor (202). Among other capabilities, the baseband processor (202) may be configured to fetch and execute computer-readable instructions stored in a memory (e.g., 1216 of FIG. 12) of the system (200). The memory (1216) may store one or more computer-readable instructions or routines, which may be fetched and executed for adaptive receiver tuning. The memory (1216) is operatively coupled with the baseband processor (202), including instructions which, when executed, by the baseband processor (202), cause the system (200) to perform the methods discussed herein.
[0042] As shown, the system (200) includes an antenna (204), a transmitter (TX)/receiver (RX) switch (206), a termination switch (208), a termination block (210), a band pass filter (BPF) (212), a first low noise amplifier (LNA) (214A), a second LNA or a 3-mode LNA (214B), a digital step attenuator (DSA) (216), a power detector (PD) (218), a temperature monitoring unit (TMU) (220), a local oscillator (LO) (224), and an analog to digital converter (ADC) (226). In an embodiment, the baseband processor (202) includes a digital front end (DFE) module (202-1), a slow rate automatic gain control (AGC) module (202-2), and interference cancellation module (202-3). In an embodiment, the DFE module (202-1) performs temperature/thermal calibration.
[0043] The 3rd Generation Partnership Project (3GPP) specifies seven radio conformance tests to measure a receiver’s ability to get a throughput >= 95% of the maximum throughput of the reference wanted signal channel. The seven radio conformance tests are reference sensitivity level, which tests minimum wanted signal level; dynamic range, which tests the signal in the presence of additive white gaussian noise (AWGN) interferer; in-band selectivity and blocking, which tests the wanted signal in the presence of a new radio (NR) interferer occupying the adjacent channel with a fixed frequency offset to the wanted signal band boundary; out-of-band blocking, which tests the wanted signal in the presence of a continuous wave interferer lying outside the operating band of a wanted signal; receiver spurious emission, which tests the wanted signal in the presence of unwanted receiver spurious emission amplified at the receiver seen at the antenna connector; receiver intermodulation, which tests the wanted signal in the presence of two interferers, e.g., continuous wave signal, and QPSK modulated NR signal, where the frequency offsets of the interfering signals are set such that third and higher-order mixings of these interferers lie in the wanted signal band; and in-channel selectivity, which tests the wanted signal in the presence of a high-power spectral density interferer lying next to the wanted signal.
[0044] To pass the dynamic range and receiver spurious emission tests, the receive chain requires the BPF (212). To pass reference sensitivity, in-band selectivity and blocking, out-of-band blocking, receiver intermodulation, and in-channel selectivity tests, the receive chain requires LNA (214A, 214B). However, the gain needs to be applied in a controlled manner such that it amplifies the low-power wanted signal to fully utilize the resolution of the ADC (226) and make the signal decodable, and does not saturate the ADC (226) in the presence of high-power interferer. To perform the gain adjustment, the Rx chain, as shown in FIG. 2, consists of the termination switch (208), 3-mode LNA (214B), PD (218), DSA (216), ADC (226), low PHY performing temperature calibration, AGC module (202-2), and interference cancellation module (202-3), and high PHY for digital gain adjustment and symbol decoding.
[0045] In an embodiment, the termination switch (208) may be a Single Pole Double Throw (SPDT) switch which allows an input signal to pass through only when its voltage level is below the maximum permissible value of both LNAs (214A, 214B). When a high power interferer arrives at the receiver antenna (204) such that the incoming signal voltage exceeds the LNA threshold voltage, then the RF signal is passed to the termination block (210) where the signal is passed to the ground.
[0046] In an embodiment, the second LNA (214B) operates in a plurality of modes including an active mode, a bypass mode, and an isolation mode. In the active mode, the second LNA (214B) amplifies the input signal. In the bypass mode, the second LNA (214B) is bypassed, i.e. no amplification is done. In the isolation mode, the signal is not passed.
[0047] In an example embodiment, as shown in Table 1 below, the modes of the second LNA (214B) are controlled by (Voltage Supply Bypass) and (Voltage Supply Drain) pins and the LNA gain.

LNA Modes Gain (dB)
0 0 Active 22
0 1 Isolation 20dB isolation
1 x Bypass -2
Table 1
[0048] In an embodiment, where the required signal power is extremely low, i.e. falling below the noise floor, it becomes necessary to enhance the signal strength. To achieve this, the second LNA (214B) is operated in the active mode. In the active mode, a lower voltage is supplied to both the and pins, thereby amplifying the received signal.
[0049] In another embodiment, bypass mode may be activated when the power of the interferer signal exceeds acceptable levels, potentially leading to test case failures or saturation of the ADC (226). For bypass mode, the pin is powered by a high voltage. Regardless of the supply level, the second LNA (214B) may be automatically switched to the bypass mode.
[0050] In another embodiment, isolation mode provides a surge protection mechanism. The scenarios, where the received signal power is higher than the acceptable signal power such that it can damage the ADC (226), the isolation mode is turned on. Here, is powered by lower voltage and is powered by higher voltage. In the isolation mode, the signal passing through the second LNA (214B) is grounded.
[0051] In an embodiment, the DSA (216) provides fine RX gain tuning. The high gain provided by the LNA (214A) leads to ADC saturation in the presence of high-power interferer, like in the in-band selectivity and Rx intermodulation scenarios. To decode the low power wanted signal, like in the reference sensitivity scenario, high gain LNA is necessary. Thus, after 3-mode LNA (214B), digital step attenuation is required to fine-tune the Rx gain.
[0052] The DSA (216) provides a control interface that allows a user to set the desired attenuation level. The interface may be serial (e.g., SPI or I2C) or parallel, depending on the specific design of the attenuator. The DSA (216) receives an RF signal at its input. The signal may come from a transmitter, receiver, or any other RF source. Inside the DSA (216), there are several attenuation cells as shown in representation (300) of FIG. 3. Each cell has resistors to introduce a specific attenuation to the RF signal passing through it. The attenuation cells have a switch that can turn on or off by a control logic. When a switch is turned on, it allows the RF signal to pass through the corresponding attenuation path. After passing through the attenuation cells, the attenuated signals from each path are combined at a summing junction. The final attenuated output signal is then sent out of the DSA (216).
[0053] Referring to FIG. 2, attenuation decision of the DSA (216) is based on the voltage level detected by the PD (218). The PD (218) uses a high-frequency diode which receives the amplified RF signal that needs to be measured. When the RF signal, that is alternating current, is applied to the detector diode, it rectifies the RF signal, converting it into a varying DC voltage. Since the diode works in the square-law region, the output of the diode is the square of DC voltage amplitude.
[0054] Referring to FIG. 2, the baseband processor (202) performs adaptive gain adjustment in two steps, i.e., calibrating at least one of: ADC threshold input voltages, i.e. minimum absolute input voltage, , and maximum absolute input voltage, LNA gain, and (iii) DSA attenuation vector, , according to the operating temperature of the system (200); and adjusting the LNA operating modes, and DSA attenuation vector, , as per the PD output voltage, .
[0055] In an embodiment, the DFE module (202-1) performs thermal calibration. The operating temperature of the system (200) varies from -40°C to +125°C and heat dissipation by the RF chain impacts the electrical characteristics of the RF and baseband components used in the system (200). The receiver components that change the gain and hence, the signal’s strength are LNA (214A, 214B), DSA (216), and ADC (226). To perform thermal calibration, the TMU (220) sends the operating temperature of the receiver chain to the DFE module (202-1). FIG. 4 illustrates a flow chart of an example method (400) for thermal calibration, in accordance with an embodiment of the present disclosure. At (402), the method (400) includes reading a value of the operating temperature or temperature variation ) from the TMU (220). At (404), the method (400) includes determining whether the temperature variation is greater than a predefined threshold temperature value. If the temperature variation, is greater than the predefined threshold temperature value, for example 1°C, then at (406), the method (400) includes calibrating at least one of: attenuation vector of the DSA (216), the threshold input voltages corresponding to the ADC (226), and the gain corresponding to the first LNA (214A) and the second LNA (214B). In an embodiment, the calibration may be performed in two ways, i.e. in-factory calibration, and run-time calibration. Due to long time usage, the RF and baseband components change their characteristics, and therefore, automatic run-time calibration of the system (200) is required.
[0056] In an embodiment, to perform the calibration, information may be retrieved from a lookup table corresponding to the operating temperature, where the lookup may have temperature as input with corresponding gain of the first LNA (106A) and gain of the second LNA (106B) as output. To calibrate the calibrate the gain of the first LNA (214A), the operating mode of the second LNA (214B) may be adjusted to the bypass mode, and to calibrate the gain of the second LNA (214B), the operating mode of the second LNA (214B) may be adjusted to the active mode.
[0057] Referring to FIG. 4, if the temperature variation, is less than the predefined threshold temperature value, then at (408), the method (400) includes performing adaptive gain adjustment using previous calibrated values. The previous calibrated values may be retrieved from a lookup table having temperature and frequency as input, and gain of the first LNA (214A) and gain of the second LNA (214B) as output.
[0058] The heat generated within the LNA (214A, 214B) due to power dissipation may lead to temperature rise and thermal effects. Higher temperatures may impact the behaviour of active components, including transistors, leading to, for example, thermal noise, changes in device parameters, and thermal runaway. These effects may contribute to variations in gain i.e. gain will reduce with increasing temperature. In FIGs. 5A-5C, LNA gain characteristics are given for three modes, as an example embodiment. For example, FIG. 5A illustrates LNA gain characteristics in active mode, FIG. 5B illustrates LNA gain characteristics in bypass mode, and FIG. 5C illustrates LNA gain characteristics in isolation mode. It can be seen in FIG. 5A that in LNA active mode, there is a difference of 2 dB gain when the operating temperature changes from minimum to maximum.
[0059] In an embodiment, LNA gain calibration may be performed using a thermal chamber. The LNA gain calibration starts by setting up a Vector Network Analyzer (VNA) with appropriate calibration and measurement settings. After setting VNA, the LNA (216) may be connected to the VNA and proper RF connections may be ensured. The settings may be done in a temperature-controlled environment. The frequency range of interest may be swept on the VNA while recording S-parameter measurements for each LNA gain setting at each temperature point. The S-parameters or the scattering parameters may represent the linear characteristics of RF electronic circuits and components. For each LNA gain setting and at multiple temperature points within the specified range, the frequency sweep may be repeated. After final sweeping, a lookup table may be created where temperature and frequency serve as input indices, and the corresponding LNA gain is the output. In another embodiment, by referencing the lookup table corresponding to the observed temperature, the appropriate LNA gain setting may be retrieved. The retrieved information may be utilized by the AGC module (202-2) to control the RF analogue gain, which ensures optimal signal amplification under varying temperature conditions.
[0060] FIG. 6 illustrates a flow chart of an example method (600) for automatic calibration of LNA (214A, 214B), in accordance with an embodiment of the present disclosure. In an embodiment, , LNA gain calibration may be performed by increasing board temperature by its continuous operation. At (602), the method (600) includes continuous operation of the board by sending a fixed gain signal in the transmit direction through a transmit chain to increase the board temperature. At (604), after increasing the board temperature, the fixed gain signal is sent to the receiver from an internal calibration loopback. The transmit output may be connected to receive input. For automating the thermal calibration, the operating temperature or temperature variation (?T) is monitored continuously using the TMU (220). At (606), the method (600) includes determining if the temperature variation is greater than the predefined threshold temperature value. If the temperature variation is greater than the predefined threshold temperature value, calibration of the LNA (214A, 214B) is performed.
[0061] The PD readings are closely monitored to gauge the gain or loss introduced by the transmit chain. For calibrating the gain of the first LNA (214A), the second LNA (214B) is set to bypass mode at (608). This allows the PD (218) to precisely detect the output power of the second LNA (214A). Upon calibrating the first LNA gain for the given temperature, the gain of the second LNA (214B) is calibrated by setting the second LNA (214B) in the active mode at (610). After calibration of the first LNA (214A) and the second LNA (214B), a lookup table is created at (612), where temperature serves as input indices, and the corresponding the first LNA (214A) and the second LNA (214B) gain as the output. In an embodiment, with the reference of the lookup table corresponding to the observed temperature, the appropriate LNA gain setting may be retrieved. The observed temperature and the LNA setting retrieved from the lookup table, may be utilized by AGC module (202-2) to control the RF analogue gain.
[0062] FIGs. 7A and 7B illustrate schematic representations of offset error drift and gain error drift in ADC (226), respectively, in accordance with embodiments of the present disclosure. In an embodiment, the deviation of the operating temperature changes the reference voltage, , and gain, , of the ADC (226), which may result in a change in the transfer function which leads to an offset error and a gain error. The offset error either scales up or scales down the digital output of the ADC (226) as compared to the ideal value, and the gain error changes the slope of the transfer function. To compensate for these errors, the digital output value may be calculated as shown below:
,
wherein is the gain error, is the offset error, is the uncalibrated value, and is calibrated value.
[0063] In an embodiment, for determining the offset error and the gain error, two test signals may be passed to the ADC (226), and the corresponding digital output voltages may be measured. For example, considering, V and V are two voltages that are passed to the ADC (226) and V and V are the corresponding digital outputs. The gain and offset errors may be measured as shown below:


[0064] The and values may be determined by providing the power supplies and by external voltages via switches. The switches may be controlled by the DFE module (202-1) in the baseband processor (202).
[0065] FIGs. 8A and 8B illustrate schematic representations of attenuation error in DSA (216), in accordance with embodiments of the present disclosure. In an aspect, DSA (216) usually has thermal management measures in place, such as heat sinks or thermal pads, to dissipate heat effectively and minimize temperature fluctuations. The DSA (216) shows a little error in the attenuation with temperature variation. As shown in FIGs. 8A and 8B, attenuation error increases with attenuation level. To calibrate the attenuation, the look up table approach may be used with attenuation level as an input and attenuation error as an output.
[0066] FIG. 9 illustrates a flow chart of an example method (900) for automatic gain control, in accordance with an embodiment of the present disclosure. AGC is adapted to control the RF analog gain of the receive chain. The AGC is implemented in the low-PHY of the baseband processor (202). Based on the output of the PD (218) and the ADC (226) configuration, the AGC changes the position of the termination switch (208), the operating mode of the second LNA (214B), and attenuation setting of the DSA (216).
[0067] Referring to FIG. 9, at (902), the method (900) includes determining LNA gain, DSA attenuation, and ADC gain and offset errors from the thermal calibration block or the DFE module (202-1). At (904), the method (900) includes determining, by the PD (218), an output voltage corresponding to the second LNA (214B). At (906), the method (900) includes determining an input voltage corresponding to the first LNA (214A) (VLNA1). In an embodiment, the method (900) includes determining whether a voltage level of an inputs signal exceeds a threshold voltage value of one of the first LNA (214A) or the second LNA (214B) such that the inputs signal includes the required signal and the interferer signal, as discussed herein. For example, at (908), the method (900) includes determining if the input voltage corresponding to the first LNA (214A) is greater than the threshold voltage value of the first LNA (214A).
[0068] If the input voltage corresponding to the first LNA (214A) ( ) exceeds the threshold voltage value ( ), then at (910), the method (900) includes activating the termination switch (208) to terminate/ground the input signal. Else, at (912), the method (900) includes calculating an input voltage corresponding to the second LNA (214B). At (914), if the input voltage corresponding to the second LNA (214B) ( ) exceeds the threshold voltage value ( , the method (900) goes to (910). If the input voltage ( ) is less than the threshold voltage value ( ), then at (916), the method (900) includes determining whether the PD output voltage ( ) is greater than a threshold voltage corresponding to the DSA (216) ( ). If the PD output voltage ( is higher than the DSA threshold ), then at (918), the method (900) includes operating the second LNA (214B) at the bypass mode.
[0069] At (920), the method (900) includes rechecking whether the PD output voltage ( is greater than the DSA threshold ( ). If is still greater than then the method (900) goes to (910) to terminate the signal. Else, the method (900) includes performing adaptive gain adjustment of an output signal generated by the DSA (216) corresponding to the input signal. For example, the method (900) may include calibrating at least one of: an attenuation vector of the DSA (216), threshold input voltages corresponding to the ADC (226), and gain corresponding to the first LNA (214A) and the second LNA (214B), based on an operating temperature of the system (200), and adjusting an operating mode of a plurality of modes of the second LNA (214B) and the attenuation vector based on the power detector output voltage.
[0070] Referring to FIG. 9, for automatic gain adjustment, at (922), the method (900) includes calculate the DSA output voltage by adjusting the DSA current attenuation. At (924), the method (900) includes determining a minimum input voltage and maximum input voltage ( ) corresponding to the ADC (226) based on the DSA output voltage and the ADC reference voltage ( . In an aspect, by considering a bipolar ADC, is and is the maximum permissible ADC input voltage beyond which the ADC (226) may saturate. Since the input to the ADC (226) is an Orthogonal Frequency-Division multiplexing (OFDM) symbol of high peak to average power ratio (PAPR), and are uncalibrated values. Based on the offset error and gain drift error of the ADC (226), calibrated values of and may be calculated. Further, the method (900) includes comparing the voltage of the output signal ( ) with the and . the attenuation vector of the DSA (216) may be adaptively adjusted based on the comparison. For example, at (926), the method (900) includes determining whether the voltage of the output signal ( ) is less than the minimum input voltage ( , and at (928), the method (900) includes determining whether the voltage of the output signal ( ) is greater than the maximum input voltage ).
[0071] If VDSA is greater than or less than Vmax, then at (930) and (932), there is no change in the DSA attenuation. If VDSA is less than , then at (934), the method (900) includes reducing the attenuation vector by a first delta value. In an embodiment, the first delta value is a difference between the minimum input voltage ( and the voltage of the output signal (VDSA). If VDSA is greater than Vmax, then at (936), the method (900) includes increasing the attenuation vector by a second delta value. In an embodiment, the second delta value is a difference between the voltage of the output signal (VDSA) and the maximum input voltage (Vmax).
[0072] FIG. 10 illustrates an example block diagram (1000) of a baseband processor (202) for interference cancellation, in accordance with an embodiment of the present disclosure.
[0073] In an embodiment, the digital signal processing (DSP) of the input signal is performed in the baseband processor (202). The baseband processor (202) implements low PHY and high PHY. The low PHY is configured to implement the DFE which includes signal calibration, digital filtering module (1102), AGC module (202-2), and cyclic prefix (CP) removal and FFT module (1104). The high PHY is configured to implement a mask filtering module (1106), a digital gain adjustment module (1108) followed by signal decoding, PHY channel analysis, symbol decoding, error detection, and correction. In an embodiment, during interference cancellation, the output of the thermal calibration or DFE module (202-1) may be provided to AGC module (202-2) for digital gain adjustment, i.e. via the digital gain adjustment module (1108).
[0074] FIG. 11 illustrates a flow chart of an example method (1100) for interference cancellation, in accordance with an embodiment of the present disclosure.
[0075] At (1102), the digital output of the ADC (226) is read, which may include the high-power interferer signal and the low-power required signal. At (1104), a low pass finite impulse response (FIR) filter may be applied to remove the interferer signal. As the interferer signal is present close to the required signal, the passband frequency, stopband frequency, passband ripple, and stopband attenuation are optimized to minimize the filter order. At (1106), CP removal may be performed and DFT for OFDM demodulation may be performed.
[0076] At (1108), if the high-power interferer signal is present in the adjacent sub-carrier frequency of the required signal, then the interferer signal needs to be removed by performing mask filtering in the frequency domain. The OFDM demodulation converts the signal into a frequency domain. Further, masking operation is performed on the required signal sub-carrier frequencies. For example, considering 2048 point FFT is performed while OFDM demodulation, wanted signal and interferer are present from sub-carrier locations 1 to 50 and 51 to 100, respectively, then a 4096x1 vector of zeros is created and wanted signal sub-carriers are copied to 1 to 50 indices of a zero vector. The output of the mask filtering includes only the required signal. However, the amplitude of the required signal is severely impacted by ADC gain adjustment done by the AGC module (202-2) to protect the RF component and ADC (226).
[0077] At (1110), it is determined if the analogue gain is adjusted by the AGC module (202-2). If the analogue gain is adjusted, then at (1112), equivalent digital gain on filtered required signal is applied to balance the required signal gain, and then the method (1100) goes to (1114). If the analogue gain is not adjusted, then at (1114), the required signal is sent to high PHY components for symbol decoding.
[0078] FIG. 12 illustrates a block diagram representing a computer system (1200) for adaptive receiver tuning, in accordance with an embodiment of the present disclosure. The system (1200) for adaptive receiver tuning includes a bus (1208), communication port(s) (1210), a processor (1212), an external storage device (1214), and a memory (1216). The memory (1216) may include a main memory (1202), a read-only memory (1204), and a mass storage memory (1206). The system (1200) may include more than one processor (1212) and communication ports (1210). The communication port(s) (1210) may be any of an RS- 232 port for use with a modem-based dialup connection, a 10/100 Ethernet port, a Gigabit or 10 Gigabit port using copper or fibre, a serial port, a parallel port, or other existing or future ports. The communication port(s) (1210) may be chosen depending on a network, such a Local Area Network (LAN), Wide Area Network (WAN), or any network to which the system (1200) connects. The main memory (1202) may be a random-access memory (RAM), or any other dynamic storage device commonly known in the art. The read-only memory (1204) may be any static storage device(s) including, but not limited to, Programmable Read Only Memory (PROM) chips for storing static information e.g., start-up or basic input/output system (BIOS) instructions for the processor (1212). The mass storage memory (1206) may be any current or future mass storage solution, which may be used to store information and/or instructions. Exemplary mass storage solutions include, but are not limited to, Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment (SATA) hard disk drives or solid-state drives (internal or external, e.g., having Universal Serial Bus (USB) and/or Firewire interfaces).
[0079] The bus (1208) communicatively couples the processor (1212) with the other memory, storage, and communication blocks. The bus (1208) can be, a Peripheral Component Interconnect (PCI)/PCI Extended (PCI-X) bus, a Small Computer System Interface (SCSI), a universal serial bus (USB), or the like, for connecting expansion cards, drives, and other subsystems as well as other buses, such a front side bus (FSB), which connects the processor (1212) to the system (1200).
[0080] Optionally, operator and administrative interfaces, e.g. a display, keyboard, and a cursor control device, may also be coupled to the bus (1208) to support direct operator interaction with the system (1200). Other operator and administrative interfaces may be provided through network connections connected through the communication port(s) (1210). In some embodiments, the external storage device (1214) may be any kind of external hard-drives, floppy drives, Compact Disc - Read Only Memory (CD-ROM), Compact Disc - Re-Writable (CD-RW), Digital Video Disk - Read Only Memory (DVD-ROM). Components described above are meant only to exemplify various possibilities. In no way should the aforementioned exemplary computer system (1200) limit the scope of the present disclosure.
[0081] While considerable emphasis has been placed herein on the preferred embodiments, it will be appreciated that many embodiments can be made and that many changes can be made in the preferred embodiments without departing from the principles of the invention. These and other changes in the preferred embodiments of the invention will be apparent to those skilled in the art from the disclosure herein, whereby it is to be distinctly understood that the foregoing descriptive matter to be implemented merely as illustrative of the invention and not as limitation.

ADVANTAGES OF THE PRESENT DISCLOSURE
[0082] The present disclosure provides adaptive receiver tuning for effectively managing an interferer signal level for successful decoding a modulated signal.
[0083] The present disclosure provides thermal management, by effectively dissipating heat and minimizing temperature fluctuations.
[0084] The present disclosure provides mask filtering, digital gain adjustment followed by signal decoding, for removing the interferer signal(s).
, Claims:1. A system (200) for adaptive tuning, comprising:
a baseband processor (202); and
a memory (1216) operatively coupled with the baseband processor (202), comprising instructions which, when executed, by the baseband processor (202), cause the system (200) to:
determine whether a voltage level of an input signal exceeds a threshold voltage value of one of a first low noise amplifier, LNA, (214A) and a second LNA (214B), the input signal comprising a required signal and an interferer signal;
in response to a determination that the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA (214A) or the second LNA (214B), activate a termination switch (208) to ground the input signal;
else, perform adaptive gain adjustment of an output signal generated by a digital step attenuator (216) corresponding to the input signal, by:
calibrating at least one of: an attenuation vector of the digital step attenuator (216), threshold input voltages corresponding to an analogue to digital converter, ADC, (226), and gain corresponding to the first LNA (214A) and the second LNA (214B), based on an operating temperature of the system (200); and
adjusting an operating mode of a plurality of modes of the second LNA (214B) and the attenuation vector based on a power detector output voltage.
2. The system (200) as claimed in claim 1, wherein to perform the adaptive gain adjustment, the system (200) is configured to:
determine a minimum input voltage and a maximum input voltage corresponding to the ADC (226);
compare a voltage of the output signal with the minimum input voltage and the maximum input voltage; and
adaptively adjust the attenuation vector of the digital step attenuator (216) based on the comparison.
3. The system (200) as claimed in claim 2, wherein to adaptively adjust the attenuation vector of the digital step attenuator (216), the system (200) is configured to perform one of:
reduce the attenuation vector by a first delta value in response to a determination that the voltage of the output signal is less than the minimum input voltage; or
increase the attenuation vector by a second delta value in response to a determination that the voltage of the output signal is greater than the maximum input voltage; or
else, continue with uncalibrated attenuation vector.
4. The system (200) as claimed in claim 3, wherein the first delta value is a difference between the minimum input voltage and the voltage of the output signal, and wherein the second delta value is a difference between the voltage of the output signal and the maximum input voltage.
5. The system (200) as claimed in claim 1, wherein the threshold input voltages comprise a minimum input voltage and a maximum input voltage corresponding to the ADC (226), and wherein the threshold input voltages are based on: an offset error, a gain drift error, and uncalibrated voltage value of the ADC (226).
6. The system (200) as claimed in claim 1, wherein to determine whether the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA (214A) or the second LNA (214B), the system (200) is configured to:
compare an input voltage corresponding to the first LNA (214A) with the threshold voltage value of the first LNA (214A);
compare an input voltage corresponding to the second LNA (214B) with the threshold voltage value of the second LNA (214A); and
in response to the input voltage corresponding to the first LNA (214A) being greater than the threshold voltage value of the first LNA (214A) or the input voltage corresponding to the second LNA (214B) being greater than the threshold voltage value of the second LNA (214B), activate the terminating switch (208) to ground the input signal.
7. The system (200) as claimed in claim 6, configured to:
in response to a determination that the input voltage corresponding to the second LNA (214B) is less than the threshold voltage value of the second LNA (214B), compare the power detector output voltage with a threshold voltage value of the digital step attenuator (216); and
in response to the power detector output voltage being greater than the threshold voltage value of the digital step attenuator (216), adjust the operating mode of the second LNA (214B) to a bypass mode; or
in response to the power detector output voltage being less than the threshold voltage value of the digital step attenuator (216), perform the adaptive gain adjustment of the output signal.
8. The system (200) as claimed in claim 1, wherein the plurality of modes of the second LNA (214B) comprises: an active mode for amplifying the input signal; a bypass mode for bypassing the second LNA (214B), and an isolation mode for grounding the input signal.
9. The system (200) as claimed in claim 1, configured to:
determine whether the operating temperature of the system (200) is greater than a predefined threshold temperature value; and
in response to the operating temperature being greater than the predefined threshold temperature value, calibrate said at least one of: the attenuation vector of the digital step attenuator (216), the threshold input voltages corresponding to the ADC (226), and the gain corresponding to the first LNA (214A) and the second LNA (214B); or
in response to the operating temperature being less than the predefined threshold temperature value, perform the adaptive gain adjustment using previous calibrated values for said at least one of: the attenuation vector of the digital step attenuator (216), the threshold input voltages corresponding to the ADC (226), and the gain corresponding to the first LNA (214A) and the second LNA (214B).
10. The system (200) as claimed in claim 9, wherein to perform the calibration, the system (200) is configured to retrieve information from a lookup table corresponding to the operating temperature, the lookup table having temperature as input with corresponding gain of the first LNA (214A) and gain of the second LNA (214B) as output.
11. The system (200) as claimed in claim 10, wherein to calibrate the gain of the first LNA (214A), the system (200) is configured to adjust the operating mode of the second LNA (214B) to a bypass mode, and wherein to calibrate the gain of the second LNA (214B), the system is configured to adjust the operating mode of the second LNA (214B) to an active mode.
12. The system (200) as claimed in claim 9, wherein the previous calibrated values are retrieved from a lookup table having temperature and frequency as input, and gain of the first LNA (214A) and gain of the second LNA (214B) as output.
13. The system (200) as claimed in claim 1, configured to:
remove the interferer signal from the output signal by removing in-band interferer signal and in-channel interferer signal to generate the required signal;
apply equivalent digital gain corresponding to the adaptive gain adjustment to the required signal; and
decode the required signal,
wherein the in-band interferer signal is removed via a low pass filter, and wherein the in-channel interferer signal is removed via mask filtering.
14. A method (900) for adaptive tuning, comprising:
determining, by a baseband processor (202) associated with a system (200), whether a voltage level of an input signal exceeds a threshold voltage value of one of a first low noise amplifier, LNA, (214A) and a second LNA (214B), the input signal comprising a required signal and an interferer signal;
in response to determining that the voltage level of the input signal exceeds the threshold voltage value of one of the first LNA (214A) or the second LNA (214B), activating, by the baseband processor (202), a termination switch (208) to ground the input signal;
else, performing, by the baseband processor (202), adaptive gain adjustment of an output signal generated by a digital step attenuator (216) corresponding to the input signal, by:
calibrating at least one of: an attenuation vector of the digital step attenuator (216), threshold input voltages corresponding to an analogue to digital converter, ADC, (226), and gain corresponding to the first LNA (214A) and the second LNA (214B), based on an operating temperature of the system (200); and
adjusting an operating mode of a plurality of modes of the second LNA (214B) and the attenuation vector based on a power detector output voltage.