Description:BACKGROUND
Technical Field
The embodiment herein generally relates to surge protection in electronic circuits and more particularly, to a Surge and Inrush Protection (SIP) circuit using in the flyback converter.
Description of Related Art
Commonly while switching on electricals or electronic circuits or devices, the circuits receive initial surge of current (For example inrush current). If the surge of current is strong, then the surge of current may harm the electricals or electronic circuits or devices.
Existing electronic circuits doesn’t withstand surge and inrush protection against higher voltages. Further the circuits have transformer leakage inductance. Voltage stress and overshoot across circuit need to reduce to minimize or suppress a radiated emission and conduction emission for protecting the circuits during surge.
Accordingly, there remains a need for a Surge and Inrush Protection (SIP) circuit using in the flyback converter.
SUMMARY
In view of the foregoing, embodiments herein a provide a Surge and Inrush Protection (SIP) circuit using in the flyback converter. The circuit includes NTC, MOV1 and MOV2 which is configured at an input supply of the SIP circuit to protect an inrush current and surge of high voltage. An external interference and internal switching transients are suppressed by applying external transient of lower voltage through EMI filter and fast transient filtering circuit of CX and CY capacitor. A LF1 is configured to control electromagnetic noise. An X and Y capacitor absorb high frequency interference and pass through the earth. A EQ25X15 is configured to reduce leakage inductance. A voltage stress and overshoot circuit are configured to reduce and minimize or suppress a radiated emission and conduction emission. A snubber circuits is configured to protect power switches and diodes against voltage breakdown failures.
According to some embodiments herein, the circuit comprises a common mode and differential mode filter which is configured to support limiting a common mode and differential mode noise entering the circuit.
According to some embodiments herein, the circuit comprises EFT circuit, wherein the EFT circuit is configured to suppress electrical transients.
According to some embodiments herein, the snubber circuit is a R2CD snubber, wherein the snubber circuit is configured to suppress voltage stress and overshoot.
According to some embodiments herein, the circuit comprises inductor, and capacitor combination to reduce the harmonic.
According to some embodiments herein, the circuit comprises PWM method to reduce the current harmonics.
According to some embodiments herein, the circuit comprises EQ cores to reduce transformer leakage inductance.
According to some embodiments herein, the circuit protects signals from disruption by applying external electromagnetic signals to the circuit.
These and other aspects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating preferred embodiments and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein, and the embodiments herein include all such modifications.
BRIEF DESCRIPTION OF THE DRAWINGS
The embodiments herein will be better understood from the following detailed description with reference to the drawings, in which:
FIGs. 1A-1E illustrates a Surge and Inrush Protection (SIP) circuit, according to some embodiments herein.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.
As mentioned, there remains a need for a Surge and Inrush Protection (SIP) circuit using in the flyback converter. Referring now to the drawings, and more particularly to FIGS. 1A through 1E, where similar reference characters denote corresponding features consistently throughout the figures, there are shown preferred embodiments.
FIGs. 1A-1E illustrates a Surge and Inrush Protection (SIP) circuit 100, according to some embodiments herein. The circuit 100 includes NTC, MOV1 and MOV2, an external interference and internal switching transients, a plurality of safety capacitors, LF1, X and Y capacitor, a EQ25X15, a voltage stress and overshoot circuit. The circuit further includes PI filter 102, flyback section 104, and PWM controller 106. The NTC, MOV1 and MOV2 is configured at an input supply of the SIP circuit to protect an inrush current and surge for lower voltage. External interference and internal switching transients are suppressed. EMI filter and fast transient filtering circuit of CX, CY capacitor and EFT circuit. . The plurality of safety capacitors that is configured to suppress the transients pass through line and neutral via the input supply. The LF1 is configured to control electromagnetic noise. The X and Y capacitor absorb high frequency interference and pass through the earth. The EQ25X15 is configured to reduce leakage inductance. The voltage stress and overshoot circuit is configured to reduce and minimize or suppress a radiated emission and conduction emission. The snubber circuit is configured to protect power switches and diodes against voltage breakdown failures.
According to some embodiments herein, the MOV is known for handling surge current effectively, but not for long durations. The surge rating for MOVs is measured in microseconds. The industry standard for an MOV is 8/20 µs where the current rises to a minimum of 90 percent of peak (T1) within 8 µs and 50 percent of current decay at 20 µs (T2).
According to some embodiments herein, if the overvoltage event is long-lasting, the MOV will start to heat up, which can lead to a thermal runaway condition. A thermal runaway situation can cause the internal grains of the MOV to fuse together and could burn or damage the component. For this reason, a fuse, thermal disconnect, or Gas Discharge Tube (GDT) in series to protect the MOV is recommended.
According to some embodiments herein, the NTC thermistors specially developed for this application limit the current at turn-on by their relatively high cold resistance. As a result of the current load the thermistor heats up and reduces its resistance by a factor of 10 to 50; the power it draws reduces accordingly. NTC thermistors can effectively handle higher inrush currents than fixed resistors with the same power consumption
According to some embodiments herein, the NTC thermistor thus provides protection from undesirably high inrush currents, while its resistance remains negligibly low during continuous operation.
According to some embodiments herein, EQ cores are a cross between E cores and pot cores. Like pot cores, the round center post of EQ cores offers minimal winding resistance, ideal for heavy gauge wire, while its planar shape facilitates low profile, compact design. In comparison to E cores and other non-planar cores, EQ powder cores offer better space utilization, shielding and improved thermal performance. In a non-limiting example, EQ25X15 is used in the circuit 100 to reduce losses and achieve less leakage inductance.
According to some embodiments herein, a low cost R2CD clamp the circuit 100. The clamp diode must be either a standard recovery glass passivated diode or a fast recovery type with a reverse recovery time of less than 500 ns. Use of standard recovery switch passivated diodes allows the recovery of some of the clamp energy from each cycle and improves average efficiency. The diode momentarily conducts each time the primary switch turns off and energy from the leakage reactance is transferred to the clamp capacitor C1. Resistor R1, R2, R3, which is in the series path, acts as a damper preventing excessive ringing due to resonance between the leakage reactance and the clamp capacitor C1. Resistor R6, R7 dissipates the energy stored in capacitor C1. Switching devices will have different peak primary currents and leakage inductances and will therefore result in different amounts of leakage energy. Capacitor C1, R1, R2 ,R3 and R6,R7 must therefore be optimized for each design.
According to some embodiments herein, safety capacitors are selected based on circuit requirements and function to safeguard the circuit from transient voltage spikes by diverting the excess energy to ground. Safety capacitors is to protect against surges and transients, as well as providing EMI filtering. X Capacitors such as Class-X capacitors, also known as "across-the-line capacitors,” are used between the wires carrying the incoming AC current. These offer line-to-line protection, which means that if there is a failure, a short may occur, but there is no risk of shock. An X capacitor failure usually causes a fuse or circuit breaker to open.
Y Capacitors such as Class-Y capacitors, also known as "line-to-ground capacitors" or “line bypass capacitors,” offer line-to-ground protection, which generally means that if a failure with the ground occurs, there is a risk for shock. However, Class-Y safety capacitors must meet rigorous specifications, minimizing the chance of electric shock.
According to some embodiments herein, in the circuit 100, U2 generate Single pulse PWM to control the MOSFET Q2. The output voltage regulation is controlled by control the PWM pulse. Frequency control method is used in this circuit.
According to some embodiments herein, Power factor is the relation between the active power and the apparent power and is useful for measuring the efficiency of power transmission in the circuit. The effect that the phase difference between the voltage and current has on the total power factor is defined by the displacement factor, which is calculated as the cosine of the angle between waves using Equation (1):
PFDISPLACEMENT=COS(θV−θI) Equation (1):
THD can be calculated using Equation (2):

The effect of distortion on the total power factor, however, is using the distortion factor, which is related to the total harmonic distortion with Equation (3):

The product of the displacement factor and the distortion factor makes up the power factor, calculated with Equation (4):

According to some embodiments herein, the circuit converts Ac supply into high voltage dc with help of rectifier and convert high voltage dc to low voltage dc with low THD and high-power factor in the input side using flyback converter. This power supply is used to convert the AC mains input into low voltage DC output with the help of flyback topology.
According to some embodiments herein, the circuit has Fuse, NTC and varistor. Fuse is used to give protection against overcurrent and short circuits. NTC is used to give protection against inrush current and short circuits. Varistor is used to give protection against voltage spikes and surge. During the high surge, the varistor’s resistance will reduce. Due to low resistance, current will shunt, and all the sensitive components will be saved.
Input EMI filter is used to protect signals from being disrupted by external electromagnetic signals as well as preventing generated signals from interfering with surrounding components.
Safety capacitors (X and Y) are selected based on circuit requirements and function to safeguard the circuit from transient voltage spikes by diverting the excess energy to ground. Safety capacitors is to protect against surges and transients, as well as providing EMI filtering
The Bridge Rectifier convert 90VAC – 300VAC to dc voltage. As we can see in block diagram (figure), first, AC voltage will convert to DC voltage through bridge rectifier topology. Rectified DC voltage will supply to Flyback PFC section.
U2 is a quasi-resonant constant voltage controller with high power factor, low THD and primary side control. The ICs has inbuilt high voltage start-up circuit to meet the requirement of fast start-up and ultralow standby consumption. The ICs are integrated protection functions including VDD Under voltage lockout (UVLO) and VDD Over voltage protection (VDD OVP), Line Brownout (BOP), Output Over Voltage protection (OVP), Overload Protection (OLP), Short Circuit Protection (SCP), Cycle-by-Cycle Current Limit (OCP), Over Temperature (OTP), Leading Edge Blanking (LEB) and the like.
According to some embodiments herein, the circuit 100 includes a common mode and differential mode Filter that is configured to support limiting a common mode and differential mode noise entering the circuit. The circuit 100 includes EFT circuit. The EFT circuit is configured to suppress electrical transients. The snubber circuit is a R2CD snubber to reduce voltage spike and overshoot across semiconducting device.
According to some embodiments herein, the inrush current protection is needed to enable during surge test at 4KV. The external interference and internal switching transients need to suppress when applying external transient of 2KV. The transformer leakage inductance needs to be reduced. Voltage stress and overshoot across semiconducting device need to reduce to minimize or suppress the radiated emission and conduction emission. Need to qualify CISPER14-1 (32) and IEC61000-4-6 std. Need to suppress the electrical fast transient signals during circuit switching transient. The primary side voltage regulation needs to achieve with wide input voltage ranges of 95V to 270V.
According to some embodiments herein, the input current THD need to achieve below 6% for inductive load at full load conditions. The input power factor needs to achieve more than 0.9 at full load condition with inductive load. The primary side voltage regulation needs to be achieved with wide input voltage ranges of 95V to 270V. The input voltage sensing, primary side voltage sensing and feedback circuit help to give better regulations. The primary side regulation is achieved by controlling the duty cycle of the primary switch with the help of feedback signal. The input current THD needs to achieve below 6% for inductive load at full load conditions.
According to some embodiments herein, the input current shape is controlled by controlling the Primary side switch gate pulse. The gate pulse is generated based on current feedback signal. The PI filter capacitor is also supported to maintain the sinusoidal shape. The input power factor needs to achieve more than 0.9 at full load condition with inductive load. The power factor and input Current are interlinked. If the input current has less THD and follows sinusoidal shape, then the PF can get better. The voltage regulation and low THD gives the power factor of 0.98 for inductive load.
According to some embodiments herein, the inrush current protection is needed to enable during surge test at 4KV. A series Resister is a Low value resistor needs to connect in series to input supply. It gives permanent power loss to the circuit. A relay circuit increases the product size and cost.it will produce voltage spike during relay ON/OFF time. This spike support for transients. The NTC supports suppressing the inrush current initially and give minimum power loss during operation. This method is more cost effective.
According to some embodiments herein, a location of NTC is a critical parameter to suppress the inrush current during surge test of 4KV. The external interference and internal switching transients need to suppress when applying external transient of 2KV.
According to some embodiments herein, common mode and differential mode Filter: both filters support limiting the common mode and differential mode noise entering the circuit. Both components increase the cost and size of the product. The safety capacitor: X capacitor and Y capacitor are used to suppress the Transients. The location of the capacitor is a critical one.
According to some embodiments herein, the circuit is used to suppress electrical transients. PI filter suppresses the high frequency noise. The MOV is used to absorb the surge/voltage spike coming from input supply. The TVS diode support to suppress the surge/voltage spike coming from input supply.
According to some embodiments herein, common mode filter+ X and Y capacitor+ EFT circuit+ PI filter: These combinations are used to suppress the surge, EMI and transients. The place of each components playing the main role to qualify the CISPER14-1 (32) and IEC61000-4-6 std.
According to some embodiments herein, the transformer leakage inductance needs to be reduced using Core selection, Winding method, Insulation material thickness and usage, and Winding coil grade. The leakage inductance is reduced by selecting the suitable core of EQ25X15, tight winding, low resistance copper coil, proper air gap. The transformer should be center gapped because the fringing fields from the exposed air gap become a strong source of EMI.
According to some embodiments herein, voltage stress and overshot across semiconducting device need to reduce or suppress the radiated emission and conduction emission.
According to some embodiments herein, the R2CD snubber gives high efficiency and limits the drain voltage up to 90% of Vdss. Resistor Rs, which is in the series path, acts as a damper preventing excessive ringing due to resonance between the leakage reactance and the clamp capacitor Cs. Resistor Rs dissipates the energy stored in capacitor Cs. The primary side voltage regulation needs to be achieved with wide input voltage ranges of 95V to 270V The controller detects the output voltage through FB pin. And maintains the constant output voltage compared with the internal high-precision reference. The output voltage under closed loop control is determined by the following formula with Equation (5):
V0=(Vref/Rfb)*(Rfb1+Rfb2) *(Nsec/Naux)-Vdf------(5)
Vref – Voltage reference
Rfb1- The resistor between FB pin and GND
Rfb2-The upper voltage divider resistor
Nsec-Secondary Windings Turns
Naux-Auxilary winding turns
Vdf-Forward voltage drop of secondary diode.
Thus, the output voltage is maintained as a constant with help of feedback circuit.
According to some embodiments herein, the input current THD needs to achieve below 6% for inductive load at full load conditions. Passive method: Inductor, capacitor combinations are used to reduce the harmonic. PWM method: PWM method is used to reduce the Harmonics. The PWM method is used to reduce the current harmonics.
According to some embodiments herein, the input power factor needs to achieve more than 0.9 at full load condition with inductive load. The Passive method: Inductor, capacitor combinations are used to improve the PF. It is not giving unity PF. The Active PFC: boost and buck converter act as a PF correction circuit. It is adding additional components, power loss, and cost. The Hybrid method: Flyback with passive components is used to get near unity PF.
According to some embodiments herein, the inrush current protection is achieved with the help of NTC and support for surge protection up to 4KV with help of MOV1 and MOV2. The external interference and internal switching transients are controlled through EMI filter and fast transient filtering circuit of CX and CY capacitor (2KV). In the flyback topology, the transformer leakage current produces more spikes across the switch due to leakage inductance of flyback transformer, the leakage inductance can be reduced by selecting proper transformer core, winding method, insulating material, and coil.
According to some embodiments herein, the voltage spike supports for EMI. R2CD network suppressing EMI emission by controlling of overshoot across switch and transformer primary side. Overshoot was reduced from 45% to 14% with help of R2CD and less leakage inductance.
According to some embodiments herein, D5, R45 and C25 suppress the electrical fast transient signals during circuit switching and input transient (2KV). This network is called EFT protection network. The primary side voltage regulation gives many advantages; it gives better output regulation with wide input voltage ranges of 95V to 270V. it is achieved with help of feedback and compensation network. The input current wave shape is maintaining like sinusoidal. Due to sinusoidal shape, the input current THD comes below 6% for inductive load. The input smoothing operation is used to achieve high input power factor of above 0.98 with full load condition.
The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practised with modification within the scope of the appended claims.
, Claims:We claim:
1. A Surge and Inrush Protection (SIP) circuit (100) using in the flyback converter, the circuit (100) comprising:
NTC, MOV1 and MOV2 is configured at an input supply of the SIP circuit to protect an inrush current and surge of high voltage.
an external interference and internal switching transients are suppressed by EMI filter and fast transient filtering circuit of CX, CY capacitor and EFT circuit.
LF1 is configured to control electromagnetic noise.
an X and Y capacitor absorb high frequency interference and pass through the earth;
a EQ25X15 is configured to reduce leakage inductance.
a voltage stress and overshoot circuit is configured to reduce and minimize or suppress a radiated emission and conduction emission; and
a snubber circuits is configured to protect power switches and diodes against voltage breakdown failures.
2. The circuit (100) as claimed in claim 1, wherein the circuit (100) comprises a common mode and differential mode filter which is configured to support limiting a common mode and differential mode noise entering the circuit.
3. The circuit (100) as claimed in claim 1, wherein the circuit (100) comprises EFT circuit, wherein the EFT circuit is configured to suppress electrical transients.
4. The circuit (100) as claimed in claim 1, wherein the snubber circuit is a R2CD snubber, wherein the snubber circuit is configured to reduce voltage spike and overshoot across semiconducting device.
5. The circuit (100) as claimed in claim 1, wherein the circuit (100) comprises inductor, and capacitor combination to reduce the harmonic.
6. The circuit (100) as claimed in claim 1, wherein the circuit (100) comprises PWM method to reduce the current harmonics.
7. The circuit (100) as claimed in claim 1, wherein the circuit (100) comprises EQ cores to reduce transformer leakage inductance.
8. The circuit (100) as claimed in claim 1, wherein the circuit (100) protects signals from disruption by applying external electromagnetic signals to the circuit (100).