Description:Technical Field:

[001] The present disclosure relates to electric vehicles, and more particularly relates to implementing a soft startup of an LLC resonant converter in an electric vehicle charger and a DC/DC converter.

Background:

[002] Charging of electric vehicles (EVs) can require two types of charger systems: an off-board charger system and an on-board charger system. An off-board charger system can take the AC (alternating current) supply from the grid and convert it into a boosted DC (direct current) voltage. The off-board charger system can be implemented by a power factor correction (PFC) boost converter. An on-board charger system can receive and regulate the boosted DC voltage from the off-board charger system. The on-board charger system can be implemented by a regulated DC-DC converter. Essentially, the output of the PFC boost converter is converted to a controller varying power output for charging of the EV battery (e.g., Li ion battery). This is also depicted in the sequence as shown in FIG. 6. The output of the DC-DC converter needs to be of varying voltage and varying current.

[003] The DC-DC converter can have a half-bridge or full bridge LLC (inductor-inductor-capacitor) resonant converter topology. The half-bridge LLC resonant converter is suitable for low to medium power requirements because of its efficient performance, low losses, variable output, and due to its low EMI (electromagnetic interference)/EMC (electromagnetic compatibility) patterns. Resonant converters are also preferred due to their high switching frequency, light weight, compact size, low switching stress on the power switches (e.g., metal-oxide-semiconductor field-effect transistor (MOSFETS) etc. The power switches can undergo “soft switching” techniques like zero voltage switching (ZVS), wherein the switches turn ON or OFF at zero or near zero voltage, and zero current switching (ZCS), wherein the switches turn ON or OFF at zero or near zero current.

[004] Initially (i.e., during startup), the LLC resonant converter is in an uncharged state, i.e., the various components of the LLC resonant converter are all uncharged with 0V. Thus, during the startup of the LLC resonant converter, there could be a large impact voltage and surge current generation. This can affect the ZVS/ZCS, wherein the power switches of the LLC resonant converter may undergo “hard switching.” In case the surge current value exceeds the current value that can be withstood by the power switches, then this can lead to frequent failure of the power switches during startup.
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[005] Therefore, there currently lacks a methodology for dealing with the impact of the surge current on the power switches during the startup of the LLC resonant converter, especially when there are hardware limitations that limit the startup frequency of the LLC resonant converter.

Summary:

[006] These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by advantageous embodiments of the present disclosure.

[007] A summary of certain embodiments disclosed herein is set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of these certain embodiments and that these aspects are not intended to limit the scope of this disclosure. Indeed, this disclosure may encompass a variety of aspects that may not be set forth below.

[001] According to a first embodiment, a system is disclosed. The system comprises a first switching device and a second switching device. During a startup of the system, a startup frequency of the system is higher than a resonant frequency of the system. During the startup of the system, a set of primary pulses are transmitted to the first switching device. The set of primary pulses include an initial pulse and gradually increasing the duty cycle of the remaining pulses. The initial pulse has a particular duty cycle. The remaining pulses have a duty cycle that is greater than to the particular duty cycle. During the startup of the system, a set of secondary pulses are transmitted to the second switching device. The set of secondary pulses include an initial pulse and gradually decreasing duty cycle for the remaining pulses. The secondary initial pulse has a particular duty cycle. The remaining secondary pulses have a duty cycle that is lesser than to the particular duty cycle

[002] According to a second embodiment, a method is disclosed. The method comprises operating a system, during a startup of the system, at a startup frequency, the startup frequency greater than or equal to the resonating frequency of the system. The method comprises transmitting a set of primary pulses to a first switching device of the system. Within the set of primary pulses, an initial pulse has a particular duty cycle, and remaining pulses have a duty cycle that is greater to the particular duty cycle. The method comprises transmitting a set of secondary pulses to a second switching device of the system. Within the set of secondary pulses, an initial pulse has a particular duty cycle, and remaining pulses have a duty cycle that is lesser to the particular duty cycle.

[003] The details of the embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.

Brief Description of Drawings:

[004] The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and components.

FIG. 1 illustrates a circuit diagram of an LLC resonant converter, according to an embodiment of the present disclosure;

FIG. 2 illustrates a waveform diagram depicting the surge current flowing through the LLC resonant converter during startup;

FIG. 3 illustrates the sequence of pulses transmitted to the LLC resonant converter for implementing a soft startup, according to an embodiment of the present disclosure;

FIG. 4 illustrates a waveform diagram depicting the surge current flowing through the LLC resonant converter after implementing the soft startup, according to an embodiment of the present disclosure;

FIG. 5 illustrates a method for implementing soft startup in an LLC resonant converter, according to an embodiment of the present disclosure; and

FIG. 6 illustrates a flow diagram for charging of an electric vehicle.

Detailed Description

[005] Exemplary embodiments now will be described with reference to the accompanying drawings. The invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey its scope to those skilled in the art. The terminology used in the detailed description of the particular exemplary embodiments illustrated in the accompanying drawings is not intended to be limiting. In the drawings, like numbers refer to like elements. The term “exemplary embodiment” is meant to be interpreted as being an example embodiment and is not meant to be interpreted as a preferred embodiment.

[006] The specification may refer to “an”, “one” or “some” embodiment(s) in several locations. This does not necessarily imply that each such reference is to the same embodiment(s), or that the feature only applies to a single embodiment. Single features of different embodiments may also be combined to provide other embodiments.

[007] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless explicitly stated otherwise or understood from the context. It will be further understood that the terms “includes”, “comprises”, “including” and/or “comprising” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, whenever the phrase “at least one of” or “one or more of” precedes a list of elements, wherein the elements are joined by “and” or “or”, it means that at least any one of the elements or at least all the elements are present. As used herein, whenever the phrase “one of” precedes a list of elements, wherein the elements are joined by “and” or “or”, it means that only one of the elements are present at a given instant, unless the context permits a meaning that allows the inclusion of more than one element. The usage of the term “or” is to be understood as “inclusive or” instead of “exclusive or”, unless indicated otherwise by the relevant context. Conditional language, such as among others, “can” or “may”, unless specifically stated otherwise, or otherwise understood within the context as used, is generally intended to convey that certain embodiments could include, while other embodiments may not include certain features, elements, and/or steps. Thus, such conditional language is not generally intended to imply that features, elements, and/or steps are in any way required for one or more embodiments. It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. Furthermore, “connected” or “coupled” as used herein may include wirelessly connected or coupled. As used herein, the term “and/or” includes any and all combinations and arrangements of one or more of the associated listed items.

[008] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[009] The figures depict a simplified structure only showing some elements and functional entities, all being logical units whose implementation may differ from what is shown. The connections shown are logical connections; the actual physical connections may be different. In addition, all logical units described and depicted in the figures include the software and/or hardware components required for the unit to function. Further, each unit may comprise within itself one or more components, which are implicitly understood. These components may be operatively coupled to each other and be configured to communicate with each other to perform the function of the said unit.

[0010] Referring now to the drawings, and more particularly to FIGS. 1 to 6, where similar reference characters denote corresponding features consistently throughout the figures, there are shown embodiments.

[0011] FIG. 1 illustrates a circuit diagram of an LLC resonant converter 10, according to an embodiment of the present disclosure. The LLC resonant converter 10, as shown in FIG. 1, is a half-bridge LLC resonant converter, and can be divided into four portions: half-bridge inverter circuit 100, resonant tank 110, a rectifier circuit 120, and an output circuit 130. In an example embodiment, the resonant frequency of the LLC resonant converter 10 is 150 kHz, which may differ in other embodiments. In the same example embodiment, the working switching frequency of the LLC resonant converter 10 is 90 kHz to 130 kHz, where the switching frequency is inversely proportional to the power output. The frequency of the LLC resonant converter 10 can be determined by the required voltage and current requested by the DC load 131 for the charger application. In other embodiments, the voltage and current can be fixed. In an example embodiment, the LLC resonant converter 10 can be used for buck conversion. In another embodiment, the LLC resonant converter 10 can be used for boost conversion, for instance when part of a DC/DC converter.

[0012] The half-bridge inverter circuit 100 comprises a DC power source 101, a first switching device 102, and a second switching device 103. The phrase “switching device” can be interchangeably referred to as “power switch”. By way of example, rather than limitation, the first and second switching device 102/103 can be implemented by a MOSFET or an IGBT (insulated-gate bipolar transistor). In the case of MOSFETS, the drain of the MOSFET 102 can be connected to the DC power source 101, and the source of the MOSFET 103 can be connected to the ground 105. The source of the MOSFET 102 and the drain of the MOSFET 103 can be connected to the switching node 104.

[0013] Through, for example, a digital signal processor (DSP) microcontroller (not shown in FIG 1), PWM (pulse width modulation) pulses are transmitted to the first and second switching devices 102/103. These PWM pulses can act as the switching signals to cause the first and second switching devices 102/103 to switch ON or switch OFF. Each PWM pulse can have a duty cycle and a time period (or frequency). The duty cycle is the percentage of the time period for which the pulse is ON compared to the total time period of the pulse (i.e., the sum of the ON time period and OFF time period). The PWM pulses can be complementary in nature. The pulses for the first switching device 102 and the pulses for the second switching device 103 can have a 180⁰ phase shift. A dead time can be allocated to prevent accidental cross conduction in the first and second switching devices 102/103 The output of the first and second switching devices 102/103 is a sine wave.

[0014] The resonant tank 110 can be connected to the half-bridge inverter circuit 100 via the first switching node 104 and the second switching node 105. The resonant tank 110 receives the sine wave from the half-bridge inverter circuit 100. The resonant tank 110 comprises a two resonant capacitor 111A and 111B in split capacitor topology, a resonant inductor 112, a magnetizing inductor 113, and a center tapped transformer 114 (with primary windings 114A and secondary windings 114B). The output of the resonant tank 110, in the case of buck conversion, is a stepped-down sine wave. In an embodiment, the resonant tank can be an integrated transformer, where the resonant capacitors 111A and 111B, the resonant inductor 112, the magnetizing inductor 113, and the transformer 114 are magnetically/electrically integrated.

[0015] The rectifier circuit 120 comprises a third switching device 121, a fourth switching device 122, and an output filter capacitor 123. In the case of the rectifier circuit 120 being a synchronous rectifier circuit, the third and fourth switching devices can be a MOSFET. In another embodiment, the rectifier circuit 120 can be a full wave, half wave, or full bridge diode rectifier circuit, with the third and fourth switching devices 121/122 being diodes. The output circuit 130 comprises the DC load 131. In an example embodiment, the DC load 131 is a Li ion battery (of, for example, an electric vehicle) for charging. However, it is to be noted that the DC load 131 can vary in other embodiments.

[0016] FIG. 2 illustrates a waveform diagram depicting the surge current flowing through the LLC resonant converter during a generic startup at the resonant frequency. FIG. 2 depicts four sets of waveforms, with a first set of waveforms depicting current iLr (the current flowing through the resonant tank). The second set of waveforms depicts the voltage across the drain and source of the first switching device 102 (VDS Q1) and the voltage across the drain and source of the second switching device 103 (VDS Q2). The third set of waveforms depicts the current across the drain of the first switching device 102 (ID Q1) and the current across the drain of the second switching device 103 (ID Q2). The fourth set of waveforms depicts the PWM pulses for the first switching device 102 (PWM Q1) and the PWM pulses for the second switching device 103 (PWM Q2).

[0017] It can be seen from FIG. 2, that the surge current, ID Q1 and ID Q2, have a value at certain time instants that are nearly 100A. This surge current can cause damage or stress to the switching devices 102/103.

[0018] FIG. 3 illustrates the sequence of pulses (PWM Q1 & PWM Q2) transmitted to the LLC resonant converter 10 for implementing a soft startup, according to an embodiment of the present disclosure, which as a result, reduces the amount of surge current and consequently the stress on the switching devices 102/103.

[0019] During a startup of the LLC resonant converter 10, the startup frequency is higher than the resonant frequency. The startup frequency can be set to be at around 1.5 times greater than the resonant frequency of the LLC resonant converter 10. In an example embodiment, the resonant frequency can be 150 kHz, and the startup frequency can be 225 kHz or higher. In some embodiments, due to limitations in the components of the LLC resonant converter 10, the upper limit of the startup frequency can be 2 times greater than the resonant frequency of the LLC resonant converter 10.

[0020] PWM Q1 represents the set of pulses that are transmitted to the first switching device 102. PWM Q2 represents the set of pulses that are transmitted to the second switching device 103.

[0021] For the PWM Q1 set of pulses, an initial pulse is transmitted with a duty cycle D (as shown in FIG. 3). In an example embodiment, this duty cycle can be 5% or more. This initial pulse can be considered as a initial pulse. The remaining pulses of the PWM Q1 set can have a duty cycle that is incremental fashion compared to the duty cycle of the initial pulse. Essentially, the PWM Q1 set of pulses comprises the (i) initial pulse and (ii) remaining pulses (i.e., second pulse, third pulse, and so on).

[0022] In addition, the sequence for transmitting the remaining pulses can be arranged such that the duty cycle of each subsequent pulse progressively increases until it reaches 50%. Specifically, the second pulse in the PWM Q1 set can exhibit a duty cycle that is 10% greater than that of the initial pulse. The third pulse can have a duty cycle that is 20% greater than the initial pulse, the fourth pulse can have a duty cycle that is 30% greater than the initial pulse, and this pattern continues for each subsequent pulse. Each pulse, following the initial pulse, has a duty cycle that incrementally increases compared to its immediate predecessor. For instance, the duty cycle of the third pulse exceeds that of the second, and the duty cycle of the fourth pulse exceeds that of the third, and so forth with any incremental percentage till reaching 50% duty cycle. Notably, the duty cycle of the second pulse in the PWM Q1 set is higher than that of the initial pulse. The period 𝑇 represents the time interval between the transmission of one pulse and the transmission of the next immediate pulse.

[0023] Eventually, with the progression of the increase in the duty cycle for each succeeding pulse, an nth pulse in the sequence will have a duty cycle that is greater than to the duty cycle of the initial pulse. Thereafter, the duty cycles of the pulses after the nth pulse may not increase, but instead remain the same as the duty cycle of nth pulse. In other words, after a certain point (i.e., the nth pulse), each of the remaining pulses in the PWM Q1 set can have the same duty cycle, and this duty cycle can be identical to that of the initial pulse.

[0024] The remaining pulses (i.e., from the second pulse onwards) in the PWM Q1 set, can be transmitted in a sequence such that:

a. the duty cycle of each pulse, in the remaining pulses, is greater than to the duty cycle of the initial pulse; and
b. the duty cycle of each succeeding pulse, in the sequence of the remaining pulses, is higher than to the duty cycle of a preceding pulse in the sequence. For example, the second pulse in the sequence (i.e., the third pulse in the PWM Q1 set) can be considered as a succeeding pulse, wherein the second pulse in the sequence succeeds the first pulse in the sequence (i.e., the second pulse in the PWM Q1 set), Similarly, the third pulse in the sequence (i.e., the fourth pulse in the PWM Q1 set) can have a duty cycle that higher than to the duty cycle of the second pulse in the sequence.

[0025] In one embodiment, with the regression of the reduction in the duty cycle for each succeeding pulse in PWM Q2, an nth pulse within the sequence will exhibit a duty cycle that is less than the duty cycle of the initial pulse. Following the occurrence of the nth pulse, the duty cycles of subsequent pulses may not experience a further reduction but may instead remain constant, with each succeeding pulse having a duty cycle equivalent to that of the nth pulse. Specifically, after a certain point, defined as the nth pulse, all remaining pulses in the PWM Q2 set may exhibit an identical duty cycle identical to the initial pulse.
[0026] Furthermore, the remaining pulses, beginning with the second pulse of the PWM Q2 set, may be transmitted in a sequence such that:
a. The duty cycle of each pulse within the remaining pulses is less than the duty cycle of the initial pulse; and

b. The duty cycle of each successive pulse in the sequence is less than the duty cycle of the immediately preceding pulse within the same sequence.
[0027] For instance, the second pulse in the sequence (i.e., the third pulse in the PWM Q2 set) may be characterized as a succeeding pulse, where it follows the first pulse in the sequence (i.e., the second pulse in the PWM Q2 set). Similarly, the third pulse in the sequence (i.e., the fourth pulse in the PWM Q2 set) may exhibit a duty cycle that is less than the duty cycle of the second pulse in the sequence.

[0028] There can also be a dead time inserted between:

a. the end of the transmission of a pulse in the PWM Q2 set and the start of a transmission of a pulse in the remaining pulses of the PWM Q1 set; and
b. the end of a transmission of a pulse in the remaining pulses of the PWM Q1 set and the start of a transmission of a pulse in the PWM Q2 set.

[0029] For instance, FIG. 3 illustrates the dead time with respect to points ‘a’ and ‘b’ as shown above. The purpose of the dead time is to prevent cross conduction so that both the switching devices 102/103 are not ON because of the parasitic turn on and turn off specifications. It can also be seen from FIG. 3 that the remaining pulses in the PWM Q1 set are transmitted after the transmission of the initial pulse in the PWM Q2 set.

[0030] FIG. 4 illustrates a waveform diagram depicting the surge current flowing through the LLC resonant converter 10 after implementing the soft startup (e.g., as per FIG. 3 and described above herein), according to an embodiment of the present disclosure. FIG. 4 illustrates three sets of waveforms. The first waveform represents the current (ID Q1) through the drain of Q1, i.e., the first switching device 102. The second waveform represents the current (ID Q2) through the drain of Q2, i.e., the second switching device 103. The third waveform represents the voltage (VDS Q1 and VDS Q2) across the drain and source of Q1 and Q2, i.e., the first and second switching devices 102/103.

[0031] It can be seen from the first and second waveforms of FIG. 4 that the surge current, i.e., current through the drain of Q1 and Q2, has drastically reduced, wherein the maximum value of the surge current at certain time instants is nearly 20A, compared to previously being 100A. As such, the embodiments disclosed herein enable the reduction in the surge current through the switching devices 102/103, limiting the current below device specification.

[0032] FIG. 5 illustrates a method 500 for implementing soft startup in an LLC resonant converter 10, according to an embodiment of the present disclosure. At step 502, the method comprises operating a system, during a startup of the system, the system is operated at a startup frequency, wherein the startup frequency is greater than a resonating frequency of the system. In one embodiment, the system can be a half-bridge LLC converter 10. In one embodiment, the startup frequency can be 1.5 times greater than the resonating frequency. At step 504, the method comprises transmitting a set of primary pulses to a first switching device 102 of the system, wherein an initial pulse, in the set of primary pulses has a particular duty cycle, and remaining pulses, in the set of primary pulses, have a duty cycle that is greater than to the particular duty cycle. The set of primary pulses can include the PWM Q1 set of pulses previously described herein. In one embodiment, the particular duty cycle of the initial pulse in the set of primary pulses can be 50% with dead time added. At step 506, the method comprises transmitting a set of secondary pulses to a second switching device 103 of the system, wherein an initial pulse, in the set of primary pulses has a particular duty cycle, and remaining pulses, in the set of primary pulses, have a duty cycle that is lesser than to the particular duty cycle. The set of primary pulses can include the PWM Q2 set of pulses previously described herein. In one embodiment, the particular duty cycle of the initial pulse in the set of primary pulses can be 90% with deadtime added. The set of secondary pulses can be the PWM Q2 set of pulses as described above herein.

[0033] In some embodiments, the method 500 may comprise further steps not shown and/or may omit certain steps not shown, therefore this should not be construed as limiting the scope of the present disclosure.

[0034] In the drawings and specification, there have been disclosed exemplary embodiments of the invention. Although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation. It will be apparent to those having ordinary skill in this art that various modifications and variations may be made to the embodiments disclosed herein, consistent with the present invention, without departing from the spirit and scope of the present invention. Other embodiments consistent with the present invention will become apparent from consideration of the specification and the practice of the description disclosed herein.

[0035] The following table illustrates the association between a reference numeral and a feature of an embodiment of the present disclosure.

Sl. No. Reference Numeral Component
1. 10 LLC Resonant Converter
2. 100 Half-Bridge Inverter Circuit
3. 101 DC Source
4. 102 First Switching Device
5. 103 Second Switching Device
6. 104 Switching Node
7. 105 Ground
8. 110 Resonant Tank
9. 111A, 111B Resonant Capacitor
10. 112 Resonant Inductor
11. 113 Magnetizing Inductor
12. 114 Transformer
13. 120 Rectifier Circuit
14. 121 Third Switching Device
15. 122 Fourth Switching Device
16. 123 Output Filter Capacitor
17. 130 Output Circuit
18. 131 DC Load

 
, C , Claims:We Claim:
1. A method, comprising:
operating a system during startup at a frequency greater than the resonant frequency of the system;
transmitting a set of primary pulses to a first switching device, wherein the set includes an initial pulse and remaining pulses, and the duty cycle of each remaining pulse incrementally increases relative to the initial pulse; and
transmitting a set of secondary pulses to a second switching device, wherein the set includes an initial pulse and remaining pulses, and the duty cycle of each remaining pulse decrementally decreases relative to the initial pulse.
2. The method as claimed in claim 1, wherein the startup frequency is 1.5 to 2 times greater than the resonant frequency of the system.
3. The method as claimed in claim 1, wherein the initial pulse in the set of primary pulses has a duty cycle between 5% and 50%, and the initial pulse in the set of secondary pulses has a duty cycle between 50% and 100%.
4. The method as claimed in claim 1, wherein the duty cycle of each remaining pulse in the set of primary pulses increases, and the duty cycle of each remaining pulse in the set of secondary pulses decreases by a fixed percentage compared to their preceding pulses.
5. The method as claimed in claim 1, further comprising inserting a dead time between the transmission of pulses in the set of primary and secondary pulses to prevent cross-conduction between the first and second switching devices.
6. The method as claimed in claim 1, wherein the first and second switching devices are MOSFETs.
7. The method as claimed in claim 1, wherein the first and second switching devices are controlled by a digital signal processor (DSP) or a microcontroller.
8. The method as claimed in claim 1, wherein the system is a half-bridge LLC resonant converter used in a DC-to-DC converter battery charging system.
9. The method as claimed in claim 1, wherein the system performs a soft startup to reduce surge current through the first and second switching devices.

10. The method as claimed in claim 1, wherein the system comprises:
a resonant network comprising:
a resonance capacitor;
a resonant inductor;
a magnetizing inductor; and
a transformer;
a rectifier circuit, comprising:
a third switching device;
a fourth switching device; and
an output capacitor; and
an output circuit, comprising a direct current (DC) load.

11. A system, comprising:
a first switching device;
a second switching device;
a resonant tank coupled to the first and second switching devices;
a control unit configured to:
operate the system at a startup frequency greater than a resonant frequency of the system;
transmit a set of primary pulses to the first switching device, wherein the set of primary pulses includes an initial pulse and remaining pulses, and wherein the duty cycle of each remaining pulse is greater than the duty cycle of the initial pulse; and
transmit a set of secondary pulses to the second switching device, wherein the set of secondary pulses includes an initial pulse and remaining pulses, and wherein the duty cycle of each remaining pulse is less than the duty cycle of the initial pulse.
12. The system as claimed in claim 1, wherein the startup frequency is 1.5 to 2 times greater than the resonant frequency of the system.
13. The system of claim 1, wherein the duty cycle of the initial pulse in the set of primary pulses is between 5% and 50%, and the duty cycle of the initial pulse in the set of secondary pulses is between 50% and 100%.
14. The system as claimed in claim 1, wherein the duty cycle of each remaining pulse in the set of primary pulses incrementally increases by a fixed percentage relative to the previous pulse.
15. The system as claimed in claim 1, wherein the duty cycle of each remaining pulse in the set of secondary pulses decrementally decreases by a fixed percentage relative to the previous pulse.
16. The system as claimed in claim 1, further comprising a controller configured to insert a dead time between the transmission of pulses in the set of primary pulses and the set of secondary pulses to prevent cross-conduction between the first and second switching devices.
17. The system as claimed in claim 1, wherein the first switching device and the second switching device are MOSFETs.
18. The system as claimed in claim 1, wherein the controller is a digital signal processor (DSP) or a microcontroller configured to control the first and second switching devices.
19. The system as claimed in claim 1, wherein the system is a half-bridge LLC resonant converter system is implemented as part of a DC-to-DC converter.
20. The system as claimed in claim 1, wherein the system is configured to perform a soft startup to reduce surge current through the first and second switching devices.

21. The system as claimed in claim 11, further comprising:
a resonant tank (110) comprising:
a resonant capacitor (111A, 111B);
a resonant inductor (112);
a magnetizing inductor (113); and
a transformer (114);
a rectifier circuit (120), comprising:
a third switching device (121);
a fourth switching device (122); and
an output capacitor (123); and
an output circuit (130), comprising a direct current (DC) load (131).