Description:PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the invention and the manner in which it is to be performed. 
FIELD OF INVENTION BACKGROUND
Embodiments of the present disclosure relate to the technical field of power management, and more particularly relate to a converter for charging an external device and operating method thereof.
BACKGROUND
Generally, electronic devices are equipped with integrated rechargeable batteries. These batteries are typically charged from the Alternating Current (AC) utility supply using adapters. These adapters are configured to convert AC power to DC power suitable for the respective device. Further, the voltage and power requirements for charging the batteries in different electronic devices are not identical. For example, a battery used in a smart TV requires around 48V, 240W DC input, while a laptop battery requires around 20V, 100W DC input, whereas a smartphone battery demands only 5V, 25W. Further, the electronic devices are configured to be charged with customized adapters which leads to challenging inventory management and also produces enormous electronic waste. Most of electronic devices utilize type C Universal Serial Bus (USB) for power delivery to the devices.
Conventionally, there are different converters available in the market to be utilized in the adapters to produce different output voltages which are lower or higher than the input DC voltage of the converter. The available converters include, for example, but are not limited to, a synchronous buck converter, a four-switch buck-boost (FSBB) converter, a coupled-inductor interleaved buck-boost converter, a switched-capacitor buck-boost converter, a zero-voltage-transition four-switch buck-boost converter, an auxiliary LC four-switch buck-boost converter, a parallel capacitor four-switch buck-boost converter, a tapped-inductor buck-boost converter, a tapped-inductor five-switch buck-boost converter, a zero-voltage-switching four-switch buck-boost converter with multiple variants, and the like.
However, conventionally available converters encounter issues such as, for example, but not limited to, increased switching loss and electromagnetic interference (EMI) issues due to hard turn ON and turn OFF of switches, production of output voltages higher than input DC voltage, increased conduction and inductor core losses due to increase in inductor current ripple, reversing output voltage polarity, additional core losses due to bipolar current, and the like. Further, some of the conventionally available converters require an additional gate driver for maintaining Zero-Current-Switching (ZCS) at the auxiliary switch which introduces additional core losses. Further, in the conventionally available converters leakage inductance of the tapped inductor increases voltage stress on the switches, necessitating an additional clamp circuit for reliable circuit operation. Furthermore, some of the conventionally available topologies of the converters are equipped with a high part count, increasing the complexity of the converters.
FIG. 1A illustrates a circuit diagram representation of a conventional Two-stage architecture for Type-C USB power delivery.
FIG. 1B illustrates a circuit diagram representation of a conventional Synchronous buck converter. Zero-voltage-switching (ZVS) is achieved during the turn-on and turn-off transitions of the bottom switch (S2), but the top switch (S1) experiences hard turn-on and turn-off, leading to increased switching loss and electromagnetic interference (EMI) issues. This converter can only produce output voltages lower than its input DC bus.
FIG. 1C illustrates a circuit diagram representation of a conventional Four-switch buck-boost (FSBB) converter. In this conventional approach, switching loss and EMI issues are addressed, however, this approach significantly increases inductor current ripple which further leads to increased conduction and inductor core losses. A phase-shift angle is introduced between the two legs of the FSBB converter to restrict the inductor current ripple to some extent while maintaining ZVS in all four switches. However, determining an optimal inductor value and range of phase-shift variation for power loss minimization becomes extremely challenging in the case of wide output voltage range application. Buck boost operation is achievable in this topology.
FIG. 1D illustrates a circuit diagram representation of a conventional Coupled-inductor interleaved buck-boost converter where two FSBB converters are connected in an input-parallel-output-parallel fashion. The inductors, L1 and L2, of these two FSBB converters, are coupled with each other, and the gate pulses are phase-shifted by 180 degrees to achieve interleaved operation. This approach limits the ripple current through both the inductors and also helps to achieve ZVS in all switches. However, the number of switches in this topology is twice that of the basic FSBB converter.
FIG. 1E illustrates a circuit diagram representation of a conventional Switched-capacitor buck-boost converter which may either step down or step up the input DC voltage depending on the switching sequence. In step-down mode, the converter is operated as a synchronous buck converter by switching S3 and S4 complementarily and keeping the switches, S1 and S2, turned off. On the other hand, the switch, S4, is turned off during step-up mode. The switches, S2 and S3 are gated with identical pulses, while a complementary gate signal is given to the switch, S1. This switching sequence level shifts the inductor switch node voltage and in turn, produces an output voltage higher than the input voltage. Unlike the FSBB converter, the load current flows through only a single switch during both step-up and step-down modes, thus reducing the conduction loss. However, the switches, S2 and S3, are hard switched and again leads to high switching losses and EMI issues.
FIG. 1F illustrates a circuit diagram representation of a conventional Zero-voltage-transition four-switch buck-boost converter (ZVT FSBB), in which the inductor L, is designed to keep the current ripple low to minimize the inductor core loss and conduction loss compared to the traditional FSBB converter. The required negative current to ensure ZVT is obtained by introducing an auxiliary branch consisting of an inductor La, a switch Sa, and a diode, Da. The auxiliary switch, Sa, is turned on such that the auxiliary inductor La, resonates with the output capacitances of the main switches (S1-S4) to produce negative currents before turning on the switches. The auxiliary switch Sa, experiences zero-current-switching (ZCS) turn-on and turn-off. However, this topology requires an additional gate driver for the auxiliary switch (Sa) and also introduces additional core losses in the auxiliary inductor (La), and conduction losses in the switch (Sa) and the diode (Da).
FIG. 1G illustrates a circuit diagram representation of a conventional auxiliary LC four-switch buck-boost converter in which two series LC resonant networks, La1, Ca1, and La2, Ca2, across the switches, S1 and S4, respectively. Similar to the ZVT-FSBB converter, the inductor L, is designed to keep the current ripple low for inductor core loss and conduction loss minimization. The resonant currents obtained due to the addition of LC networks help achieve ZVS in all four switches. Compared to the ZVT-FSBB converter, this topology mitigates the requirement of an additional switch and associated gate driver circuit and the resonant currents flow through the switches, S1-S4, leading to increased conduction loss and hence, core losses in La1 and La2 impact the overall converter efficiency.
FIG. 1H illustrates a circuit diagram representation of a conventional Parallel capacitor four-switch buck-boost converter where a resonant capacitor Cint, is added in parallel with the inductor L, of the basic FSBB converter. The LC resonant frequency is designed to be much higher than the switching frequency so that the effect of resonance can be leveraged during the switching transitions only. The inductor, L, is designed to keep the ripple current low to reduce the inductor core and conduction losses. Compared to the basic FSBB converter, this topology reverses the polarity of the switch, S2, and introduces an additional diode D2, in series with it. This topology facilitates bidirectional voltage blocking, which is necessary to achieve ZVS in S2 utilizing the LC resonance phenomenon. This converter achieves ZVS in all four switches and does not increase conduction loss significantly due to the resonant current. However, the modified switch configuration does not allow the use of an off-the-shelf bootstrap gate driver. Also, the diode, D2, introduces additional conduction loss in this topology.
FIG. 1I illustrates a circuit diagram representation of a conventional Tapped-inductor buck-boost converter which can produce a wide range of output voltages utilizing the turns ratio of the tapped-inductor. Depending on the duty ratio of the gating signals, this converter can both step up and step down the input voltage. However, because the output voltage polarity is opposite to that of the input voltage, this topology is not suitable for Type C USB power delivery applications. Also, the leakage inductance of the tapped-inductor increases voltage stress on the switches, S1 and S2, necessitating an additional clamp circuit for reliable circuit operation. Similar to a synchronous buck converter, the main switch, S1, in this topology experiences hard turn-on and turn-off transitions. Bootstrap gate driver cannot be adopted for driving the switches in this converter.
FIG. 1J illustrates a circuit diagram representation of a conventional Tapped-inductor five-switch buck-boost converter in which to obtain a wide output voltage range the converter utilizes the turns ratio of the tapped-inductor while ensuring that the output voltage polarity is the same as that of the input voltage. DC blocking capacitors C1, and C2, are employed to facilitate AC power transfer through the tapped-inductor and ZVS turn-on of the switches S1, S2, and S5. The inductor L, in the basic FSBB converter, is designed to have a low ripple current, which restricts the inductor core loss. However, this design approach only ensures ZVS turn-on and turn-off of the switch S3, whereas the switch S4, experiences hard turn-on transitions.
FIG. 1K illustrates a circuit diagram representation of one of the derived network topologies of a Zero-voltage-switching four-switch buck-boost converter which consists of a three-winding coupled inductor (L1, L2, L3), 2 auxiliary inductors (La1, La2), and 2 diodes (D1, D2) apart from the four switches of the basic FSBB converter. This topology achieves ZVS in all four switches by utilizing the difference in currents flowing through the windings. The diodes (D1, D2) cause unipolar current flow through the auxiliary inductors, limiting the peak-to-peak ripple current, which in turn limits the inductor core loss. However, here again, more number switches are the major drawback of this topology.
FIG. 1L illustrates a circuit diagram representation of another derived network topology of a Zero-voltage-switching four-switch buck-boost converter in which the part count is reduced compared to the earlier one by introducing split-capacitor arrangements both at the input and output DC sides. Apart from these DC bus capacitors, this network topology adds one additional 2-winding coupled inductor (L1, L2) with the basic FSBB converter configuration. The inductor, L, is designed to keep the current ripple low, while bipolar currents flowing through the coupled inductor windings (L1, L2) help to achieve ZVS in all four switches. Though the core loss in the main inductor, L, is restricted, however bipolar currents in L1, and L2 introduce additional core losses.
FIG. 1M illustrates a circuit diagram representation of one another derived network topology of a Zero-voltage-switching four-switch buck-boost converter which adopts a 2-winding coupled inductor (L1, L2) similar to the second topology. In this topology, a DC blocking capacitor C1, is used in series with one winding (L1) to achieve bipolar current flow. On the other hand, an auxiliary inductor La, and a diode (Da) are connected in series with the other winding L2, to keep the current unipolar. Therefore, compared to the second variant core loss in the coupled inductor is restricted in this topology. The current ripple in the main inductor, L, is kept low by designing the inductance to be high. ZVS is achieved in all four switches. However, this topology suffers from a higher part count compared to the second variant.
Hence, there is a need for an advanced and reliable converter for charging an external device to encounter issues such as, for example, but not limited to, increased switching loss and electromagnetic interference (EMI) issues due to hard turn ON and turn OFF of switches, Production of output voltages both higher and lower than input DC voltage,, increased conduction and inductor core losses due to an increase in inductor current ripple, reversing output voltage polarity, additional core losses due to bipolar current, and the like, in order to address the aforementioned issues.
SUMMARY
This summary is provided to introduce a selection of concepts, in a simple manner which is further described in the detailed description of the disclosure. This summary is neither intended to identify key or essential inventive concepts of the subject matter nor to determine the scope of the disclosure.
In one aspect of the present disclosure, a converter for charging an external device is disclosed. The converter for charging an external device includes a primary half-bridge stage, a secondary half-bridge stage, and a control unit. Further, the primary half-bridge stage includes, but is not limited to, two or more primary switches connected to a voltage source, and a magnetic device. Further, the magnetic device includes, but is not limited to, a primary winding and a secondary winding. The primary winding of the magnetic device is connected between the primary half-bridge stage and the secondary half-bridge stage. Further, the magnetic device has a leakage inductance and a magnetizing inductance. Further, the two or more primary switches and two or more secondary switches are connected through the leakage inductance and the magnetizing inductance of the magnetic device. Further, the secondary half-bridge stage is communicatively coupled to the primary half-bridge stage. The secondary half-bridge stage includes, but is not limited to, two or more secondary switches, and a switch. Further, the two or more secondary switches of the secondary half-bridge are connected to a common terminal of the primary winding and the secondary winding of the magnetic device. Further, the switch is configured to be selectively connectable between a first position and a second position. The first position connects the switch to a secondary switch and the second position connects to the secondary winding of the magnetic device. Further, the switch is configured to switch between one of a buck-boost (BB) configuration and a tapped-inductor buck- (TI-B) configuration based on a position of the switch. Further, the converter for charging an external device includes a control unit.
Further, the control unit is communicatively coupled to the primary half-bridge stage and the secondary half-bridge stage. The control unit is communicatively coupled to an external device via a communication channel for powering the external device. Further, the control unit is configured to determine a type of the external device connected to an output terminal of the converter. Further, the control unit is configured to switch a position of the switch based on the determined type of the external device. The position of the switch corresponds to one of the first position and the second position. Further, the control unit is configured to operate the converter in a plurality of modes corresponding to each of the BB configuration and the TI-B configuration by adjusting at least one of a duty ratio of the primary switches and the secondary switches, and adjusting a phase shift between switching signals applied to the primary half-bridge stage and the secondary half-bridge stage. Further, the control unit is configured to transfer power to the external device via the output terminal of the converter based on a desired output voltage and the determined type of the external device.
In another aspect of the present disclosure, a method for charging an external device using a converter is disclosed. The method includes applying, by the control unit, an input voltage via a voltage source connected across two or more primary switches in the primary half-bridge stage of the converter. The primary winding of the magnetic device is connected between the primary half-bridge stage and the secondary half-bridge stage. Further, the method includes determining, by the control unit, the type of an external device connected to an output terminal of the converter. Further, the method includes switching, by the control unit, a position of a switch based on the determined type of the external device. The switch selectively connects between a first position and a second position. The first position connects the switch to an intermediate capacitor and the second position connects the switch to a second terminal of the secondary winding of the magnetic device. Further, the method includes switching, by the control unit, between one of a buck-boost (BB) configuration and a tapped-inductor buck (TI-B) configuration based on the switched position of the switch. Further, the method includes operating, by the control unit, in a plurality of modes corresponding to each of the BB configuration and the TI-B configuration by adjusting at least one of a duty ratio of primary switches and secondary switches, and adjusting a phase shift between switching signals applied to the primary half-bridge stage and the secondary half-bridge stage. Further, the method includes generating, by the control unit, a desired output voltage across the output terminal of the converter based on a mode of operation. Further, the method includes transferring, by the control unit via the output terminal, power to the external device based on the generated desired output voltage and the determined type of the external device.
To further clarify the advantages and features of the present disclosure, a more particular description of the disclosure will follow by reference to specific embodiments thereof, which are illustrated in the appended figures. It is to be appreciated that these figures depict only typical embodiments of the disclosure and are therefore not to be considered limiting in scope. The disclosure will be described and explained with additional specificity and detail with the appended figures.
BRIEF DESCRIPTION OF DRAWINGS
The disclosure will be described and explained with additional specificity and detail with the accompanying figures in which:
FIG. 1A illustrates a circuit diagram representation of a conventional Two-stage architecture for Type-C USB power delivery, in accordance with a prior art;

FIG. 1B illustrates a circuit diagram representation of a conventional Synchronous buck converter, in accordance with a prior art;
FIG. 1C illustrates a circuit diagram representation of a conventional Four-switch buck-boost (FSBB) converter, in accordance with a prior art;
FIG. 1D illustrates a circuit diagram representation of a conventional Coupled-inductor interleaved buck-boost converter, in accordance with a prior art;
FIG. 1E illustrates a circuit diagram representation of a conventional Switched-capacitor buck-boost converter, in accordance with a prior art;
FIG. 1F illustrates a circuit diagram representation of a conventional Zero-voltage-transition four-switch buck-boost converter, in accordance with a prior art;
FIG. 1G illustrates a circuit diagram representation of a conventional auxiliary LC four-switch buck-boost converter, in accordance with a prior art;
FIG. 1H illustrates a circuit diagram representation of a conventional Parallel capacitor four-switch buck-boost converter, in accordance with a prior art;
FIG. 1I illustrates a circuit diagram representation of a conventional Tapped-inductor buck-boost converter, in accordance with a prior art (prior art);
FIG. 1J illustrates a circuit diagram representation of a conventional Tapped-inductor five-switch buck-boost converter, in accordance with a prior art;
FIG. 1K illustrates a circuit diagram representation of a Variant 1 of a conventional Zero-voltage-switching four-switch buck-boost converter, in accordance with a prior art;
FIG. 1L illustrates a circuit diagram representation of a Variant 2 of a conventional Zero-voltage-switching four-switch buck-boost converter, in accordance with a prior art;
FIG. 1M illustrates a circuit diagram representation of a Variant 3 of a conventional Zero-voltage-switching four-switch buck-boost converter, in accordance with a prior art;
FIG. 2A-1 is an exemplary circuit diagram illustrating a tapped inductor four-switch buck-boost converter for producing a wide range of DC output voltages catering to Type C universal serial bus (USB) power delivery (PD) requirements, in accordance with an embodiment of the present disclosure;
FIG. 2A-2 is an exemplary circuit diagram illustrating a tapped inductor four-switch buck-boost converter in a four-switch buck boost mode, in accordance with an embodiment of the present disclosure;
FIG. 2B is an exemplary graphical representation of input-output voltage and current in four-switch buck-boost converter in mode 1 of 20V-to-20V conversion, in accordance with an embodiment of the present disclosure;
FIG. 2C is an exemplary graphical representation of input-output voltage and current in four-switch buck-boost converter in mode 2 of 20V-to-20V conversion, in accordance with an embodiment of the present disclosure;
FIG. 2D is an exemplary graphical representation of input-output voltage and current in four-switch buck-boost converter in boost conversion mode-1, in accordance with an embodiment of the present disclosure;
FIG. 2E is an exemplary graphical representation of input-output voltage and current in four-switch buck-boost converter in boost conversion mode -2, in accordance with an embodiment of the present disclosure;
FIG. 2F is an exemplary graphical representation of input-output voltage and current in four-switch buck-boost converter in boost conversion mode -3, in accordance with an embodiment of the present disclosure;
FIG. 3A-1 is an exemplary circuit diagram illustrating a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3A-2 illustrates a circuit diagram representation of a Subcircuit I of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3B illustrates a circuit diagram representation of a Subcircuit II of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3C illustrates a circuit diagram representation of a Subcircuit III of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3D illustrates a circuit diagram representation of a Subcircuit IV of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3E illustrates a timing diagram representation of a mode 1 of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3F illustrates a timing diagram representation of a mode 2 of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3G illustrates a timing diagram representation of a mode 3 of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3H illustrates a timing diagram representation of a mode 4 of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 3I illustrates a timing diagram representation of a mode 5 of an exemplary converter in a Tapped Inductor four-switch buck-boost mode (step down) for charging an external device, in accordance with an embodiment of the present disclosure;
FIG. 4A illustrates a graphical diagram representation of Simulation results for 20V-20V Conversion of an exemplary converter, in accordance with an embodiment of the present disclosure;
FIG. 4B illustrates a graphical diagram representation of Simulation results for Boost Conversion of an exemplary converter, in accordance with an embodiment of the present disclosure;
FIG. 4C illustrates a graphical diagram representation of Simulation results for TI-B mode 1, in accordance with an embodiment of the present disclosure;
FIG. 4D illustrates a graphical diagram representation of Simulation results for TI-B mode 2, in accordance with an embodiment of the present disclosure;
FIG. 4E illustrates a graphical diagram representation of Simulation results for TI-B mode 3, in accordance with an embodiment of the present disclosure;
FIG. 4F illustrates a graphical diagram representation of Simulation results for TI-B mode 4, in accordance with an embodiment of the present disclosure;
FIG. 4G illustrates a graphical diagram representation of Simulation results for TI-B mode 5, in accordance with an embodiment of the present disclosure;
FIG. 4H illustrates a graphical diagram representation of modes of operation for different combinations of intermediate bus voltage and output voltage, in accordance with an embodiment of the present disclosure;
FIG. 4I illustrates a graphical diagram representation of Peak-peak inductor current ripple vs phase shift interval, in accordance with an embodiment of the present disclosure; and
FIG. 5 illustrates a flow diagram representation of the method for charging an external device using a converter, in accordance with an embodiment of the present disclosure.
Further, those skilled in the art will appreciate that elements in the figures are illustrated for simplicity and may not have necessarily been drawn to scale. Furthermore, in terms of the construction of the device, one or more components of the device may have been represented in the figures by conventional symbols, and the figures may show only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the figures with details that will be readily apparent to those skilled in the art having the benefit of the description herein.
DETAILED DESCRIPTION OF THE DISCLOSURE
For the purpose of promoting an understanding of the principles of the disclosure, reference will now be made to the embodiment illustrated in the figures and specific language will be used to describe them. It will nevertheless be understood that no limitation of the scope of the disclosure is thereby intended. Such alterations and further modifications in the illustrated system, and such further applications of the principles of the disclosure as would normally occur to those skilled in the art are to be construed as being within the scope of the present disclosure. It will be understood by those skilled in the art that the foregoing general description and the following detailed description are exemplary and explanatory of the disclosure and are not intended to be restrictive thereof.
In the present document, the word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment or implementation of the present subject matter described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.
The terms “comprise”, “comprising”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that one or more devices or sub-systems or elements or structures or components preceded by “comprises…. a” does not, without more constraints, preclude the existence of other devices, sub-systems, additional sub-modules. Appearances of the phrase “in an embodiment”, “in another embodiment” and similar language throughout this specification may, but not necessarily do, all refer to the same embodiment.
Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. The system, methods, and examples provided herein are only illustrative and not intended to be limiting.
A computer system (standalone, client or server computer system) is configured by an application may constitute a “module” (or “subsystem”) that is configured and operated to perform certain operations. In one embodiment, the “module” or “subsystem” may be implemented mechanically or electronically, so a module includes dedicated circuitry or logic that is permanently configured (within a special-purpose processor) to perform certain operations. In another embodiment, a “module” or “subsystem” may also comprise programmable logic or circuitry (as encompassed within a general-purpose processor or other programmable processor) that is temporarily configured by software to perform certain operations.
Accordingly, the term “module” or “subsystem” should be understood to encompass a tangible entity, be that an entity that is physically constructed, permanently configured (hardwired) or temporarily configured (programmed) to operate in a certain manner and/or to perform certain operations described herein.
In one aspect of the present disclosure, a converter for charging an external device is disclosed. The converter for charging an external device includes a primary half-bridge stage, a secondary half-bridge stage, and a control unit (not shown). Further, the primary half-bridge stage includes, but is not limited to, two or more primary switches connected to a voltage source, and a magnetic device. Further, the magnetic device includes, but is not limited to, a primary winding and a secondary winding. The primary winding of the magnetic device is connected between the primary half-bridge stage and the secondary half-bridge stage. Further, the magnetic device has a leakage inductance and a magnetizing inductance. Further, the two or more primary switches and two or more secondary switches are connected through the leakage inductance and the magnetizing inductance of the magnetic device during switching transitions. Further, the secondary half-bridge stage is communicatively coupled to the primary half-bridge stage. The secondary half-bridge stage includes, but is not limited to, two or more secondary switches, and a switch. Further, the two or more secondary switches of the secondary half-bridge are connected to a common terminal of the primary winding and the secondary winding of the magnetic device. Further, the switch is configured to be selectively connectable between a first position 1 and a second position 2. The first position connects the switch to a secondary switch and the second position connects to the secondary winding of the magnetic device. Further, the switch is configured to switch between one of a buck-boost (BB) configuration and a tapped-inductor buck- (TI-B) configuration based on a position of the switch. Further, the converter for charging an external device includes a control unit (not shown). Further, the control unit (not shown) is communicatively coupled to the primary half-bridge stage and the secondary half-bridge stage. The control unit (not shown) is communicatively coupled to an external device via a communication channel for powering the external device. Further, the control unit is configured to determine a type of the external device connected to an output terminal of the converter. Further, the control unit is configured to switch a position of the switch based on the determined type of the external device. The position of the switch corresponds to one of the first position 1 and the second position 2. Further, the control unit is configured to operate the converter in a plurality of modes corresponding to each of the BB configuration and the TI-B configuration by adjusting at least one of a duty ratio of the primary switches and the secondary switches, and adjusting a phase shift between switching signals applied to the primary half-bridge stage and the secondary half-bridge stage. Further, the control unit is configured to transfer power to the external device via the output terminal of the converter based on a desired output voltage and the determined type of the external device.
Referring now to the drawings, and more particularly to FIG. 2A-1 through FIG. 5, where similar reference characters denote corresponding features consistently throughout the figures, there are shown preferred embodiments and these embodiments are described in the context of the following exemplary system and/or method.
FIG. 2A-1 illustrates a circuit diagram representation of an exemplary converter 200 for charging an external device (not shown), in accordance with an embodiment of the present disclosure. According to FIG. 2A-1, the converter 200 may include, but is not limited to, a primary half-bridge 202 stage, a secondary half-bridge stage 208, and a control unit (not shown). Further, the primary half-bridge 202 stage of the converter 200 may include, but not limited to, two or more primary switches 204 connected to a voltage source 214. In an embodiment, the voltage source 214 may include, for example, but not limited to, a DC source.Further, the magnetic device 206 may include a primary winding and a secondary winding. The primary winding of the magnetic device 206 may be connected between the primary half-bridge stage 202 and the secondary half-bridge stage 208. The magnetic device 206 has a leakage inductance and a magnetizing inductance. Further, the leakage inductance and the magnetizing inductance of the magnetic device 206 may be used to connect the two or more primary switches 204 and two or more secondary switches 210. Further, the leakage and the magnetizing inductances may be utilized to achieve zero-voltage switching (ZVS) during the turn-on transitions of all the primary switches 204 and the secondary switches 210. Further, the leakage and the magnetizing inductances may be utilized to decrease the voltage stress across the two or more primary switches 204 and the two or more secondary switches 210 by alleviating the requirement of an additional clamp circuit (not shown).
Further, the secondary half-bridge stage 208 of the converter may be communicatively coupled to the primary half-bridge stage 202. Further, the secondary half-bridge stage 208 may include, but not limited to, the two or more secondary switches 210. Further, the two or more secondary switches 210 may be connected to a common terminal of the primary winding and the secondary winding of the magnetic device 206. Further, an intermediate capacitor 216 is connected across at least two secondary switches 210. Further, the magnetic device 206 may include, but is not limited to, a passive two-terminal electrical component such as a tapped inductor, and the like. Further, the secondary half-bridge stage 208 may include a switch 212. Further, the secondary half-bridge stage 208 may include an output capacitor (Cout) 218 connected between the output terminals of the converter. Further, the switch 212 may be selectively connectable between a first position (P1, as shown in FIG. 2) and a second position (P2). The first position (P1) may be configured to connect the switch 212 to a secondary switch 210 and the second position (P2) may be configured to connect to the secondary winding of the magnetic device 206. Further, the switch 212 may be configured to operate as a selection switch based on the external device (not shown) connected. Further, the switch 212 may include a Single Pole Double Throw (SPDT) switch, and the like. Further, the switch 212 may be configured to switch between one of a buck-boost (BB) configuration and a tapped-inductor buck- (TI-B) configuration based on a position of the switch 212.
Further, the control unit (not shown) may be communicatively coupled to the primary half-bridge stage 204 and the secondary half-bridge stage 208. The control unit (not shown) may be communicatively coupled to an external device (not shown) via a communication channel for powering the external device (not shown). Further, the control unit (not shown) may be configured to determine a type of the external device (not shown) connected to an output terminal of the converter 200. Further, the control unit (not shown) may be configured to switch a position of the switch 212 based on the determined type of the external device (not shown). The position of the switch 212 corresponds to one of the first position (P1) and the second position (P2). Further, the control unit (not shown) may be configured to operate the converter 200 in a plurality of modes corresponding to each of the BB configuration and the TI-B configuration by adjusting at least one of a duty ratio of the primary switches 204 and the secondary switches 210, and adjusting a phase shift between switching signals applied to the primary half-bridge stage 204 and the secondary half-bridge stage 208. Further, the control unit (not shown) may be configured to transfer power to the external device (not shown) via the output terminal of the converter 200 based on a desired output voltage and the determined type of the external device (not shown). Further, the control unit may be configured to apply a phase-shift interval between gating signals of the at least two primary switches 204 and the at least two secondary switches 210 to produce the desired current ripple in the magnetic device 206. Further, the control unit may be configured to generate the desired output voltage by applying a volt-second balance on the leakage inductance LLK and the magnetizing inductance Lm connected in series. Further, the external device (not shown) may include, but is not limited to, a mobile phone, a camera, a tablet computer, a laptop computer, a television (TV) set, a communicating device, and the like.
Further, the control unit (not shown) may be configured to tune at least one of the duty ratios of the primary switches 204 and the secondary switches 210, and a phase-shift angle, during the BB configuration and the TI-B configuration to optimize a peak-to-peak inductor current ripple. Further, the duty ratio may refer to a time for which a signal is at high level or the time for which the switch is in active state. Further, the control unit (not shown) may be configured to apply the desired output voltage (Vo), and a voltage across the intermediate capacitor 216 Cint (Vc) to optimize the peak-to-peak inductor current ripple to tune the at least one of the duty ratios of the primary switches and the secondary switches, and the phase-shift angle, during the BB configuration and the TI-B configuration to optimize the peak-to-peak inductor current ripple. Further, the control unit (not shown) may be configured to select a desired operating mode from among the plurality of modes based on at least one of an input voltage Vin, the desired output voltage Vo, and an output current io and based on a type of configuration. Further, the control unit (not shown) may be configured to switch a primary voltage corresponding to the at least two primary switches 204 and a secondary voltage corresponding to the at least two secondary switches 210 to a zero-voltage level during each of the plurality of modes using the leakage inductance LLK and the magnetizing inductance Lm.
Further, the converter 200 may be configured to be utilized for producing a wide range of DC output voltages (3.3V, 5V, 9V, 15V, 20V, 28V, 36V, 48V) catering to Type C universal serial bus (USB) power delivery (PD) requirements. Further, the converter 200 may be supplied from a 20V DC input generated by an AC-DC flyback power factor correction rectifier. Further, the converter 200 may be configured to employ both duty-cycle and phase-shift modulation techniques for driving the switches. Further, the duty-cycle and phase-shift modulation techniques may be used in five or more different operating modes for the TI-FSBB topology. Further, the converter 200 may be configured to operate in two or different configurations such as, but not limited to, FSBB, TI-FSBB, and the like. Further, the leakage inductance of the magnetic device 206 may be used to determine power transfer for both FSBB and TI-FSBB configurations. This mitigates any possibility of increased voltage stress across the two or more primary switches 204 and the two or more secondary switches 210 due to the energy stored in the leakage inductance LLK. Further, the converter 200 may be capable of reducing the peak-peak inductor current ripple by an appropriate choice of duty ratio, phase-shift angle, magnetizing, and leakage inductances while operating in both FSBB and TI-FSBB configurations. Further, the leakage LLK and magnetizing inductances Lm of the tapped-inductor participate in power transfer for both FSBB and TI-FSBB configurations. Further, the leakage energy does not increase the voltage stress across the two or more primary switches 204 and the two or more secondary switches 210 alleviating the requirement of any additional clamp circuit (not shown).
FIG. 2A-2 illustrates a circuit diagram representation of an exemplary converter 200 in a Four-Switch Buck-Boost mode 200A (step up) for charging an external device (not shown), in accordance with an embodiment of the present disclosure. According to FIG. 2A-2, the switch 212 may be configured to operate as a selection switch based on the external device (not shown) connected. Further, when the switch 212 is positioned at position P1, the converter 200 may be configured to operate as a normal Four Switch Buck Boost converter as shown in FIG. 2A-2. Further, the converter 200 at position P1 may be used for, but not limited to, a 20V-to-20V conversion, and for a boost operation. For the converter to be used for 20V-to-20V conversion the primary half-bridge 202 stage may be configured to be operated at 50% duty ratio. Further, the secondary half-bridge stage 208 may be configured to be operated at 50% duty ratio. Further, the two or more primary switches 204 of the primary half-bridge 202 and the two or more secondary switches 210 of the secondary half-bridge stage 208 may be configured to be supplied with a phase shift interval of xT to achieve the Zero Voltage Switching (ZVS) across all the primary switches 204 and all the secondary switches 210. Further, the converter 200 may be configured to operate as the 20V-to-20V converter in two or more modes of operation. Further, the two or more modes of operation may be based on the phase shift interval provided to the two or more primary switches 204 and two or more secondary switches 210. Further, the converter 200 may be configured to derive the same output voltage as the input voltage by applying the volt-second balance on the leakage and the magnetizing inductance connected in series. Further, the output voltage may be derived as
V_o=V_in………Equation(1)
Further, for the converter 200 to be operated as a boost converter the primary half bridge stage 202 and the secondary half bridge stage 208 may be supplied with a duty ratio more than 50%. Further, the primary half bridge stage 202 may be configured to operate at duty ratio D. Further, the secondary half bridge stage 208 may be configured to operate at duty ratio (1-D). Further, the two or more primary switches 204 and the two or more secondary switches 210 may be configured to be supplied with a gate signal in a complementary fashion. Further, the converter 200 may be configured to derive the same output voltage as input voltage by applying the volt-second balance on the leakage and the magnetizing inductance connected in series. Further, the output voltage may be derived as:
Vo=(Dv_in)/(1-D) Equation (2)
FIG. 2B illustrates a timing diagram representation of mode 1 of an exemplary converter 200 in a 20V-to-20V conversion, in accordance with an embodiment of the present disclosure. According to FIG. 2B, the converter 200 may be configured to operate in mode 1 based on the phase shift applied to the two or more primary switches 204 and the two or more secondary switches 210. Further, the phase-shift interval xT may be introduced between the gating signals of the two half-bridge stages to achieve ZVS in all the switches. Further, the mode 1 may be determined if the phase shift xT is less than half of a cycle (T/2). Further, the mode 1 may be derived as:
Mode 1: when xT0, I3>0, and I4<0.
FIG. 2C illustrates a timing diagram representation of mode 2 of an exemplary converter 200 in a 20V-to-20V conversion, in accordance with an embodiment of the present disclosure. According to FIG. 2C, the converter 200 may be configured to operate in mode 2 based on the phase shift applied to the two or more primary switches 204 and the two or more secondary switches 210. Further, the phase-shift interval xT may be introduced between the gating signals of the two half-bridge stages to achieve ZVS in all the switches. Further, the mode 2 may be determined based on the phase shift xT is more than half of a cycle (T/2). Further, the mode 2 may be derived as:
Mode 2: when xT>T/2s
Further, according to the representation in the FIG. 2C, Vgs1 and Vgs3 may represent the gate-source voltages of the two or more primary switches 204 and the two or more secondary switches 210. Further, the primary switches 204 and secondary switches 210 may be configured to turn ON and turn OFF based on the respective gate voltages of the primary switches 204 and the secondary switches 210. Further, vLK represents the voltage across the leakage inductance. Further, the vp represents the voltage across the magnetizing inductance. Further, the iLK represents the current through the inductor. Further, the current I1, I2, I3, I4 represent the corner points of the current flowing through the leakage inductor. For the converter 200 to operate in a mode 2 a phase shift interval of xT may be applied. Further, the phase shift interval xT may be more than T/2. Further, whenever there is a phase shift difference of xT, the voltages across the leakage inductor and the magnetizing inductor (vlk + vp) for time interval t1 are equal to vin-vo. Further, the voltages across the leakage inductor and the magnetizing inductor (vlk +vp) are equal to Vin for time interval t2. Further, the voltages across the leakage inductor and the magnetizing inductor (vlk +vp) are equal to 0 volts for time interval t3. Further, the voltages across the leakage inductor and the magnetizing inductor (vlk +vp) are equal to -vo for time interval t4. Further, to achieve the condition of Zero Voltage Switching (ZVS), the current flowing through all of the primary switches 204 and all of the secondary switches 210 may be determined as I1<0, I2>0, I3>0, and I4<0. The below table. 1 lists the time durations for different modes of operation based on phase shift.

TABLE. 1
FIG. 2D illustrates a timing diagram representation of mode 1 of an exemplary converter 200 in a boost conversion, in accordance with an embodiment of the present disclosure.
Mode 1: when xT