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Adaptive Bias And Harmonic Control System

Abstract: ADAPTIVE BIAS AND HARMONIC CONTROL SYSTEM ABSTRACT An adaptive bias and harmonic control system (100) for a reconfigurable multi-band Class-F power amplifier (102) is disclosed. The system (100) comprising an active amplification device (104); a sensing unit (106) to receive operational parameters; a control unit (108) to generate an optimized bias control signal based on the received operational parameters using a trained predictive model; a bias control circuit (110) to adjust a gate bias voltage and a drain bias voltage of the active amplification device (104) in response to the optimized bias control signal; a digitally tuneable harmonic network (112) configured to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component; and a feedback loop (114) configured to monitor amplifier efficiency and thermal conditions and to enable real-time modification of the gate bias voltage, the drain bias voltage, and harmonic impedance parameters to maintain a target efficiency across multiple frequency bands. Claims: 10, Figures: 3 Figure 1A is selected.

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Patent Information

Application #
Filing Date
13 March 2026
Publication Number
13/2026
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

SR University
SR University, Ananthasagar, Warangal Telangana India 506371 patent@sru.edu.in 08702818333

Inventors

1. Dr. Mounika B
SR University, Ananthasagar, Hasanparthy (PO), Warangal, Telangana, India-506371.
2. Dr. J Ajayan
SR University, Ananthasagar, Hasanparthy (PO), Warangal, Telangana, India-506371.

Claims

1. An adaptive bias and harmonic control system (100) for a reconfigurable multi-band Class-F power amplifier (102), characterized in that the system (100) comprising: an active amplification device (104); a sensing unit (106) adapted to receive operational parameters selected from an input power level, an operating frequency, a drain voltage, a drain current, a device temperature, or a combination thereof; a control unit (108), operatively coupled to the sensing unit (106), configured to generate an optimized bias control signal based on the received operational parameters using a trained predictive model; a bias control circuit (110) configured to adjust a gate bias voltage and a drain bias voltage of the active amplification device (104) in response to the optimized bias control signal; a digitally tuneable harmonic network (112) configured to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component; and a feedback loop (114) configured to monitor amplifier efficiency and thermal conditions and to enable real-time modification of the gate bias voltage, the drain bias voltage, and harmonic impedance parameters to maintain a target efficiency across multiple frequency bands.

2. The system (100) as claimed in claim 1, wherein the trained predictive model comprises a machine learning model trained offline using historical efficiency and bias datasets.

3. The system (100) as claimed in claim 1, wherein the digitally tuneable harmonic network (112) comprises a varactor diode and a digitally controlled capacitor.

4. The system (100) as claimed in claim 1, wherein the active amplification device (104) comprises a gallium nitride high electron mobility transistor.

5. The system (100) as claimed in claim 1, wherein the digitally tuneable harmonic network (112) is configured to provide continuous frequency tuning within a range of 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz).

6. The system (100) as claimed in claim 1 wherein the sensing unit (106) comprises a voltage sensor, a current sensor, and a temperature sensor positioned at or near a drain node of the active amplification device (104).

7. The system (100) as claimed in claim 1, wherein the feedback loop (114) is configured to compensate for frequency shift, load mismatch, and temperature variation during operation.

8. The system (100) as claimed in claim 1, wherein the real-time modification of the gate bias voltage, the drain bias voltage, and the harmonic impedance parameters reduces power dissipation and improves linearity under varying load conditions.

9. The system (100) as claimed in claim 1, wherein the target efficiency comprises a power-added efficiency greater than 75 percent across different operating bands.

10. A method (200) for adaptive bias and harmonic control in a reconfigurable multi-band Class-F power amplifier (102), the method (200) is characterized by steps of: receiving, by a sensing unit (106), operational parameters comprising an input power level, an operating frequency, a drain voltage, a drain current, and a device temperature; generating, by a control unit (108), an optimized bias control signal based on the received operational parameters using a trained predictive model; adjusting a gate bias voltage and a drain bias voltage of an active amplification device (104) in response to the optimized bias control signal; configuring a digitally tuneable harmonic network (112) to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component; monitoring amplifier efficiency and thermal conditions through a feedback loop (114); and modifying, by the control unit (108), the gate bias voltage and harmonic impedance parameters in real time to maintain a target efficiency across frequency bands. Date: March 09, 2026 Place: Noida Nainsi Rastogi Patent Agent (IN/PA-2372) Agent for the Applicant

Specification

Description:
BACKGROUND
Field of Invention
[001] Embodiments of the present invention generally relate to a microelectronic control system and particularly to an adaptive bias and harmonic control system.
Description of Related Art
[002] Recent wireless communication standards such as 5G NR, Wi-Fi 7, and Internet of Things demand power amplification systems that provide high efficiency, compact structure, and reliable operation across multiple frequency bands. Conventional radio frequency power amplifiers operate with fixed bias conditions and predefined harmonic terminations. Such configurations result in performance degradation when frequency, load impedance, or ambient temperature deviates from nominal design values. Efficiency reduction, linearity loss, and excessive heat generation create substantial limitations in modern multi-band communication infrastructure. The absence of dynamic control over bias and harmonic parameters creates a technical challenge in sustaining optimal operation under variable environmental and signal conditions.
[003] Current commercial solutions primarily rely on Class-F and Doherty amplifier architectures implemented with gallium nitride high electron mobility transistor devices such as CGH40010. Manufacturers including Qorvo, NXP Semiconductors, MACOM, and Wolfspeed supply amplifier modules optimized for specific frequency bands. Bias control typically depends on static voltage settings or predefined calibration tables. Limited band reconfiguration occurs through PIN diode networks, varactor elements, or microcontroller-based impedance selection circuits. Thermal monitoring circuits provide protection functions but do not ensure continuous efficiency optimization across wide frequency ranges.
[004] Despite these developments, presently available solutions exhibit narrow operational bandwidth and restricted adaptability. Fixed bias schemes lack autonomous response to load mismatch or thermal variation. Harmonic tuning networks offer discrete adjustment steps rather than continuous optimization. Thermal protection circuits prioritize device safety but do not maintain peak efficiency. Consequently, existing systems suffer from energy loss, increased power dissipation, reduced reliability, and compromised performance in multi-standard environments. The absence of integrated, intelligent bias and harmonic coordination results in limited capability to sustain consistent efficiency across diverse operating conditions.
[005] There is thus a need for an improved and advanced adaptive bias and harmonic control system that can administer the aforementioned limitations in a more efficient manner.
SUMMARY
[006] Embodiments in accordance with the present invention provide an adaptive bias and harmonic control system for a reconfigurable multi-band Class-F power amplifier. The system comprising an active amplification device. The system further comprising a sensing unit adapted to receive operational parameters selected from an input power level, an operating frequency, a drain voltage, a drain current, a device temperature, or a combination thereof. The system further comprising a control unit, operatively coupled to the sensing unit, configured to generate an optimized bias control signal based on the received operational parameters using a trained predictive model. The system further comprising a bias control circuit configured to adjust a gate bias voltage and a drain bias voltage of the active amplification device in response to the optimized bias control signal. The system further comprising a digitally tuneable harmonic network configured to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component. The system further comprising a feedback loop configured to monitor amplifier efficiency and thermal conditions and to enable real-time modification of the gate bias voltage, the drain bias voltage, and harmonic impedance parameters to maintain a target efficiency across multiple frequency bands.
[007] Embodiments in accordance with the present invention further provide a method for adaptive bias and harmonic control in a reconfigurable multi-band Class-F power amplifier. The method comprising steps of receiving, by a sensing unit, operational parameters comprising an input power level, an operating frequency, a drain voltage, a drain current, and a device temperature; generating, by a control unit, an optimized bias control signal based on the received operational parameters using a trained predictive model; adjusting a gate bias voltage and a drain bias voltage of an active amplification device in response to the optimized bias control signal; configuring a digitally tuneable harmonic network to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component; monitoring amplifier efficiency and thermal conditions through a feedback loop; and modifying, by the control unit, the gate bias voltage and harmonic impedance parameters in real time to maintain a target efficiency across frequency bands.
[008] Embodiments of the present invention may provide a number of advantages depending on their particular configuration. First, embodiments of the present application may provide an adaptive bias and harmonic control system for a reconfigurable multi-band Class-F power amplifier.
[009] Next, embodiments of the present application may provide an adaptive bias and harmonic control system that achieves sustained high power-added efficiency across multiple frequency bands under variable load and temperature conditions.
[0010] Next, embodiments of the present application may provide an adaptive bias and harmonic control system that enables dynamic bias optimization based on operational parameters such as input power, frequency, and device temperature.
[0011] Next, embodiments of the present application may provide an adaptive bias and harmonic control system that provides continuous harmonic impedance control for improved linearity and reduced signal distortion.
[0012] Next, embodiments of the present application may provide an adaptive bias and harmonic control system that reduces thermal stress and associated reliability concerns through coordinated bias and operational mode control.
[0013] Next, embodiments of the present application may provide an adaptive bias and harmonic control system that enhances multi-standard compatibility within a compact architecture suitable for modern wireless communication infrastructure.
[0014] These and other advantages will be apparent from the present application of the embodiments described herein.
[0015] The preceding is a simplified summary to provide an understanding of some embodiments of the present invention. This summary is neither an extensive nor exhaustive overview of the present invention and its various embodiments. The summary presents selected concepts of the embodiments of the present invention in a simplified form as an introduction to the more detailed description presented below. As will be appreciated, other embodiments of the present invention are possible utilizing, alone or in combination, one or more of the features set forth above or described in detail below.
BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The above and still further features and advantages of embodiments of the present invention will become apparent upon consideration of the following detailed description of embodiments thereof, especially when taken in conjunction with the accompanying drawings, and wherein:
[0017] FIG. 1A illustrates a block diagram of an adaptive bias and harmonic control system for a reconfigurable multi-band Class-F power amplifier, according to an embodiment of the present invention;
[0018] FIG. 1B illustrates a circuit diagram of the adaptive bias and harmonic control system for a reconfigurable multi-band Class-F power amplifier, according to an embodiment of the present invention; and
[0019] FIG. 2 depicts a flowchart of a method for adaptive bias and harmonic control in a reconfigurable multi-band Class-F power amplifier, according to an embodiment of the present invention.
[0020] The headings used herein are for organizational purposes only and are not meant to be used to limit the scope of the description or the claims. As used throughout this application, the word "may" is used in a permissive sense (i.e., meaning having the potential to), rather than the mandatory sense (i.e., meaning must). Similarly, the words “include”, “including”, and “includes” mean including but not limited to. To facilitate understanding, like reference numerals have been used, where possible, to designate like elements common to the figures. Optional portions of the figures may be illustrated using dashed or dotted lines, unless the context of usage indicates otherwise.
DETAILED DESCRIPTION
[0021] The following description includes the preferred best mode of one embodiment of the present invention. It will be clear from this description of the invention that the invention is not limited to these illustrated embodiments but that the invention also includes a variety of modifications and embodiments thereto. Therefore, the present description should be seen as illustrative and not limiting. While the invention is susceptible to various modifications and alternative constructions, it should be understood, that there is no intention to limit the invention to the specific form disclosed, but, on the contrary, the invention is to cover all modifications, alternative constructions, and equivalents falling within the scope of the invention as defined in the claims.
[0022] In any embodiment described herein, the open-ended terms "comprising", "comprises”, and the like (which are synonymous with "including", "having” and "characterized by") may be replaced by the respective partially closed phrases "consisting essentially of", “consists essentially of", and the like or the respective closed phrases "consisting of", "consists of”, the like.
[0023] As used herein, the singular forms “a”, “an”, and “the” designate both the singular and the plural, unless expressly stated to designate the singular only.
[0024] FIG. 1A illustrates a block diagram of an adaptive bias and harmonic control system 100 (hereinafter referred to as the system 100) for a reconfigurable multi-band Class-F power amplifier 102 (hereinafter referred to as the power amplifier 102), according to an embodiment of the present invention. In an embodiment of the present invention, the power amplifier 102 may be adapted to amplify a radio frequency input signal across more than one discrete frequency band or across a continuous frequency range extending from 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz). In an embodiment of the present invention, the power amplifier 102 may be adapted to establish impedance conditions at a fundamental frequency and at harmonic frequencies including a second harmonic component and a third harmonic component to approximate Class-F waveform shaping characteristics.
[0025] In an embodiment of the present invention, the power amplifier 102 may be adapted to generate a substantially square drain voltage waveform and a substantially half-sinusoidal drain current waveform to minimize overlap between voltage and current and thereby improve power-added efficiency. In an embodiment of the present invention, the power amplifier 102 may be adapted to selectively modify harmonic impedance conditions using tunable reactive elements to enable continuous frequency reconfiguration without requiring discrete band switching. In an embodiment of the present invention, the power amplifier 102 may be adapted to operate under dynamically adjustable bias conditions to control conduction angle and output power level across varying load and temperature conditions.
[0026] In an embodiment of the present invention, the power amplifier 102 may be adapted to transition between Class-F and Class-J operational characteristics based on thermal stress or load variation to preserve stability and efficiency. In an embodiment of the present invention, coordinated harmonic tuning and bias adaptation may enable sustained high-efficiency amplification across multiple wireless communication standards. In an embodiment of the present invention, the multiple wireless communication standards may comprise Wideband Code Division Multiple Access, Long Term Evolution, Wi-Fi 7, and Fifth Generation New Radio standards operating within the 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz) frequency range.
[0027] In an embodiment of the present invention, the system 100 may be adapted to receive a radio frequency input signal. The system 100 may be adapted to amplify the radio frequency input signal under dynamically adjustable bias conditions to produce an amplified radio frequency output signal. In an embodiment of the present invention, the system 100 may be adapted to monitor operational parameters comprising an input power level, an operating frequency, a drain voltage, a drain current, and a device temperature during amplification.
[0028] In an embodiment of the present invention, the system 100 may be adapted to process the operational parameters using a trained predictive model that may generate optimized bias control values corresponding to instantaneous operating conditions. In an embodiment of the present invention, the system 100 may be adapted to regulate conduction angle and voltage swing characteristics based on the optimized bias control values to approximate Class-F operational behavior.
[0029] In an embodiment of the present invention, the system 100 may be adapted to manipulate harmonic impedance at harmonic frequencies including the second harmonic component and the third harmonic component to shape drain voltage and drain current waveforms. In an embodiment of the present invention, harmonic impedance conditions may be adjusted continuously across a frequency range extending from 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz) to enable multi-standard compatibility.
[0030] In an embodiment of the present invention, the system 100 may be adapted to implement a feedback mechanism that may compare measured efficiency and thermal conditions with a predefined efficiency target. The system 100 may be adapted to modify bias and harmonic parameters in real time. In an embodiment of the present invention, the system 100 may be adapted to transition between Class-F and Class-J operational modes based on thermal stress conditions to maintain stability and efficiency. In an embodiment of the present invention, coordinated adaptive bias regulation, harmonic impedance control, and thermal-responsive operation may enable sustained high power-added efficiency under varying load, frequency, and temperature conditions.
[0031] According to the embodiments of the present invention, the system 100 may incorporate non-limiting hardware components to enhance a processing speed and an efficiency such as the system 100 may comprise an active amplification device 104, a sensing unit 106, a control unit 108, a bias control circuit 110, a digitally tuneable harmonic network 112, and a feedback loop 114. In an embodiment of the present invention, the hardware components of the system 100 may be integrated with computer-executable instructions for overcoming the challenges and the limitations of the existing systems.
[0032] In an embodiment of the present invention, the active amplification device 104 may be adapted to operate as a radio frequency power amplification element configured for multi-band Class-F operation across a predefined frequency range. In an embodiment of the present invention, the active amplification device 104 may be adapted to receive a radio frequency input signal at an input terminal. The active amplification device 104 may be adapted to produce an amplified radio frequency output signal at an output terminal based on controlled bias conditions.
[0033] In an embodiment of the present invention, an input matching configuration electrically coupled to the active amplification device 104 may be adapted to provide impedance transformation between a source impedance and an input impedance of the active amplification device 104 across a frequency range extending from 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz). In an embodiment of the present invention, the input matching configuration may comprise microstrip transmission lines and reactive elements configured to establish broadband impedance matching and to provide first-level harmonic conditioning at harmonic frequencies to support waveform shaping within the active amplification device 104.
[0034] In an embodiment of the present invention, the active amplification device 104 may be adapted to operate under variable gate bias voltage and variable drain bias voltage to achieve selective conduction angle control and optimized waveform shaping. In an embodiment of the present invention, the active amplification device 104 may be adapted to support harmonic impedance manipulation at harmonic frequencies including the second harmonic component and the third harmonic component to approximate Class-F operational characteristics.
[0035] In an embodiment of the present invention, the active amplification device 104 may be adapted to sustain high-efficiency switching operation through drain voltage waveform shaping and current waveform control. In an embodiment of the present invention, the active amplification device 104 may comprise a wide bandgap semiconductor device including a gallium nitride high electron mobility transistor, a silicon carbide transistor, a laterally diffused metal oxide semiconductor transistor, or a silicon-based radio frequency transistor. In an embodiment of the present invention, the active amplification device 104 may be adapted to operate under elevated temperature conditions while maintaining gain stability, output power stability, and power-added efficiency across different operating bands.
[0036] In an embodiment of the present invention, the active amplification device 104 may comprise a gate terminal, a drain terminal, and a source terminal configured for high-frequency signal amplification and high-power density operation. In an embodiment of the present invention, the active amplification device 104 may comprise a gallium nitride high electron mobility transistor. The active amplification device 104 may be, but not limited to, a gallium nitride high electron mobility transistor, a silicon carbide transistor, a laterally diffused metal oxide semiconductor transistor, a silicon-based radio frequency transistor, a bipolar junction transistor, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the active amplification device 104, including known, related art, and/or later developed technologies.
[0037] In an embodiment of the present invention, the sensing unit 106 may be adapted to receive operational parameters selected from an input power level, an operating frequency, a drain voltage, a drain current, a device temperature, and so forth. The sensing unit 106 may be adapted to receive operational parameters through dedicated sensing interfaces electrically coupled to signal and bias nodes of the amplification stage. In an embodiment of the present invention, the sensing unit 106 may be adapted to measure the input power level using a directional coupler, power detector, or logarithmic detector configured to convert radio frequency power into a proportional analog voltage.
[0038] In an embodiment of the present invention, the sensing unit 106 may be adapted to determine the operating frequency using a frequency discriminator circuit, a phase-locked loop monitoring arrangement, or digital frequency estimation logic derived from the input signal. In an embodiment of the present invention, the sensing unit 106 may be adapted to sense drain voltage using a high-impedance voltage divider network coupled with a buffer amplifier to isolate radio frequency components from direct current measurement circuitry.
[0039] In an embodiment of the present invention, the sensing unit 106 may be adapted to measure drain current using a current sense resistor, a Hall-effect current sensor, or a current mirror configuration configured to generate a proportional sensing signal. In an embodiment of the present invention, the sensing unit 106 may be adapted to detect device temperature using a thermistor, a semiconductor junction temperature sensor, or an integrated temperature sensing diode positioned proximate to a heat-generating region of the amplification device.
[0040] In an embodiment of the present invention, the sensing unit 106 may be adapted to condition the sensed signals using filtering, amplification, and analog-to-digital conversion circuitry to provide digitized operational parameters suitable for predictive bias optimization. In an embodiment of the present invention, isolation networks, impedance buffering, and radio frequency chokes may be employed to prevent disturbance of the radio frequency signal path during parameter acquisition. In an embodiment of the present invention, the sensing unit 106 may comprise a voltage sensor, a current sensor, and a temperature sensor positioned at or near a drain node of the active amplification device 104.
[0041] The sensing unit 106 may be, but not limited to, voltage sensors, current sensors, temperature sensors, directional couplers, power detectors, logarithmic detectors, frequency discriminator circuits, phase-locked loop monitoring arrangements, analog-to-digital conversion circuitry, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the sensing unit 106, including known, related art, and/or later developed technologies.
[0042] In an embodiment of the present invention, the control unit 108 may be configured to generate an optimized bias control signal based on the received operational parameters using a trained predictive model. In an embodiment of the present invention, the control unit 108 may comprise a microcontroller, a digital signal processor, a field programmable gate array, or a system-on-chip architecture configured to execute stored program instructions.
[0043] In an embodiment of the present invention, the control unit 108 may be configured to receive digitized operational parameters comprising input power level, operating frequency, drain voltage, drain current, and device temperature through an analog-to-digital conversion interface. In an embodiment of the present invention, the trained predictive model may comprise a machine learning model including a regression model, a neural network model, a lookup-table-based adaptive model, or a hybrid predictive algorithm trained offline using historical efficiency and bias datasets. In another embodiment of the present invention, the trained predictive model may comprise a machine learning model trained offline using historical efficiency and bias datasets collected from controlled laboratory characterization of the power amplification stage.
[0044] In an embodiment of the present invention, the historical efficiency and bias datasets may comprise measured input power level, operating frequency, drain voltage, drain current, device temperature, corresponding gate bias voltage, corresponding drain bias voltage, and measured power-added efficiency values recorded across multiple operating conditions. In an embodiment of the present invention, the machine learning model may comprise a regression-based model, a feedforward neural network, a support vector regression model, a polynomial approximation model, or a hybrid data-driven predictive architecture adapted to map operational parameters to optimized bias values.
[0045] In an embodiment of the present invention, the offline training process may be performed using supervised learning techniques. The supervised learning techniques may include iterative adjustment of model parameters to minimize prediction error between estimated efficiency and measured efficiency values. In an embodiment of the present invention, feature normalization, dataset partitioning, and cross-validation procedures may be employed to improve model generalization across frequency bands and temperature ranges. In an embodiment of the present invention, trained model coefficients, weights, or lookup parameters may be stored in non-volatile memory of the control architecture for real-time inference execution. In an embodiment of the present invention, the trained predictive model may be adapted to provide bias predictions with reduced computational complexity to enable real-time implementation without exceeding latency constraints of the amplification control loop.
[0046] In an embodiment of the present invention, the control unit 108 may be configured to compute optimized gate bias voltage and optimized drain bias voltage values corresponding to instantaneous operating conditions by performing inference on the trained predictive model. In an embodiment of the present invention, the optimized bias control signal may be generated in digital form. The digital format of the optimized bias control signal may be converted into corresponding analog bias control voltages using a digital-to-analog conversion interface.
[0047] In an embodiment of the present invention, the control unit 108 may be configured to update the optimized bias control signal in real time based on continuous monitoring of efficiency and thermal parameters to maintain a predefined power-added efficiency target. In an embodiment of the present invention, computational latency, sampling frequency, and update rate may be selected to ensure stable closed-loop bias adaptation without inducing oscillation or instability in the amplification stage.
[0048] In an embodiment of the present invention, the control unit 108 executing the trained predictive model may be adapted to implement an artificial intelligence-assisted adaptive bias optimization mechanism configured to learn bias-to-efficiency relationships from historical datasets and to generate predictive bias control signals for maximum power-added efficiency under varying load and temperature conditions. In an embodiment of the present invention, continuous predictive inference may enable bias adaptation beyond static calibration tables and predefined bias mappings.
[0049] The control unit 108 may be, but not limited to, a microcontroller, a digital signal processor, a field programmable gate array, a system-on-chip architecture, an embedded processing unit, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the control unit 108, including known, related art, and/or later developed technologies.
[0050] In an embodiment of the present invention, the bias control circuit 110 may be configured to adjust a gate bias voltage and a drain bias voltage of the active amplification device 104 in response to the optimized bias control signal generated by the control unit 108. In an embodiment of the present invention, the bias control circuit 110 may be adapted to receive a digital bias command signal. The bias control circuit 110 may be adapted to convert the digital bias command signal into corresponding analog control voltages using a digital-to-analog conversion interface.
[0051] In an embodiment of the present invention, the bias control circuit 110 may comprise voltage regulation circuitry including low-dropout regulators, programmable voltage regulators, or operational amplifier-based bias generation stages configured to provide stable and noise-filtered bias outputs. In an embodiment of the present invention, the gate bias voltage may be adjusted to control conduction angle and quiescent operating point of the amplification device, and the drain bias voltage may be adjusted to control output power level and voltage swing characteristics.
[0052] In an embodiment of the present invention, the bias control circuit 110 may be adapted to incorporate filtering networks, decoupling capacitors, and radio frequency chokes to isolate direct current bias paths from radio frequency signal components. In an embodiment of the present invention, the bias control circuit 110 may be adapted to implement soft-start mechanisms, current limiting protection, and thermal compensation features to prevent bias overshoot and device stress during dynamic adjustment. In an embodiment of the present invention, the bias control circuit 110 may be adapted to update the gate bias voltage and the drain bias voltage in real time in accordance with updated optimized bias control signals while maintaining loop stability and preventing oscillatory behavior.
[0053] The bias control circuit 110 may be, but not limited to, digital-to-analog conversion circuitry, programmable voltage regulators, low-dropout regulators, operational amplifier-based bias generation stages, current limiting circuits, filtering networks, radio frequency chokes, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the bias control circuit 110, including known, related art, and/or later developed technologies.
[0054] In an embodiment of the present invention, the digitally tuneable harmonic network 112 may be configured to modify impedance at harmonic frequencies including the second harmonic component and the third harmonic component. In an embodiment of the present invention, harmonic impedance tuning characteristics of the digitally tuneable harmonic network 112 and associated impedance transformation structures may be verified using electromagnetic co-simulation and circuit-level simulation techniques to account for parasitic inductance, capacitance, and distributed transmission effects. In an embodiment of the present invention, such validation may ensure stable harmonic impedance realization across the frequency range extending from 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz).
[0055] In an embodiment of the present invention, the digitally tuneable harmonic network 112 may comprise a varactor diode and a digitally controlled capacitor. In an embodiment of the present invention, the digitally tuneable harmonic network 112 may be configured to provide continuous frequency tuning within a range of 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz). In an embodiment of the present invention, the digitally tuneable harmonic network 112 may comprise tunable reactive elements including varactor diodes, digitally controlled capacitors, switched capacitor banks, tunable inductive elements, or microelectromechanical system-based reactive components adapted to vary effective impedance at selected harmonic frequencies.
[0056] In an embodiment of the present invention, the digitally tuneable harmonic network 112 may be adapted to present a high impedance condition at the fundamental frequency while presenting controlled short-circuit or open-circuit impedance conditions at the second harmonic component and the third harmonic component to shape drain voltage and drain current waveforms. In an embodiment of the present invention, the digitally tuneable harmonic network 112 may be adapted to adjust harmonic impedance values in response to digital control signals corresponding to operating frequency, load variation, and temperature conditions.
[0057] In an embodiment of the present invention, impedance tuning may be achieved through bias-controlled capacitance variation in varactor elements or through digitally selectable reactive branches configured to alter resonant characteristics of the output network. In an embodiment of the present invention, the digitally tuneable harmonic network 112 may be adapted to operate across a continuous frequency range extending from 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz) without requiring discrete band-specific hardware replacement. In an embodiment of the present invention, isolation structures, microstrip transmission lines, and impedance matching sections may be incorporated to minimize parasitic effects and maintain stable harmonic impedance transformation under dynamic tuning conditions.
[0058] In an embodiment of the present invention, the digitally tuneable harmonic network 112 may further be adapted to cooperate with an output impedance transformation structure electrically coupled to a drain terminal of the active amplification device 104. In an embodiment of the present invention, the output impedance transformation structure may comprise microstrip sections and resonant reactive elements configured to transform a load impedance to an optimal drain impedance at a fundamental frequency while simultaneously shaping impedance at the second harmonic component and the third harmonic component to approximate Class-F conditions across multiple frequency bands.
[0059] The digitally tuneable harmonic network 112 may be, but not limited to, varactor diodes, digitally controlled capacitors, switched capacitor banks, tunable inductive elements, microelectromechanical system-based reactive components, impedance transformation networks, resonant stubs, microstrip transmission lines, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the digitally tuneable harmonic network 112, including known, related art, and/or later developed technologies.
[0060] In an embodiment of the present invention, the feedback loop 114 may be configured to monitor amplifier efficiency and thermal conditions and to enable real-time modification of the gate bias voltage, the drain bias voltage, and harmonic impedance parameters to maintain a target efficiency across multiple frequency bands. In an embodiment of the present invention, the real-time modification of the gate bias voltage, the drain bias voltage, and the harmonic impedance parameters reduces power dissipation and improves linearity under varying load conditions. In an embodiment of the present invention, the target efficiency may comprise a power-added efficiency greater than 75 percent across different operating bands. In an embodiment of the present invention, the feedback loop 114 may be configured to compensate for frequency shift, load mismatch, and temperature variation during operation.
[0061] In an embodiment of the present invention, the feedback loop 114 may be configured to monitor amplifier efficiency and thermal conditions by receiving sensed drain voltage, drain current, and temperature signals. The feedback loop 114 may be adapted to compute instantaneous power-added efficiency using measured direct current input power and radio frequency output power parameters. In an embodiment of the present invention, the feedback loop 114 may be adapted to compare computed efficiency values with a predefined target efficiency. The feedback loop 114 may be adapted to generate an error signal corresponding to deviation from the predefined target efficiency.
[0062] In an embodiment of the present invention, the feedback loop 114 may be configured to provide corrective control commands to adjust the gate bias voltage, the drain bias voltage, and the harmonic impedance parameters in real time to restore operation toward the predefined target efficiency across multiple frequency bands. In an embodiment of the present invention, update rate, sampling interval, and loop gain may be selected to maintain closed-loop stability and prevent oscillatory behavior during dynamic bias and harmonic adaptation. In an embodiment of the present invention, the feedback loop 114 may further be adapted to initiate operational mode transition between Class-F and Class-J characteristics under thermal stress conditions to preserve efficiency and stability.
[0063] The feedback loop 114 may be, but not limited to, closed-loop control systems, proportional control circuits, proportional-integral-derivative control systems, adaptive control algorithms, digital feedback architectures, efficiency computation modules, and so forth. Embodiments of the present invention are intended to include or otherwise cover any type of the feedback loop 114, including known, related art, and/or later developed technologies.
[0064] FIG. 1B illustrates a circuit diagram of the system 100 for the power amplifier 102, according to an embodiment of the present invention. In an exemplary embodiment of the present invention, the system 100 may comprise the active amplification device 104, the sensing unit 106, the control unit 108, the bias control circuit 110, the digitally tuneable harmonic network 112, and the feedback loop 114 operatively integrated within a coordinated control architecture. The active amplification device 104 may be adapted to amplify a radio frequency signal under controlled bias and harmonic conditions. The sensing unit 106 may be adapted to acquire the operational parameters representative of electrical and thermal conditions of the active amplification device 104 and may provide conditioned signals corresponding to instantaneous operating states.
[0065] The control unit 108 may be adapted to process the operational parameters using the trained predictive model. The control unit 108 may be adapted to generate optimized bias control signals corresponding to frequency, load, and temperature variations. The bias control circuit 110 may be adapted to convert the optimized bias control signals into regulated gate bias voltage and drain bias voltage supplied to the active amplification device 104 to control conduction characteristics and output power behavior. The digitally tuneable harmonic network 112 may be adapted to modify impedance at harmonic frequencies to maintain waveform shaping conditions across multiple operating bands.
[0066] The feedback loop 114 may be adapted to evaluate amplifier efficiency relative to a predefined target efficiency. The feedback loop 114 may provide corrective updates to the control unit 108 to enable real-time modification of the gate bias voltage, the drain bias voltage, and the harmonic impedance parameters. Coordinated interaction among the active amplification device 104, the sensing unit 106, the control unit 108, the bias control circuit 110, the digitally tuneable harmonic network 112, and the feedback loop 114 may enable adaptive, stable, and high-efficiency multi-band operation. In an embodiment of the present invention, coordinated adaptive bias regulation and harmonic impedance control may enable power-added efficiency approaching 83 percent within a frequency range extending from 1.8 Gigahertz (GHz) to 3.8 Gigahertz (GHz). In an embodiment of the present invention, dynamic gain variation may be maintained within ±0.5 decibels (dB) under varying temperature conditions.
[0067] FIG. 2 depicts a flowchart of a method 200 for adaptive bias and harmonic control in the power amplifier 102 using the system 100, according to an embodiment of the present invention.
[0068] At step 202, the system 100 may receive the operational parameters comprising the input power level, the operating frequency, the drain voltage, the drain current, the device temperature, and so forth.
[0069] At step 204, the system 100 may generate the optimized bias control signal based on the received operational parameters using the trained predictive model.
[0070] At step 206, the system 100 may adjust the gate bias voltage and the drain bias voltage of the active amplification device 104 in response to the optimized bias control signal.
[0071] At step 208, the system 100 may configure the digitally tuneable harmonic network 112 to modify impedance at the harmonic frequencies including the second harmonic component and the third harmonic component.
[0072] At step 210, the system 100 may monitor the amplifier efficiency and the thermal conditions through the feedback loop 114.
[0073] At step 212, the system 100 may modify the gate bias voltage and the harmonic impedance parameters in real time to maintain the target efficiency across the frequency bands.
[0074] While the invention has been described in connection with what is presently considered to be the most practical and various embodiments, it is to be understood that the invention is not to be limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims.
[0075] This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to practice the invention, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the invention is defined in the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements within substantial differences from the literal languages of the claims. , Claims:CLAIMS
I/We Claim:
1. An adaptive bias and harmonic control system (100) for a reconfigurable multi-band Class-F power amplifier (102), characterized in that the system (100) comprising:
an active amplification device (104);
a sensing unit (106) adapted to receive operational parameters selected from an input power level, an operating frequency, a drain voltage, a drain current, a device temperature, or a combination thereof;
a control unit (108), operatively coupled to the sensing unit (106), configured to generate an optimized bias control signal based on the received operational parameters using a trained predictive model;
a bias control circuit (110) configured to adjust a gate bias voltage and a drain bias voltage of the active amplification device (104) in response to the optimized bias control signal;
a digitally tuneable harmonic network (112) configured to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component; and
a feedback loop (114) configured to monitor amplifier efficiency and thermal conditions and to enable real-time modification of the gate bias voltage, the drain bias voltage, and harmonic impedance parameters to maintain a target efficiency across multiple frequency bands.
2. The system (100) as claimed in claim 1, wherein the trained predictive model comprises a machine learning model trained offline using historical efficiency and bias datasets.
3. The system (100) as claimed in claim 1, wherein the digitally tuneable harmonic network (112) comprises a varactor diode and a digitally controlled capacitor.
4. The system (100) as claimed in claim 1, wherein the active amplification device (104) comprises a gallium nitride high electron mobility transistor.
5. The system (100) as claimed in claim 1, wherein the digitally tuneable harmonic network (112) is configured to provide continuous frequency tuning within a range of 1.8 Gigahertz (GHz) to 6 Gigahertz (GHz).
6. The system (100) as claimed in claim 1 wherein the sensing unit (106) comprises a voltage sensor, a current sensor, and a temperature sensor positioned at or near a drain node of the active amplification device (104).
7. The system (100) as claimed in claim 1, wherein the feedback loop (114) is configured to compensate for frequency shift, load mismatch, and temperature variation during operation.
8. The system (100) as claimed in claim 1, wherein the real-time modification of the gate bias voltage, the drain bias voltage, and the harmonic impedance parameters reduces power dissipation and improves linearity under varying load conditions.
9. The system (100) as claimed in claim 1, wherein the target efficiency comprises a power-added efficiency greater than 75 percent across different operating bands.
10. A method (200) for adaptive bias and harmonic control in a reconfigurable multi-band Class-F power amplifier (102), the method (200) is characterized by steps of:
receiving, by a sensing unit (106), operational parameters comprising an input power level, an operating frequency, a drain voltage, a drain current, and a device temperature;
generating, by a control unit (108), an optimized bias control signal based on the received operational parameters using a trained predictive model;
adjusting a gate bias voltage and a drain bias voltage of an active amplification device (104) in response to the optimized bias control signal;
configuring a digitally tuneable harmonic network (112) to modify impedance at harmonic frequencies including a second harmonic component and a third harmonic component;
monitoring amplifier efficiency and thermal conditions through a feedback loop (114); and
modifying, by the control unit (108), the gate bias voltage and harmonic impedance parameters in real time to maintain a target efficiency across frequency bands.
Date: March 09, 2026
Place: Noida

Nainsi Rastogi
Patent Agent (IN/PA-2372)
Agent for the Applicant

Documents

Application Documents

# Name Date
1 202641030156-STATEMENT OF UNDERTAKING (FORM 3) [13-03-2026(online)].pdf 2026-03-13
2 202641030156-POWER OF AUTHORITY [13-03-2026(online)].pdf 2026-03-13
3 202641030156-OTHERS [13-03-2026(online)].pdf 2026-03-13
4 202641030156-FORM-9 [13-03-2026(online)].pdf 2026-03-13
5 202641030156-FORM FOR SMALL ENTITY(FORM-28) [13-03-2026(online)].pdf 2026-03-13
6 202641030156-FORM 1 [13-03-2026(online)].pdf 2026-03-13
7 202641030156-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [13-03-2026(online)].pdf 2026-03-13
8 202641030156-EDUCATIONAL INSTITUTION(S) [13-03-2026(online)].pdf 2026-03-13
9 202641030156-DRAWINGS [13-03-2026(online)].pdf 2026-03-13
10 202641030156-DECLARATION OF INVENTORSHIP (FORM 5) [13-03-2026(online)].pdf 2026-03-13
11 202641030156-COMPLETE SPECIFICATION [13-03-2026(online)].pdf 2026-03-13
12 202641030156-PATENT_APPLICATION_PUBLICATION.pdf 2026-04-06