Claims:WE CLAIM:
1. A commutation system (10) for a brushless direct current (BLDC) motor (30) comprising:
a signal filtering circuit (15) configured to modify at least three line voltage signals (20) of the BLDC motor (30) by removing PWM noise from the at least three line voltage signals (20) to generate at least three noise free line voltage signals (40);
a phase compensation circuit (50) configured to:
correct phase of the at least three noise free line voltage signals (40) to generate at least three phase corrected line voltage signals (60) for compensating a phase-delay caused by the signal filtering circuit, by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor (30) using a microcontroller; and
obtain at least three artificial hall signals (70), in phase with the corresponding at least three-line voltage signals (60); and
provide the at least three artificial hall signals (70) to a controller to operate a motor.
2. The system (10) as claimed in claim 1, wherein the phase compensation circuit (50) is configured to generate an in-phase signal or a 180 degree out-phase signal with respect to the line voltage signal, by correcting the phase of the at least three noise free line voltage signals (40).
3. The system (10) as claimed in claim 1, wherein the phase compensation circuit (50) is configured to compensate the phase delay caused by the signal filtering circuit, by dynamically changing the digital resistor value according to the motor speed (in real time) through one or more mathematical models programmed into the microcontroller.
4. The system (10) as claimed in claim 1, wherein the phase compensation circuit (50) is configured to convert the at least three phase corrected line voltage signals (60) into a square pulse hall signal by using a comparator.
5. The system (10) as claimed in claim 1, wherein the commutation controller (80) comprises a 120-degree commutation logic having a pulse width modulation (PWM) control.
6. The system (10) as claimed in claim 1, wherein the 120° commutation controller (80) is configured to operate the BLDC motor (30) by creating a predefined sequence of the at least three artificial hall signals (70) and a PWM duty ratio/frequency signal from the microcontroller when the BLDC motor (30) is at an initial operating speed.
7. A method (100) to operate a commutation system for a brushless direct current (BLDC) motor comprising:
modifying, by a signal filtering circuit, at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals to generate at least three noise free line voltage signals; (110)
correcting, by a phase compensation circuit, phase of the at least three noise free line voltage signals to generate at least three phase corrected line voltage signals for compensating a phase-delay caused by the signal filtering circuit, by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor using a microcontroller; (120)
obtaining, by the phase compensation circuit, at least three artificial hall signals in phase with the corresponding at least three-line voltage signals; (130) and
controlling, by a 120° commutation controller, speed of the BLDC motor via a MOSFET driver based on the at least three artificial hall signals generated by the phase compensation circuit. (140)
8. The method (100) as claimed in claim 7, wherein correcting the phase comprises compensating the phase delay by dynamically changing the digital resistor value through one or more mathematical models programmed into the microcontroller.
9. The method (100) as claimed in claim 7, comprising operating the BLDC motor by creating a predefined sequence of the at least three artificial hall signals and a PWM duty ratio/frequency signal from the microcontroller when the BLDC motor is at an initial operating speed.

Dated this 07th day of August 2020

Signature

Vidya Bhaskar Singh Nandiyal
Patent Agent (IN/PA-2912)
Agent for the Applicant
, Description:BACKGROUND
[0001] Embodiments of the present disclosure relate to brushless direct current motor and more particularly to a commutation system for a brushless direct current motor and a method to operate the same.
[0002] In the recent decades, the use of BLDC motor for the industrial purpose and other low and medium power applications have been raised up very rapidly in comparison to other conventional DC motors. The control of the BLDC motor is easier, but it requires three hall position sensors to detect the rotor position. The BLDC motor has a very impeccable feature in its design that eliminates the wear and tear which occurred due to the carbon brush contact with the commutator in the conventional DC motors. Conventional commercial brushless DC motors use hall-effect (magnetically operated) sensors. The Hall-effect sensors sense the rotor position and provide a signal to an inverter to commutate to the next phase in sequence when the rotor magnet axis reaches a predetermined position. In this way the motor windings are energized so as to maximize the amount of torque output for the motor at any given speed. However, the Hall-effect sensors are structures that limit the motor in a number of different ways.
[0003] Hall-effect sensors are typically large compared to solid state circuitry components, and for smaller motors there is a problem in finding enough room to properly mount the sensors. However, even assuming that the sensors are already provided in a pre-existing motor, since the maximum operating temperature of the sensors is about 150° C, brushless DC motors utilizing these sensors are not suitable for operating temperatures above isolation class. Also, Hall-effect sensors, due to their complexity, temperature limitation, and other reasons, are responsible for reducing the reliability of brushless DC motors.
[0004] The use of hall sensors for detecting the rotor position is not a very convenient and feasible method. This method required a mechanical mounting of the sensors and extra wiring between the motor and control unit that caused the system to easily interfere and malfunctioning in the commutation. Also, under certain conditions, such as high temperature, pressure or humidity, and so on, the position sensors work with the poor sensitivity and reduce the system reliability which is not accepted in the harsh environments. The use of these sensors also has other numerous drawbacks such as the increase in the cost of the system, mountings, and complexity in control of the motors.
[0005] There have been a number of proposals in the past for making sensor-less (that is no Hall-effect sensors) brushless DC motors by using the back emf signal and operating it in a particular way. However, none of such method address the problem of existing motors. That is there are tens of thousands of existing brushless DC speed regulating motor drives with Hall sensors which are operating in a limited capacity, and with less maintainability or reliability which are not cost effective to replace.
[0006] Hence there is a need for an improved system for sensor-less BLDC motors to address the aforementioned issue(s).
BRIEF DESCRIPTION
[0007] In accordance with an embodiment of the present disclosure, a commutation system for a brushless direct current motor (BLDC) motor is provided. The system includes a signal filtering circuit configured to modify at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals to generate at least three noise free line voltage signals. The system also includes a phase compensation circuit configured to correct phase of the at least three noise free line voltage signals to generate at least three phase corrected line voltage signals for compensating a phase-delay caused by the signal filtering circuit, by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor using a microcontroller. The phase compensation circuit is also configured to obtain at least three artificial hall signals from the at least three phase corrected line voltage signals, in phase with the corresponding at least three-line voltage signals (input). The system further includes a 120° commutation controller configured to control speed/frequency of the BLDC motor via a MOSFET driver based on the at least three artificial hall signals generated by the phase compensation circuit.
[0008] In accordance with an embodiment of the present disclosure, a method to operate commutation system for a brushless direct current motor (BLDC) motor is provided. The method includes modifying, by a signal filtering circuit, at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals to generate at least three noise free line voltage signals. The method also includes correcting, by a phase compensation circuit, phase of the at least three noise free line voltage signals to generate at least three phase corrected line voltage signals for compensating a phase-delay caused by the signal filtering circuit, by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor using a microcontroller. The method further includes obtaining, by the phase compensation circuit, at least three artificial hall signals from the at least three phase corrected line voltage signals, in phase with the corresponding at least three-line voltage signals. The method further includes controlling, by a 120° commutation controller, speed/frequency of the BLDC motor via a MOSFET driver based on the at least three hall artificial signals generated by the phase compensation circuit.
[0009] To further clarify the advantages and features of the present disclosure, a more particular description of the disclosure will follow by reference to specific embodiments thereof, which are illustrated in the appended figures. It is to be appreciated that these figures depict only typical embodiments of the disclosure and are therefore not to be considered limiting in scope. The disclosure will be described and explained with additional specificity and detail with the appended figures.
BRIEF DESCRIPTION OF THE DRAWINGS
The disclosure will be described and explained with additional specificity and detail with the accompanying figures in which:
[0010] FIG. 1 is a block diagram representation of a commutation system for a brushless direct current motor in accordance with an embodiment of the present disclosure;
[0011] FIG. 2 is a schematic representation of one embodiment of the system of FIG. 1, depicting exemplary signal filtering circuit in accordance with an embodiment of the present disclosure;
[0012] FIG. 3 is a schematic representation of another embodiment of the system of FIG. 1, depicting exemplary phase compensation circuit in accordance with an embodiment of the present disclosure; and
[0013] FIG. 4 is a flow chart representing the steps involved in a method to operate commutation system for brushless direct current motor in accordance with an embodiment of the present disclosure.
[0014] Further, those skilled in the art will appreciate that elements in the figures are illustrated for simplicity and may not have necessarily been drawn to scale. Furthermore, in terms of the construction of the device, one or more components of the device may have been represented in the figures by conventional symbols, and the figures may show only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the figures with details that will be readily apparent to those skilled in the art having the benefit of the description herein.
DETAILED DESCRIPTION
[0015] For the purpose of promoting an understanding of the principles of the disclosure, reference will now be made to the embodiment illustrated in the figures and specific language will be used to describe them. It will nevertheless be understood that no limitation of the scope of the disclosure is thereby intended. Such alterations and further modifications in the illustrated system, and such further applications of the principles of the disclosure as would normally occur to those skilled in the art are to be construed as being within the scope of the present disclosure.
[0016] The terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process or method that comprises a list of steps does not include only those steps but may include other steps not expressly listed or inherent to such a process or method. Similarly, one or more devices or sub-systems or elements or structures or components preceded by "comprises... a" does not, without more constraints, preclude the existence of other devices, sub-systems, elements, structures, components, additional devices, additional sub-systems, additional elements, additional structures or additional components. Appearances of the phrase "in an embodiment", "in another embodiment" and similar language throughout this specification may, but not necessarily do, all refer to the same embodiment.
[0017] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. The system, methods, and examples provided herein are only illustrative and not intended to be limiting.
[0018] In the following specification and the claims, reference will be made to a number of terms, which shall be defined to have the following meanings. The singular forms “a”, “an”, and “the” include plural references unless the context clearly dictates otherwise.
[0019] Embodiments of the present disclosure relate to a sensorless 120° commutation system for a brushless direct current (BLDC) motor. The system includes a signal filtering circuit configured to modify at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals to generate at least three noise free line voltage signals. The system also includes a phase compensation circuit configured to correct phase delay of the at least three noise free line voltage signals caused by the signal filtering circuit, to generate at least three phase corrected line voltage signals ,by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor using a microcontroller. The phase compensation circuit is also configured to obtain at least three artificial hall signals from the at least three phase corrected line voltage signals, in phase with the corresponding at least three-line voltage signals. The system further includes a 120° commutation controller configured to control speed/frequency of the BLDC motor via a MOSFET driver based on the at least three artificial hall signals generated by the phase compensation circuit.
[0020] FIG. 1 is a block diagram representation of a sensorless 120° commutation system (10) for a brushless direct current (BLDC) motor in accordance with an embodiment of the present disclosure. The system (10) includes a signal filtering circuit (15) which receives at least three-line voltage signals (20) from a three phase BLDC motor. The at least three-line voltage signals (20) are chosen as inputs because they are always in phase with hall signal. Further, the signal filtering circuit removes PWM noise from the at least three line voltage signals (20) and modifies the at least three line voltage signals (20) of the BLDC motor (30) to generate at least three noise free line voltage signals (40). Specifically, when the BLDC motor (30) is in running condition, the at least three line voltage signals (20) are chopped with a high frequency pulse width modulation (PWM) pulse which introduces a pulsating waveform of the corresponding at least three line voltage signals (20) which upon comparing with the ground voltage using a comparator generates a square wave having the PWM high frequency pulse within it. Such PWM noise should be removed from the at least three-line voltage signals (20) in order to generate a square wave (hall signal) corresponding to the at least three-line voltage signals (20) by using a comparator. One embodiment of such signals filtering circuit is explained in detail in FIG. 2.
[0021] FIG. 2 is a schematic representation of one embodiment of the system (10) of FIG. 1, depicting exemplary signal filtering circuit (15) in accordance with an embodiment of the present disclosure. The filter used in the signal filtering circuit (15) is a low pass filter (45) which allows the low frequency line voltage signal to pass through but cuts off the high frequency PWM noise. As shown in an non limiting exemplary active low pass filter (45), for large value of R2 the active low pass filter circuit produces a phase lag of 90 degree between the at least three noise free line voltage signals (40) and the at least three line voltage signals (20) used as input. The values of R1 and C1 are so chosen that the cut off frequency is set to maximum frequency of the at least three-line voltage signals (20). Also, R1 and C1 are so chosen that the output signal is as close to the fundamental sinusoidal component of the input at least three-line voltage signals (20). Now, the at least three noise free line voltage signals (40) are lagging the at least three-line voltage signals (20) close to 90 degrees (in practice the lag is variable due to R2).
[0022] Since, the at least three noise free line voltage signals (40) are lagging the at least three-line voltage signals used as the input, such noise free line voltage signal (40) might not be used to generate square wave hall signal. Any signal filtering circuit may cause lag in the at least three noise free line voltage signals (40) due to which the hall signal may lag from the required phase of hall signal for proper 120-degree commutation. In another embodiment, the signal filtering circuit (15) may include a combination of voltage subtractor circuit and the active low pass filter circuit (45).
[0023] Referring to FIG. 1, the system (10) also includes a phase compensation circuit (50) electrically coupled to the signal filtering circuit (15). The phase compensation circuit (50) corrects phase of the at least three noise free line voltage signals (40) to generate at least three phase corrected line voltage signals (60) for compensating a phase-delay caused by the signal filtering circuit. The phase delay is compensated by dynamically regulating a digital resistor value corresponding to speed of the BLDC motor (30) using a microcontroller. In one embodiment, the phase compensation circuit (50) may generate an in-phase signal or a 180 degree out-phase signal with respect to the corresponding at least three-line voltage signals (20). More Specifically, in case of 180 degree out-phase, an inverting circuit may be used to get back in phase with the at least three-line voltage signals (20). Further, the phase compensation circuit (50) obtains at least three artificial hall signals (70) from the at least three phase corrected line voltage signals, in phase with the corresponding at least three-line voltage signals (60). One embodiment of the phase compensation circuit (50) is described in detail in FIG. 3.
[0024] FIG. 3 is a schematic representation of another embodiment of the system (10) of FIG. 1, depicting exemplary phase compensation circuit (50) in accordance with an embodiment of the present disclosure. As shown in a non-limiting exemplary phase compensation circuit (50), an input for the circuit are the at least three noise free line voltage signals (40) (Fs) which produces the at least three phase corrected line voltage signals (60) (Po). The phase relation between the at least three phase corrected line voltage signals (60) and the at least three noise free line voltage signals (40) is such that the at least three phase corrected line voltage signals (60) lags the at least three noise free line voltage signals (40) by
-2tan-1 (? RoC)
[0025] where ? is the frequency of the corresponding at least three noise free line voltage signals (40) which is same as the line voltage frequency which is also same as hall signal frequency. The frequency corresponding to the hall signal is a function of speed of the BLDC motor (30).
[0026] The digital resistor Ro is the control parameter which is a variable digital resistor. C is the capacitor which may be suitably chosen for phase correction. By varying Ro from 0 to X where X is a very large value, the phase lag of the at least phase corrected line voltage signals (60) may be controlled. The range of the phase lag between Po and Fs is 0 degree (where Ro is zero) to almost 180 degree (where Ro is very high). Thus, by controlling the Ro value in real time, the phase of the Fs may be controlled and corrected to be 180 degree out of phase with respect to the corresponding at least three line voltage signals (20) from which it is derived.
[0027] Once, Po is in phase or 180° out of phase with the corresponding at least three-line voltage signals (20), the comparator circuit compares Po to the ground signal to generate a square wave required to obtain a hall signal. In case of Po being 180° out of phase, an inverter circuit might be necessary to bring it back in phase with the line voltage signal. Such square wave output from the comparator is considered as hall signal for one phase. Similarly, the aforementioned processes are replicated for other two-line voltages in order to generate corresponding hall signal.
[0028] In one embodiment, the phase compensation circuit (50) may compensate the phase delay by dynamically changing the digital resistor value through one or more mathematical models programmed into the microcontroller. In detail, a digital potentiometer may be used for Ro in order to control the resistance via a microcontroller. Such digital potentiometer changes corresponding resistance based on the value given by the microcontroller. Since, the phase correction is a function of ? (Frequency of line voltage, also same as motor frequency), the micro controller needs to measure the BLDC motor (30) speed/frequency and through the one or more mathematical models, the micro controller may dynamically change Ro value via the digital potentiometer in order to correct the phase of the filtered signal Fs to obtain Po which is 180 degree out of phase.
[0029] Even though Fs lags line voltage by almost 90 degrees, Po phase may vary as a mathematical function, the below equation may be used to correct the phase to get Po which is 180 degree out of phase with respect to the line voltage:
POphase = -2tan-1 (? RoC)
In one embodiment, the motor speed and frequency are related by the below defined formula:
Speed (RPM) = 120*frequency/ (no of poles)
So as seen above measuring speed of the motor directly gives information about the frequency as both are related. Hence it is enough to measure either speed or frequency, measuring both is redundant.
[0030] The one or more mathematical models may be used to obtain speed/frequency versus Ro value which can be obtained by running the BLDC motor (30) with hall sensors and observing the waveform of line voltage and the phase corrected line voltage. For every speed/ frequency, a value of Ro for which Po is 180 degree out of phase may be generated. By performing such process for entire speed/frequency range of the BLDC motor (30), a data table of speed/frequency versus Ro is obtained. From the data table, an interpolating equation (may be an nth order polynomial) may be generated which takes in speed/frequency as input and provides Ro values for exact phase correction as output. The interpolating equation may be fed to the microcontroller which reads the motor (30) speed/frequency and from the equation provides Ro value to the digital potentiometer to obtain 180-degree phase corrected Po signal.
[0031] Referring back to FIG. 1, the system (10) further includes a 120° commutation controller (80) which is electrically coupled to the phase compensation circuit (50). The 120° commutation controller (80) controls speed of the BLDC motor (30) via a MOSFET driver (90) based on the at least three artificial hall signals (70) generated by the phase compensation circuit (50). In one embodiment, the commutation controller (80) includes a 120-degree commutation logic having a pulse width modulation (PWM) control. The at least three artificial hall signals (70) are provided as an input to the 120° commutation controller (80) to run the BLDC motor (30) without any hall sensors. In a specific embodiment, the at least three artificial hall signals (70) is used to generate 6-step pulses which is fed to the MOSFET driver (90) to run the BLDC motor (30). In such an embodiment, the MOSFET driver (90) may be a 3 phase H-bridge MOSFET driver. As used herein, the H-bridge circuit contains at least six switching elements.
[0032] In one embodiment, the 120° commutation controller (80) may operate the BLDC motor (30) by creating a predefined sequence of the at least three artificial hall signals (70) and a variable PWM duty ratio/frequency signal from the microcontroller when the BLDC motor (30) is at an initial operating speed. More Specifically, during starting and very low speed operation of the motor (30), a suitable sequence of hall signals (70) and PWM duty ratio/frequency of controller (80) is used to run the motor (30). In such region of operation (when motor is operating at extremely low speed), analysing the at least three-line voltage signals (20) is very difficult (because the voltage is proportional to speed of the motor). Once a critical speed is reached where the voltage levels are measurable and analysed, the sensor-less operation takes over and produces its own hall signal (70) to run the motor (30) via the 120° commutation controller (80).
[0033] FIG. 4 is a flow chart representing the steps involved in a method (100) to operate sensorless 120° commutation system for brushless direct current motor in accordance with an embodiment of the present disclosure. The method (100) includes modifying at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals to generate at least three noise free line voltage signals in step 110. In one embodiment, modifying at least three-line voltage signals of the BLDC motor by removing PWM noise from the at least three-line voltage signals is done by a signal filtering circuit.
[0034] Furthermore, the method (100) includes correcting phase of the at least three noise free line voltage signals to generate at least three phase corrected line voltage signals for compensating a phase-delay caused by the signal filtering circuit, by dynamically regulating a digital resistor value corresponding to speed/frequency of the BLDC motor using a microcontroller in step 120. In one embodiment, correcting phase of the at least three noise free line voltage signals is done by a phase compensation circuit. In a specific embodiment, generating an in-phase signal or a 180 degree out-phase signal to correct the phase of the at least three noise free line voltage signals is done by the phase compensation circuit. In such an embodiment, converting the at least three phase corrected line voltage signals into a square pulse (hall signal) by the phase compensation circuit by using a comparator. In some embodiments, compensating the phase delay may include compensating the phase delay by dynamically changing the digital resistor value through one or more mathematical models programmed into the microcontroller by the phase compensation circuit.
[0035] Consequently, the method (100) includes obtaining at least three artificial hall signals from the at least three phase corrected line voltage signals, in phase with the corresponding at least three-line voltage signals (input). In one embodiment, obtaining at least three artificial hall signals in phase with the corresponding at least three-line voltage signals is done by the phase compensation circuit in step 130. The method (100) further includes controlling speed of the BLDC motor via a MOSFET driver based on the at least three artificial hall signals generated by the phase compensation circuit in step 140. In one embodiment, controlling speed of the BLDC motor is done by a 120° commutation controller. In such an embodiment, the controller may include a pulse width modulation (PWM) control. In a specific embodiment, the method (100) may include operating the BLDC motor by creating a predefined sequence of the at least three artificial hall signals and a PWM duty ratio/frequency signal from the microcontroller when the BLDC motor is at an initial operating speed.
[0036] Various embodiments of the commutation system for BLDC motor as described above enables a cost-effective and simple alternative for sensor-less 120° commutation. The speed range of the system is vast and may operate up to very low speeds of the motor if proper signal processing is done. The system is very robust and works flawlessly in real time. The system requires less computing power for sensor-less operation.
[0037] Moreover, the system has dynamic and instantaneous response for change in motor behaviour because of the analog nature of the system. The phase compensation circuit coupled with the microcontroller involves mathematical equations and models to dynamically vary the resistance according to the motor speed/ frequency and in turn correct the phase of the noise free line voltage signal.
[0038] In addition, the system does not involve direct use of phase voltages, creating virtual neutral points, phase delay using inherent microcontroller, timers/counters, sensing and temporarily storing the sensed voltage, current, speed, perform complex calculations or the like as compared to conventional sensor-less techniques. The system is applicable for variety of applications such as regular electric vehicles, aerial vehicle such drones or the like.
[0039] It will be understood by those skilled in the art that the foregoing general description and the following detailed description are exemplary and explanatory of the disclosure and are not intended to be restrictive thereof.
[0040] While specific language has been used to describe the disclosure, any limitations arising on account of the same are not intended. As would be apparent to a person skilled in the art, various working modifications may be made to the method in order to implement the inventive concept as taught herein.
[0041] The figures and the foregoing description give examples of embodiments. Those skilled in the art will appreciate that one or more of the described elements may well be combined into a single functional element. Alternatively, certain elements may be split into multiple functional elements. Elements from one embodiment may be added to another embodiment. For example, the order of processes described herein may be changed and are not limited to the manner described herein. Moreover, the actions of any flow diagram need not be implemented in the order shown; nor do all of the acts need to be necessarily performed. Also, those acts that are not dependent on other acts may be performed in parallel with the other acts. The scope of embodiments is by no means limited by these specific examples.