FORM 2
THE PATENT ACT 1970
(39 OF 1970)
&
The Patent Rules, 2003
COMPLETE SPECIFICATION
(See Section 10 and Rule 13)
1 TITLE OF THE INVENTION :
A CONTROL SYSTEM TO MINIMIZE THE DYNAMIC POWER LOSS IN AN
UNBALANCED VOLTAGE REGULATOR MODULE AND ITS METHOD OF
OPERATION.
2 APPLICANT (S)
Name : INDIAN INSTITUTE OF TECHNOLOGY, KHARAGPUR.
Nationality : An Indian Statutory Body.
Address : Sponsored Research & Industrial Consultancy,
Kharagpur-721302, West Bengal, India,
3 PREAMBLE TO THE DESCRIPTION
COMPLETE
The following specification particularly describes the invention and the manner in which it is to
be performed.

FIELD OF THE INVENTION
The present invention relates to a system of switching power converter adapted to increasing
efficiency, fast transient response and improved power density of a voltage regulator module
(VRM) for output load demand such as in a microprocessor. More particularly, the present
invention is directed to developing a control scheme to minimize the dynamic power loss in
an unbalanced voltage regulator module and a method of its operation. The function of the
voltage regulator module (VRM) is to maintain tight voltage regulation on the output voltage
within specified limits, particularly during the transient high slew-rate load transients.
Normally, high switching frequency operation offers fast transient response. However, it
results in higher switching loss, hence there exist a tradeoff between the fast transient
response and high efficiency. The present invention adapted power architecture of
unbalanced voltage regulator module to address the issue. The control system for the
switching converter according to the present invention is directed to improve the dynamic
performance. The control scheme according to the present invention is also aimed to improve
the energy efficiency of the VRM by minimizing the power loss in the extra dynamic channel.
Importantly, the invention is directed to solving the problem of slow dynamic response in
voltage regulator module (VRM) and involves less number of passive filter capacitors at the
output of the VRM and also adapted to improve the energy efficiency vis-a-vis known
solutions. The system and method of the control scheme for the VRM according to the
invention is thus directed to wide industrial application meeting the output load transient
conditions for a number of applications including the mobile, microprocessors, semiconductor
industries etc by way of developing highly energy efficient monolithic controller IC for
controlling VRM and other like electronic devices.
BACKGROUND ART
The function of regulating the voltage level obtained from a DC input, a DC-DC buck or boost
converter is used to provide the desired voltage requirements for a number of electronic
devices such as the mobile phones, computers and the like electronic instruments. The
converters perform the voltage conversion to required level and maintain it within acceptable
limits with high efficiency. Switching power converter circuits often include one or more
switching elements, which alternatively couple and decouple a voltage source to a load

A still further aspect of the present invention is directed to a method wherein said additional
compensator is used to generate a compensated output of the auxiliary buck converter
current 'IA' during transients.
Importantly also in said method, the compensated output is summed to the actual current
reference to improve the performance of the main converter.
A still further aspect of the present invention is directed to said method adapted to settle the
output voltage more quickly and decreases the duration of auxiliary buck converter in
operation during transients such as to minimize the dynamic power loss in the auxiliary buck
converter.
Advantageously said method comprising reduced dynamic power loss and improving of the
energy efficiency of the unbalanced voltage regulator module.
The present invention and its objects and advantages are described in greater details with
reference to the following accompanying non- limiting exemplary figures.
BRIEF DESCRIPTION OF THE ACCOMPANYING FIGURES
Figure 1: is the schematic illustration of a DC-DC switching mode current injection topology
of conventional converter.
Figure 2: is the schematic illustration of an embodiment of the DC-DC converter incorporating
conventional linear and non-linear control scheme.
Figure 3: is the schematic illustration/block diagram of the system for controlling the voltage
regulator module (VRM) according to the present invention wherein a main buck converter
Full-Bridge Current Doubler Rectifier (FBCDR) and an auxiliary buck converter comprising a
main loop compensator, additional compensator and hysteretic constant turn-off controller.
Figure 4: is the schematic illustration of the hysteretic constant turn-off controller to control
the auxiliary buck converter.

Figure 5: is the graphical illustration of the operation waveforms of the hysteretic constant
turn-off controller according to the present invention.
Figure 6: is the graphical illustration of the switching waveforms comprising the main
converter current, auxiliary buck converter current, output voltage and the compensator
output highlighting the benefit of additional compensator on IA according to the present
invention to improve the performance of the main converter (31) during transient period.
Figure 7: illustrates the simulation results of the output voltage and current reference for a
load current step-down transient of 24 A with only full-bridge current doubler rectifier FBCDR
(main converter) in operation.
Figure 8: illustrates the experimental result of the output voltage for a load current step-
down transient of 24 A with only FBCDR in operation.
Figure 9: illustrates the simulation results of the output voltage, gate signal of buck converter
and current reference for a load current step-down transient of 24 A with both FBCDR and
auxiliary buck converter in operation but without lead-lag compensator (block 35 as shown in
Figure 3).
Figure 10: illustrates experimental result of the output voltage for a load current step-down
transient of 24 A with both FBCDR and auxiliary buck converter in operation but without lead-
lag compensator (block 35 in Figure 3).
Figure 11: illustrates experimental result of the output voltage and gate signal of buck
converter for a load current step-down transient of 24 A with both FBCDR and auxiliary buck
converter in operation but without lead-lag compensator (block 35 in Figure 3).
Figure 12: illustrates the simulation results of the output voltage, gate signal of buck
converter and current reference for a load current step-down transient of 24 A according to
the proposed solution by way of the present invention.

Figure 13: illustrates the experimental result of the output voltage for a load current step-
down transient of 24 A according to the proposed solution by way of the present invention
favoring improvement in transient response of the output voltage.
Figure 14: illustrates the experimental result of the output voltage and gate signal of buck
converter for a load current step-down transient of 24 A according to the proposed solution
by way of the present invention wherein the auxiliary buck converter's working interval is
minimized to reduce dynamic power loss.
Figure 15: Illustrates the experimental results involving Energy efficiency Vs load transient
frequency for various cases of operation with load step current of 24 A and 50% load duty
cycle, showing an improvement of 7% in energy efficiency with the proposed solution of the
present invention.
DETAILED DESCRIPTION OF THE INVENTION WITH REFERENCE TO THE
ACCOMPANYING FIGURES
The present invention relates to switching power converters and in particular, to methods,
systems apparatus and devices for increasing efficiency, transient response speed and power
density of a Voltage Regulator Module (VRM) for demanding loads such as microprocessors.
The function of the VRM is to maintain very precise regulation on the output voltage.
Typically a large number of capacitors are mounted close to the processor on the
motherboard, which occupies more board space and also increases cost. A feasible solution to
deal with such problem is to use an extra dynamic channel in parallel with the main switching
converter to provide the unbalanced currents at the converter output during load transients.
The extra dynamic channel handles the transient current and the main switching converter
handles the steady state current. The power loss in the extra dynamic channel should be
minimized as it affects the overall efficiency of the VRM. The loss is more when the frequency
of the load transient increases.
The primary objective of the present invention is directed to developing a system adapted to
improve the efficiency of the VRM by minimizing the power loss in the extra dynamic channel.
Two adaptable voltage references, namely VREF1 and VREF2, the upper and lower voltage
references respectively, are generated using the reference voltage and the load current. The

extra dynamic channel injects charge when the output voltage goes below VREF1 and absorbs
charge when the output voltage exceeds VREF2, to maintain the output voltage within the
specified deviation. An additional lead-lag compensator on the extra dynamic channel current
is incorporated and its output is summed to the actual current reference to improve the
performance of the main switching converter.
Thus the present invention is directed to a system for switching power converter adapted to
providing a control scheme to minimize the dynamic power loss in an unbalanced mode
Voltage Regulator Module (VRM) increasing efficiency, transient response speed and power
density of a voltage regulator module and its method of operation. The VRM is adapted to a
control scheme to minimize the power loss during load transients in the extra dynamic
channel.
The Voltage Regulator Module in a DC-DC switching power converter according to the
present invention comprising
a main converter for providing regulated output voltage in steady state condition;
an extra dynamic channel which is an auxiliary buck converter is activated in accordance with
the load transient;
a current sensor for sensing the output current 'IM' of the main converter;
a current sensor for sensing the output current 'IA' of the auxiliary buck converter; and
a control circuit to maintain the desired characteristics at the converter output.
Also in said control scheme based VRM system wherein the controller comprises a linear
control circuit and a non-linear control circuit, which chooses one or both of them in
accordance with the load transient. Moreover, in said linear circuit of the controller having a
feedback loop comprising the output voltage and the reference voltage along with the
compensator generates current reference to control the current supplied by the main
converter 'IM'.
On the other hand said non linear circuit of the controller further comprising a hysteretic
constant turn-off controller and an additional lead-lag compensator.

Thus in the control scheme of the VRM as of the invention, said hysteretic constant turn-off
controller of the non linear control circuit uses two adaptable voltage references VREF1 and
VREF2 to activate the auxiliary buck converter in accordance with the load transient associated
with a decrease/increase in the output voltage beyond the voltage references VREF1 and VREF2.
Importantly, the control scheme for the VRM is adapted to achieve reduced power loss and
increased efficiency wherein said adaptable voltage references VREF1 and VREF2 are obtained
from a fixed voltage reference and the sensed output current 'IM' of the main converter.
The VRM system of the invention comprising the hysteretic constant turn-off controller
wherein monoshot circuits are used to maintain constant turn-off period for the switches in
the auxiliary buck converter.
Advantageously also, in said control scheme of the unbalanced mode VRM, the additional
lead-lag compensator generates a compensated output of the auxiliary buck converter
current 'IA' during transients. The compensated output is summed to the actual current
reference to improve the performance and efficiency of the main converter.
The present invention also providing for a method for output voltage control in voltage
regulator module based DC-DC switching power converter wherein output voltage is settled
more quickly and decreases the duration of operation time of the auxiliary buck converter
during the load transients and thus reducing the dynamic power loss which in turn improves
the efficiency of the voltage regulator module as compared to the existing systems.
Reference is first invited to the accompanying Figure 1 that schematically illustrates the
existing DC-DC converter in prior art with current injection circuit including an isolated/non-
isolated converter (11) and a switching mode current injection topology (12) has been
developed. The non-linear control block (13) of the system used a constant frequency voltage
mode control. During the load transients, the switching mode current injection topology(12)
that supplies or absorbs current more quickly from the output which maintains the output
voltage VOUT close to the reference voltage VREF. As a result of this, the error seen by the
linear control loop (14) is small and therefore the change in the main filter inductor current is
slow. The output voltage VOUT thus takes longer time to settle even if it is within the threshold

band. This slow response in turn increases the duration of switching mode current injection
topology (12) in operation which causes additional power loss.
Reference is now invited to the accompanying Figure 2 that schematically illustrates the fast
response double buck converter (FRDB) existing in the prior art consisting of a main buck
converter (21) and an auxiliary buck converter (22). During load transients, the threshold
logic (24) saturates the duty cycle (25) for the auxiliary buck converter (22) and also for the
main buck converter (21). The linear control block and the MUX together form a non linear
controller 23 for the main buck converter (21). As in this system, two converters with
unequal output impedances are operating in parallel during transients, the auxiliary buck
converter (22), which has low output impedance, supplies much of the load current. There is
no control on the amount of current injected/absorbed by the auxiliary buck converter (22).
Moreover, the controller responds in the same way for any amount of load transient. This
tends to increase the settling time of the output voltage for small amount of load transients
as the threshold limits of threshold logic (24) are very close to each other.
Reference is now invited to the accompanying Figure 3 that schematically illustrates the
circuit/block diagram of the control scheme according to the present invention for VRM based
control of output voltage in a converter. The power circuit (30) consist of a main converter
(31), which is either an isolated or a non isolated buck converter in parallel with the auxiliary
buck converter (32) of low output impedance. The full-bridge current doubler rectifier
(FBCDR) is used as main converter. The operation/performance of the control scheme of the
present invention is based on the utilization of the threshold band on the voltage reference
VDROOP (33) which is generated by sensing the main converter current and with a fixed load
line slope RDROOP. The main converter (31) regulates the output voltage V0UT by the closed
loop controller with a reference voltage VDROOP and the sensed output voltage V0UT. The main
controller incorporates conventional peak-current mode control by using switch current
information ISENSE. The compensation circuit (36) directly controls the amount of current that
the main converter (31) supplies to the load. The PWM comparator (37) generates the gate
signals for the power switches in the main converter (31).
Reference is now invite to the accompanying Figure 4 that shows the schematic diagram of
the hysteretic constant turn-off controller (34) which uses two adaptable reference voltages
e-g- VREF1 and VREF2 generated from the voltage reference VDROOP block (33). These adaptable
voltage references minimize the effect of load current slew rate on the time delays. The

operation of the hysteretic constant turn-off controller (34) is based on the principle of non
linear control, which gets activated if the output voltage VOUT exceeds the threshold limits
VREF1 and VREF2. During load step-up transient, the hysteretic constant turn-off controller (34)
turns-ON the switch SB1 in the auxiliary buck converter (32) and supplies the unbalanced
current at the load to minimize the output voltage deviation and it turns-Off the switch SB1
only if the output voltage comes into the threshold band or if the switch SB1 current reaches
the current limit IREF1. A constant turn-off period is maintained for the switch SB1 by a
monoshot Ml (41) to keep the switching frequency of the auxiliary buck converter(32) within
the practical limits. The operation of the hysteretic constant turn-off controller (34) is same
for a step-down transient except the switch SB2 is controlled instead of the switch SB1.
The graphical representations of operational voltage, current and get signal waveforms for
the hysteretic constant turn-off controller (34) have been illustrated in the accompanying
Figure 5.
The control scheme of the present invention as illustrated in the accompanying Figure 3 uses
an additional compensator to improve the performance of the main converter (31) during
load transients. Accompanying Figure 6 illustrates the working principle of the control
scheme which compares the dynamic response of the VRM under three operating conditions
for the same amount of transient in load current ILOAD (61). In the first case, when the main
converter (31) is in operation alone, the deviation in the output voltage VOUT (62) is not
acceptable for proper operation of the microprocessor load. The major reason for deviation in
VOUT (62) is due to the slew-rate limitation of the current IM (65) supplied by the main
converter (31).
In the second case, the main converter (31) and the auxiliary buck converter (32) are
operating in parallel and controlled by the hysteretic constant turn-off controller (34). Here
the additional compensator (35) is inactivated to observe the effect of auxiliary buck
converter's operation on the main converter loop (36) during load transients. For a load step-
up transient, the deviation of the output voltage V0UT (62) below the VREF2 activates the
hysteretic constant turn-off controller (34) to inject some of the load current determined by
the IREF1. This control measure slows down the linear controller (36) loop response of the main
converter (31) as the error seen by the linear controller (36) is small. The current (66)
supplied from the main converter (31) takes much time to reach the final steady state value,
which in turn increases the settling time of the output voltage V0UT (63). Even if the output
voltage VOUT (63) is within the acceptable limits, the extra power loss in the auxiliary buck

converter (32) decreases the overall efficiency of the VRM. The problem is more severe when
the frequency of the load transient increases. The power loss in the auxiliary buck converter
(32) is decreased only by minimizing its duration of operation during the load transients
which is one aspect of the present invention.
In the third case, the additional compensator (35) is activated to minimize the duration of
operation of the auxiliary buck converter (32) during load transient period. The compensated
output (611) of the auxiliary buck converter current 'IA' is added to the main controller
reference (36) IREF, to improve the efficiency and performance of the main converter. The
main converter current waveform (67) shows an improvement in its settling nature compared
to the waveform (66), which makes the output voltage VOUT (64) to settle more quickly. The
difference between the waveforms (68) and (69) is shown as the hatched area indicating the
energy that can be saved for every full-load transient by incorporating the additional
compensator (35). The hysteretic constant turn-off controller (34) with the additional
compensator (35) eliminates the time delays caused by the compensation network (36) of
the main converter controller and also due to the error amplifier slew rate limitation.
The above described control scheme has been tested with simulation tools and the
experimental results provide support for the simulated data. The full bridge current double
rectifier (FBCDR) is used as the main converter because of its advantageous capacity to
eliminate problems relating to small duty cycle. The control scheme of the present invention
is simulated considering the following given specifications:
VIN = 9~19 V, Vo = 1 V, load line slope of 1.2 mΩ, main filter inductor = 680 nH, auxiliary
filter inductor = 104 nH, output capacitance = 330 µF, load current step of 24 A with a slew-
rate of 150 A/µs and switching frequency is 500 kHz.
To show the significance of the proposed solution, the results are compared for three
alternative cases of operation as already described:
Case I: with only main converter (FBCDR) in operation;
Case II: with both FBCDR and auxiliary buck converter in operation but without lead-lag
compensator;
Case III: with the additional compensator (35), activated to minimize the duration of
operation of the auxiliary buck converter (32) during load transient period.

The simulation results as well as the experimental results for the three alternative load
transient operating conditions highlighting the merit of the control scheme of the present
invention as explained for the cases in the preceding paragraphs are illustrated in the
accompanying Figures 7 to 14.
Accompanying Figure 7 shows the simulated result of the output voltage during a load
current step-down transient of 24A with only FBCDR in operation (i.e. Case I operation). The
corresponding experimental result is shown in accompanying Figure 8. A deviation of 208mV
in output voltage is observed in Figure 8, which is not acceptable.
Accompanying Figure 9 shows the simulated result of the output voltage during a load step-
down transient of 24A with both FBCDR and auxiliary buck converter in operation but without
lead-lag compensator block 35 as shown in Figure 3 (i.e. Case II operation). The
corresponding experimental result is shown in accompanying Figure 10. The auxiliary buck
converter improves the dynamic performance such that the output voltage deviation gets
reduced to 133mV as shown in Figure 10.
Accompanying Figure 11 shows the experimental result wherein the operation interval of the
auxiliary buck converter is observed as 65us. Even though this case of operation improves
the dynamic performance, but the output voltage takes 80us to settle as is apparent from the
accompanying Figure 10, which increases the operation interval of auxiliary buck converter.
This in turn increases the dynamic power loss thus requiring further improvement.
Accompanying Figure 12 shows the simulated result of the output voltage, gate signal of
buck converter and current reference during a load current step-down transient of 24A
according to the control scheme of the present invention, as proposed in Case III operation of
the main converter in preceding paragraphs. The corresponding experimental result is shown
in accompanying Figure 13. The auxiliary buck converter improves the dynamic performance
such that the output voltage deviation is only 75mV as shown in Figure 13. Accompanying
Figure 14 shows the experimental result of the output voltage and gate signal of buck
converter for a load current step-down transient of 24A using the control scheme according
to the present invention, wherein the operation interval of the auxiliary buck converter is
observed as only 20us. This minimizes the dynamic power loss in the auxiliary buck converter
which is the desired benefit derived from the control scheme of the present invention.

The above results show a quick settling of the output voltage for a load transient, step-up or
step-down, comparing the load voltage/current with the respective threshold limit to
controlling the operation time of the auxiliary controller by means of additional compensator
and significantly improving the energy efficiency of the main converter.
The performance achievement pertaining to the present invention i.e. minimization of
dynamic power loss is shown in terms of energy efficiency improvement in the accompanying
Figure 15. The energy efficiency vs load transient frequency is plotted for three alternative
cases of operation of the converter as previously described. With the proposed solution, the
energy efficiency increases by 7% at 24A load transient and at 10 kHz load transient
frequency with 50% load duty cycle.
It is thus possible by way of the present invention to provide for a system for control of
output voltage for VRM based DC-DC conversion wherein a main converter running in parallel
with an auxiliary converter incorporating a hysteretic constant turn-off controller and an
additional lead-lag compensator, helps achieving desired minimized dynamic power loss in
extra dynamic channel of an unbalanced mode voltage regulation module (VRM) and a
method of implementation of such control under selective load current transients so as to
achieve decrease in settling time of output voltage and increase in overall energy efficiency.
The system of the present invention and in particular the output voltage control scheme of
VRM according to the present invention is adapted to ensure the following advantages:
(i) A control scheme wherein the output voltage undershoot and overshoot decreases by 59%
and 63% respectively during 80% of full-load transient.
(ii) With the additional lead-lag compensator, the energy efficiency increases by 7% at 24A
load transient and at 10 kHz load transient frequency.
(iii) Excellent line transient response with the classical peak current mode control in the main
converter controller is retained.

through an output filter, comprising of an inductor and a capacitor for removing the high
switching frequency related harmonics to produce the desired average output voltage. The
controllers associated with the power converters manage an operation thereof by controlling
the conduction periods of the switches employed for their operation.
It is experienced in the related art that the Voltage Regulation Module (VRM) based controlled
voltage/power input to Microprocessor load, demands for high slew rate currents while
changing from sleep mode to active mode and vice-versa. The function of the VRM is to
maintain stringent regulation on the output voltage within the specified deviation. During the
load transient, the high demand due to the unbalanced current between the VRM and the
output load current requirement is met by the output filter and decoupling capacitors. Thus
the output voltage deviation during the load transients is determined by ESR, ESL and the
value of the capacitors. In order to reduce the transient voltage spikes, a large number of
capacitors are mounted close to the processor on the motherboard and it is difficult in future
to add more capacitors for increasing the slew rate current, due to space limitation for
mounting on motherboard. The output VR current slew rate is determined by the VR
equivalent inductance and its applied voltage. High switching frequency operation helps to
reduce its LC filter for high bandwidth but it induces higher switching losses and thus needing
a trade-off between fast transient response and high efficiency.
A number of alternative VRM topologies/configuration and control methods have been
attempted to meet the transient response requirements of the microprocessors. According to
a preferred embodiment in the existing art, an extra dynamic channel operates in parallel to
the main switching converter to meet the unbalanced currents at the converter output during
load transients. In such control arrangement for switching converters under load transient,
the main switching converter handles the steady state current while the extra dynamic
channel handles the transient current. This technique allows high slew rate current injection
in the load step-up and energy absorption in the load step-down transients while the main
converter follows an optimal converter design adapted for optimal performance with
improved efficiency. The parallel dynamic channel is configured to function as either a linear
mode regulator or a switching mode regulator. However, the use of linear mode regulator as
the extra dynamic channel is limited because of limitation in meeting efficiency requirements.
Also the power loss in the extra dynamic channel needs to be minimized as it affect the over
all efficiency of the VRM. Such losses become more significant when the frequency of the load
transients increases.

Importantly also, the additional lead-lag compensator favor increase in energy efficiency by
during load transient at 50% load duty cycle, as compared to the conventional converter
systems. The control scheme retains the excellent line transient response with the classical
peak current mode control in the main converter. The system and method output voltage
control of unbalanced mode VRM of the present invention is thus having prospects of wide
industrial application as a monolithic controller IC for controlling the voltage regulator module
for electronic applications like mobile phones, microprocessors, semiconductor industry and
similar other electronic equipments and appliances/end use.

A number of attempts have been made in the existing art in related field to reduce the power
losses and improve the overall efficiency of the converter/voltage regulators. DC-DC
Converters with current injection circuit including an isolated/non-isolated and a switching
mode current injection has been developed, as disclosed in the prior published literature titled
'Transient response improvement in isolated DC-DC converter with current injection circuit',
IEEE-APEC 2005,pp-706-710by X. Wang et al. The non-linear control block of the system
used a constant frequency voltage mode control. During the load transients, current is
supplied or absorbed at a faster rate from the output which maintain the output voltage close
to the reference voltage. As a result of this, the error seen by the linear control loop is small
and therefore the change in the main filter inductor current is slow. The output voltage thus
takes longer time to settle even if it is within the threshold band. This slow response in turn
increases the duration of switching mode current injection topology in operation which causes
additional power loss.
Prior art systems for voltage control with improved efficiency also comprised a Fast Response
Double Buck (FRDB) converter consisting of a main buck converter and an auxiliary buck
converter as disclosed in the literature The Fast Response Double Buck DC-DC Converter
(FRDB): Operation and Output Filter Influence', in Proc. IEEE Trans, on Power Electronics,
Vol. 20 No. 6, Nov 2005, pp. 1261-1270. As in this system, two converters with unequal
output impedances are operating in parallel during transients, the auxiliary buck converter,
which has low output impedance, supplies much of the load current. There is no control on
the amount of current injected/absorbed by the auxiliary buck converter. Moreover, the
controller responds in the same way for any amount of load transient. This tends to increase
the settling time of the output voltage for small amount of load transients as the threshold
limits for the output voltage are very close to each other.
The active transient voltage compensator as disclosed in the prior art ['Active transient
voltage compensator design for VR load line improvement', IEEE-APEC2006,pp.-59-64 by X.
Wang et al] uses the extra dynamic channel in voltage injection mode to decrease the power
loss in the switching mode regulator however its performance depends a lot on a number of
parameters.
US 7251113 is a prior patent titled 'Active transient voltage compensator for improving
converter fast transient response' disclosed in its abstract about a direct current to direct
current (DC-to-DC) converter having an active transient voltage compensator (ATVC) coupled

with the DC-to-DC converter output terminal to improve a fast transient response of the DC-
to-DC converter. The active transient voltage compensator compensates the DC output only
during transient operation The ATVC includes a transformer for reducing the ATVC current
stresses to improve the compensator efficiency and injecting, absorbing high slew rate
current, and a controller circuit for controlling ATVC operation in steady state and normal
operation in transients. During step-up load the ATVC operates as a buck converter and
during step-down load, the ATVC operates as a boost converter while the main converter
operates at low switching frequency for good efficiency.
This prior art though used a voltage compensator with the DC_DC converter for fast transient
response but it does not deal in minimizing the power loss in the extra dynamic channel
during load transient to improve the overall efficiency.
US patent application number 20070210777 entitled 'Controller for a power converter and
method of operating the same' states about a controller for use with a power converter
including a switch configured to conduct to provide a regulated output characteristic at an
output of the power converter, and method of operating the same. In one embodiment, the
controller includes a linear control circuit, coupled to the output, configured to provide a first
control signal for the switch as a function of the output characteristic. The controller also
includes a nonlinear control circuit, coupled to the output, configured to provide a second
control signal for the switch as a function of the output characteristic. The controller is
configured to select one of the first and second control signals for the switch in response to a
change in an operating condition of the power converter.
This prior US patent application also do not indicate minimizing dynamic power loss in an
unbalanced VRM by reducing the operation time of an extra dynamic channel comprising
auxiliary buck converter, directed to maintain constant turn-off period for the switches in the
auxiliary buck converter depending on load transient so as to improve overall efficiency of
main converter.
There has thus been an unfulfilled need in the art to developing a system with VRM topology
and control method thereof comprising a main converter and an extra dynamic channel to
improve the efficiency of the VRM by minimizing the power loss in the extra dynamic channel.
The requirement of fast response and quick settling of the output voltage for power transients
by adopting suitable voltage or current supply/absorbing means through the auxiliary control

circuit introducing a linear and a non linear control circuit such that the main(buck) converter
as well as the auxiliary (buck) converters are controlled using either voltage control loop and
preferred range of reference voltages and hysteretic constant turn-off controller along with an
additional compensator to detect voltage /current deviations accurately during the load
transients. This in turn effectively reduce the operating time of the extra dynamic channel by
way of the auxiliary buck converter reducing the switching power loss during the load
transients such that the overall efficiency of VRM is improved.
OBJECTS OF THE INVENTION
It is thus the basic object of the present invention to provide a system for switching power
converter adapted to control the dynamic power loss during load transient in an unbalanced
Voltage Regulator Module (VRM) with improved efficiency of conversion and a method of its
operation.
Another object of the present invention is directed to developing a system for VRM having
extra dynamic channel adapted to eliminate the problem of slow dynamic response in VRM
and uses less number of passive filter capacitors at the out put of the VRM and also improves
the energy efficiency over the existing systems.
A further object of the present invention is directed to developing necessary control
mechanism of VRM directed to reducing operation time of the extra dynamic channel running
in parallel with the main switching converter so as to reduce the dynamic power loss and
improve the overall efficiency of the system.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM comprising a main buck
converter and an auxiliary buck converter as an extra dynamic channel which is activated in
accordance with the load transient.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the control circuit is

adapted to provide quick response and settling of out put voltage during load transients-
power buck or boost situations.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the controller
comprises a linear control circuit and a non linear control circuit adapted to control/reduce
dynamic power loss during load transient by sensing selective supply current of the main and
the auxiliary converters.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein linear control circuit
uses a feedback loop comprising the output voltage and the reference voltage.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the non linear
controller circuit comprising hysteretic constant turn-off controller and an additional
compensator, wherein the hysteretic constant turn-off controller eliminate the effect of
compensator delay, error amplifier slew rate and the driver delays in the main control loop
during transient response.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the hysteretic
constant turn-off controller uses two adaptable voltage references to activate the auxiliary
buck converter which is the extra dynamic channel in accordance with the output voltages
beyond the reference voltages during the load transient, thus reducing the operating time of
the extra dynamic channel and also reducing power loss.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the additional
compensator in the non linear control circuit generates a compensated output of the auxiliary
buck converter during a load transient which is summed up to the actual current reference to
improve the performance of the main converter.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the control scheme

is capable of decreasing the output voltage undershoot by 59% and overshoot by 63%
respectively during 80% of full load transients.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the system is
adapted to enhance the energy efficiency by about 7% at 24A load transient and at 10kHz
load transient frequency at 50% load duty cycle.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM such that the present
control scheme can be applied to any system consisting of power converters with unequal
output impedances.
A still further object of the present invention is directed to developing a system for improved
efficiency and reduced power loss during power transient in VRM wherein the control scheme
provides an option to the designer to configure the main converter to operate at improved
efficiency.
SUMMARY OF THE INVENTION
Thus according to the basic aspect of the present invention there is provided a voltage
regulator module(VRM) /system, comprising:
(a) a main converter adapted to provide regulated output voltage in steady state
condition;
(b) an extra dynamic channel (auxiliary buck converter) adapted to be activated in
accordance with the load transient;
(c) a current sensor for sensing the output current 'IM of the main converter;
(d) a current sensor for sensing the output current 'IA' of the auxiliary buck converter
and
(e) a control circuit comprising a linear control circuit and a non-linear control circuit
adapted to operate such as to maintain the desired characteristics at the converter
output.

A further aspect of the present invention is directed to a voltage regulator module /system
comprising controller means adapted to selectively choose and operate the said linear control
circuit and a non-linear control circuit in accordance with the load transient;
A still further aspect of the present invention is directed to a voltage regulator
module/system wherein the feedback loop of the linear control circuit comprises the output
voltage and the reference voltage along with the compensator generates current reference to
control the current supplied by the main converter 'IM'.
Also in said voltage regulator module/system, said non-linear control circuit further comprises
hysteretic constant turn-off controller and an additional compensator.
According to yet another aspect of the present invention is directed to a voltage regulator
module/system wherein said hysteretic constant turn-off controller comprises two adaptable
voltage references VREF1 and VREF2 to activate the auxiliary buck converter in accordance with
the load transient associated with a decrease/increase in the output voltage beyond the
voltage references VREF1 and VREF2.
Importantly, in said voltage regulator module/system, the adaptable voltage references VREF1
and VREF2 are obtained from a fixed voltage reference and the sensed output current 'IM' of
the main converter.
A still further aspect of the present invention is directed to a voltage regulator module
/system wherein the hysteretic constant turn-off controller comprises monoshot circuits
adapted to maintain constant turn-OFF period for the switches in the buck converter.
A still further aspect of the present invention is directed to a voltage regulator
module/system wherein the additional compensator is adapted to generate a compensated
output of the auxiliary buck converter current during IA during transients.
A still further aspect of the present invention is directed to a voltage regulator
module/system wherein the compensated output is summed to actual current reference to
thereby improve the performance of the main converter.

According to an advantageous aspect of the present invention said voltage regulator module
/system is adapted to settle the output voltage more quickly and decrease the duration of
auxiliary buck converter in operation during transients to thereby improve efficiency.
A still further aspect of the present invention is directed to a method of controlling
/minimizing dynamic power loss in an unbalanced voltage regulator module comprising:
providing a regulated output voltage in a steady state condition involving a main
converter;
monitoring the load transient and activating an extra dynamic channel ( auxiliary buck
converter;
sensing the output current 'IM' of the said main coverter;
sensing the output current 'IA' of the auxiliary buck converter ;and
controlling by selectively choosing a linear control circuit and a non-linear control
circuit based on the said load transient such as to maintain the desired characteristics
at the converter output.
According to yet another aspect of said method wherein the current reference to control the
current supplied by the main converter 'IM' is generated by the linear control circuit feedback
loop comprising of output voltage and the reference voltage alongwith the compensator.
A still further aspect of the present invention is directed to a method of controlling
/minimizing dynamic power loss in an unbalanced voltage regulator module involving
hysteretic constant turn-off controller and an additional compensator, said hysteretic constant
turn-off controller using two adaptable voltage references VREF1 and VREF2 to activate the
auxiliary buck converter in accordance with the load transient associated with a
decrease/increase in the output voltage beyond the voltage references VREF1 and VREF2.
A still further aspect of the present invention is directed to said method wherein the
adaptable voltage references VREF1 and VREF2 are obtained from a fixed voltage reference and
the sensed output current 'IM' of the main converter.
A still further aspect of the present invention is directed to a method wherein the hysteretic
constant turn-off controller which includes monoshot circuits provides to maintain constant
turn-OFF period for the switches in the auxiliary buck converter.

We Claim:
1. A voltage regulator module/system, comprising:
(a) a main converter adapted to provide regulated output voltage in steady state
condition;
(b) an extra dynamic channel (auxiliary buck converter) adapted to be activated in
accordance with the load transient;
(c) a current sensor for sensing the output current 'IM' of the main converter;

(d) a current sensor for sensing the output current 'IA' of the auxiliary buck
converter and
(e) a control circuit comprising a linear control circuit and a non-linear control
circuit adapted to operate such as to maintain the desired characteristics at the
converter output.

2. A voltage regulator module/system as claimed in claim 1 comprising controller
means adapted to selectively choose and operate the said linear control circuit and
a non-linear control circuit in accordance with the load transient;
3. A voltage regulator module/system as claimed in anyone of claims 1 or 2 wherein
the feedback loop of the linear control circuit comprises the output voltage and the
reference voltage along with the compensator generates current reference to
control the current supplied by the main converter 'IM'.
4. A voltage regulator module/system as claimed in anyone of claims 1 to 3 wherein
said non-linear control circuit further comprises hysteretic constant turn-off
controller and an additional compensator.
5. A voltage regulator module/system as claimed in claim 4 wherein said hysteretic
constant turn-off controller comprises two adaptable voltage references VREF1 and
VREF2 to activate the auxiliary buck converter in accordance with the load transient
associated with a decrease/increase in the output voltage beyond the voltage
references VREF1 and VREF2.
6. A voltage regulator module/system as claimed in claim 5 wherein the adaptable
voltage references VREF1 and VREF2 are obtained from a fixed voltage reference and
the sensed output current 'IM' of the main converter.
7. A voltage regulator module/system as claimed in claim 4 wherein the hysteretic
constant turn-off controller comprises monoshot circuits adapted to maintain
constant turn-OFF period for the switches in the buck converter.

8. A voltage regulator module/system as claimed in claim 4 wherein the additional
compensator is adapted to generate a compensated output of the auxiliary buck
converter current during IA during transients.
9. A voltage regulator module/system as claimed in 8 wherein the compensated output
is summed to actual current reference to thereby improve the performance of the
main converter.

10. A voltage regulator module/system as claimed in claim 9 adapted to settle the output
voltage more quickly and decrease the duration of auxiliary buck converter in
operation during transients to thereby improve efficiency.
11. A method of controlling /minimizing dynamic power loss in an unbalanced voltage
regulator module comprising:
providing a regulated output voltage in a steady state condition involving a main
converter;
monitoring the load transient and activating an extra dynamic channel ( auxiliary
buck converter;
sensing the output current IM of the said main coverter;
sensing the output current 'IA' of the auxiliary buck converter ;and
controlling by selectively choosing a linear control circuit and a non-linear control
circuit based on the said load transient such as to maintain the desired
characteristics at the converter output.
12.A method as claimed in claim 11 wherein the current reference to control the current
supplied by the main converter 'IM' is generated by the linear control circuit feedback
loop comprising of output voltage and the reference voltage alongwith the
compensator.
13.A method as claimed in anyone of claims 11 or 12 involving hysteretic constant turn-
off controller and an additional compensator, said hysteretic constant turn-off
controller using two adaptable voltage references VREF1 and VREF2 to activate the
auxiliary buck converter in accordance with the load transient associated with a
decrease/increase in the output voltage beyond the voltage references VREF1 and VREF2.
14. A method as claimed in claim 13 wherein the adaptable voltage references VREF1 and
VREF2 are obtained from a fixed voltage reference and the sensed output current 'IM' of
the main converter.
15. A method as claimed in anyone of claims 13 or 14 wherein the hysteretic constant
turn-off controller which includes monoshot circuits provides to maintain constant
turn-OFF period for the switches in the auxiliary buck converter.

16.A method as claimed in anyone of claims 13 to 15 wherein said additional
compensator is used to generate a compensated output of the auxiliary buck
converter current 'IA' during transients.
17.A method as claimed in claim 16 wherein the compensated output is summed to the
actual current reference to improve the performance of the main converter.
18. A method as claimed in claim 17 adapted to settle the output voltage more quickly
and decreases the duration of auxiliary buck converter in operation during transients
such as to minimize the dynamic power loss in the auxiliary buck converter.
19.A method as claimed in claim 18 comprising reduced dynamic power loss and
improving of the energy efficiency of the unbalanced voltage regulator module.
20.A method of controlling /minimizing dynamic power loss in an unbalanced voltage
regulator module and a voltage regulator module adapted to carry out such method
substantially as hereindescribed and illustrated with reference to the accompanying
figures.
Dated this the 7th day of December,2009 Anjan Sen
Of Anjan Sen & Associates
(Applicants Agent)
IN/PA-199
An unbalanced mode voltage regulator module (VRM) based switching power converter
adapted to reduce dynamic power loss, increasing efficiency, fast transient response and
improved power density for output load. The VRM maintains precise output voltage within
specified threshold limits, particularly during the transient high slew-rate load transients. A
VRM based DC-DC conversion system is disclosed wherein a main converter running in
parallel with an auxiliary converter incorporating a hysteretic constant turn-off controller and
an additional lead-lag compensator, minimizing dynamic power loss in extra dynamic channel
of VRM and its control under selective load current transients to achieve decrease in settling
time of output voltage and increase in overall energy efficiency. The output voltage
undershoot and overshoot decreases by 59% and 63% respectively during 80% of full-load
transient and the energy efficiency increases by 7% at 24A load transient and at 10 kHz load
transient frequency. The control scheme for the VRM favour wide industrial application for a
number of applications including the mobile, microprocessors, semiconductor industries etc.