Description:Complete Specification:
The following specification describes and ascertains the nature of this invention and the manner in which it is to be performed

Field of the invention
[0001] The present disclosure relates to the field of electronics and in particular discloses a device to protect against electrostatic discharge for integrated circuits.

Background of the invention
[0002] Electrostatic discharge (ESD) is the release of an undesired static electricity when two electrically charged objects come into contact. For example, when two electrically charged objects, such as the human body and an electronic device come into contact with each other, static electricity is discharged. This can cause damage to any electronic component. Electronic control units and Integrated circuits can be damaged by electrostatic discharge in which large currents flow through the devices. ESD damage to electronic circuits can occur at any time, from assembly to board-level soldering to end-user interactions. The electrostatic discharge protection plays a vital role to prevent catastrophic failure. ESD can cause permanent damage to components and can cause latent damage to the electronic components. Latent damages cause malfunction over a period of time.

[0003] In the conventional systems, Capacitors and special ESD diodes are used to protect electronic devices such as ECUs from the electrostatic discharge. However, they have their own limitations. The usage of capacitor increases the capacitance load to the signal and also distorts the slew rate of the signal. On the other hand, the ESD diode is a costly solution and these diodes are available with specific clamping voltages which cannot be used as ESD and Short Circuit Battery protection together. Hence there is a need for a low cost and effective ESD protection device that can be used across the spectrum of various ICs without any impact on signal quality.

[0004] Patent Application CN109524949A titled “ESD protection device for electrostatic protection” discloses a ESD protection device that includes an RC trigger circuit, a holding time circuit and a discharge NMOS transistor M3 which are connected in series in turn. The RC trigger circuit detects an electro-static discharge ESD event and transmits a detected signal to the holding time circuit. The holding time circuit controls the opening time of the discharge NMOS transistor M3 according to the detected signal to ensure that the discharge NMOS transistor M3 has sufficient time to discharge the electro-static discharge ESD current. According to the invention, the holding time circuit is used to separate the electro-static charging time detected by the RC trigger circuit from the function of the holding releasing time. False triggering and the layout area are reduced while it is ensured that the discharge NMOS transistor M3 has sufficient opening time. The ESD protection device for electrostatic protection can be used in the electrostatic protection design of integrated circuits.

Brief description of the accompanying drawings
[0005] An embodiment of the invention is described with reference to the following accompanying drawings:
[0006] Figure 1 depicts multi-channel communication lines between control units (101a, 101b) having a device (11) to protect against electrostatic discharge;
[0007] Figure 2 depicts a device (11) to protect against electrostatic discharge.

Detailed description of the drawings

[0008] Figure 1 depicts multi-channel communication lines between control units (101a and 101b) having a device to protect against electrostatic discharge (11a and 11b). A control unit with reference to this disclosure is logic circuitry that respond to and processes logical instructions to get a meaningful result. A control unit may be implemented as any or a combination of: one or more microchips or integrated circuits interconnected using a parent board, hardwired logic, software stored by a memory device and executed by a microprocessor, firmware, an application specific integrated circuit (ASIC), and/or a field programmable gate array (FPGA).

[0009] Figure 2 depicts the device (11) to protect against electrostatic discharge. The device (11) to protect against electrostatic discharge is adapted to be connected to a communication line between at least two control units or an input/output signal line of a control unit (101a and 101b). The device (11) comprises an electronic circuitry comprising a plurality of components such as isolating elements (D1 and D2), storage elements (C) and at least a power source (V1).

[0010] A first set of isolating elements (D1) are connected in parallel with each other. One terminal of each of the said isolating elements is connected to the communication line between control units. With respect to electric circuits and electronic instruments “isolating element” is an electronic component that provides the deliberate introduction of a non-conductive separation to inhibit current flow. In one embodiment of the present invention, the isolating element is a diode. In another embodiment of the present invention the isolating element is a MOSFET.

[0011] A set of storage elements (C) are in parallel connection with the first set of isolating elements (D1) and also in parallel with each-other. Storage element (C) are electronic components that store energy. The capacitor is a key energy storage element (C) in electronic systems. One terminal of each of the storage elements (C) is grounded. In an exemplary embodiment of the present disclosure, the storage element (C) is a capacitor.

[0012] A second isolating element (D2) in parallel connection with both the first set of isolating elements (D1) and the set of storage elements (C). A power source (V1) in series connection with the second isolating element (D2). The voltage of the power source (V1) is dependent on the operating signal voltage(s) of the control units.

[0013] The device (11) to protect against electrostatic discharge as optionally comprises a discharge circuit connected in parallel with the set of storage elements (C). The discharge circuit comprises at least a resistor having a terminal grounded and optionally a switch in series connection with the resistor.

[0014] The working of the invention is explained with the help of figure 2. D1 anode is connected to the communication line between two control units that are Integrated Circuits (ICs). Diode D1 cathode connected to capacitor C and Diode D2 cathode. D1 and D2 diode used to isolate or decouple communication line from capacitor C and supply voltage V1. D2 is used to isolate capacitor C from the V1 supply. Capacitor C need to be selected such that maximum voltage during ESD pulse in capacitor should not exceed Max voltage in IC. The basic rationale behind working of the device is that when the ESD pulse is applied, the ESD pulse energy will be absorb by capacitor “C” through D1. Due to extra-energy transferred to capacitor “C”, Voltage at IC will not reach ESD voltage, thereby protecting the IC from ESD.

[0015] When the control units are powered on the device will be supplied with battery voltage V1. In this condition, the second isolating element will be forward biased allowing the Capacitor “C” to be charged to V1 example 4V. The value of V1 is chosen as the highest operating voltages amongst all the ICs in communication signal. This is done just to ensure that in absence of ESD pulse and under normal working condition, the capacitor “C” doesn’t start charging on transmission of electronic signals and interfere or distort the transmission of electronic signals between ICs. Thereafter when an ESD pulse applied to the communication line, the second isolating element (D2) will be reverse biased whereas the first set of isolating elements (D1) will be forward biased. This is because the voltage of ESD pulse will greater that V1. This will allow the capacitor to charge but this time to a higher voltage equivalent to the ESD pulse.

[0016] When the control units are not powered on, the device (11) won’t be supplied with battery voltage and all elements will be in an inactive state. Thereafter, application of a sudden ESD pulse to the communication line will activate the first set of isolating elements (D1) making them forward biased. This will allow the capacitor to charge and absorb the energy of the ESD pulse, thereby protecting the control units from damage even when they are powered off.

[0017] The proposed circuit shows can be easily scaled for protecting multiple lines from ESD pulse. The first set of isolating elements (D1) need to add one isolating element (D1n) per extra per signal that need to be protected. The storage element (C) doesn’t need any change however, instead of a single storage element (C) a set of storage elements (C) can be connected in parallel with each other for better results. No changes are needed for the second isolating element (D2) and power supply.

[0018] Optionally a discharge circuit is connected in parallel with the set of storage element (C)s. The discharge circuit is provided to drain the storage element (C) after the absorption of the ESD pulse. Optionally, a switch and resistor are connected in parallel to the storage element. Whenever voltage across storage element/capacitor cross a set threshold, switch will be turned ON which discharge energy from capacitor through resistor.

[0019] It should be understood at the outset that, although exemplary embodiments are illustrated in the figures and described below, the present disclosure should in no way be limited to the exemplary implementations and techniques illustrated in the drawings and described below.

[0020] This idea to develop a device (11) to protect against ESD pulse aims to provide one ESD protection structure for several circuits. Generally, control unit and integrated circuits have limited static and dynamic voltage. Some ICs are inherently designed and produced to withstand ESD pulse. The proposed idea can be used as ESD protection for communication lines ( especially high-speed communication lines ) or input signal or outputs without impacting signal quality (e.g slew rate, rise time, fall time etc). Further it can be optimized and scaled for ASICs.

[0021] It must be understood that the embodiments explained in the above detailed description are only illustrative and do not limit the scope of this invention. Any modification and adaptation to the device (11) to protect against electrostatic discharge along with cosmetic changes to the proposed electronic circuitry are envisaged and form a part of this invention. The scope of this invention is limited only by the claims.
, Claims:We Claim:
1. A device (11) to protect against electrostatic discharge, said device (11) adapted to be connected to a communication line between at least two control units or an input/output signal line of a control unit, said device (11) comprising:
a first set of isolating elements (D1) in parallel connection with each other, one terminal of each of the said isolating elements connected to the communication line;
a set of storage elements (C) in parallel connection with the first set of isolating elements (D1), one terminal of each of the storage elements (C) is grounded;
a second isolating element (D2) in parallel connection with both the first set of isolating elements (D1) and the set of storage elements (C);
a power source (V1) in series connection with the second isolating element (D2).

2. The device (11) to protect against electrostatic discharge as claimed in claim 1, wherein the isolating element is a diode.

3. The device (11) to protect against electrostatic discharge as claimed in claim 1, wherein the isolating element is a MOSFET.

4. The device (11) to protect against electrostatic discharge as claimed in claim 1, wherein the storage element (C) is a capacitor.

5. The device (11) to protect against electrostatic discharge as claimed in claim 1, wherein the device (11) optionally comprises a discharge circuit connected in parallel with the set of storage elements (C).

6. The device (11) to protect against electrostatic discharge as claimed in claim 5, wherein the discharge circuit comprises at least a resistor having a terminal grounded and optionally a switch in series connection with the resistor.

7. The device (11) to protect against electrostatic discharge as claimed in claim 1, wherein the voltage of the power source is dependent on the operating signal voltage(s) of the control units