Abstract: An improved method and system employing coding and decoding color information of a display controller when changing a highlighted area on a screen comprising the steps of: i) Identifying the co-ordinates for the area(s) to be highlighted. ii) Transmitting the co-ordinates (address range) to the RAM internal to FPGA. iii) FPGA bypasses video memory information (color index) and points to specific color index for the locations which lies with in the address range.
THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE
NATURE OF THE INVENTION
A DISPLAY CONTROLLER DESIGN WITH LOW RAM REQUIREMENT AND LOW CPU LOAD
NUMBERED AS DATED
A) FIELD OF TECHNOLOGY:
1. This invention relates to video display and specifically, to micro processor
;
controlled video display systems and, more particularly, and specifically to the method in display controller unit of reducing the overhead on the central processing unit (CPU) and reducing the memory requirements while displaying a change in the color of highlighted area(s).
B) BACKGROUND OF THE INVENTION
2. The Graphics display systems are used in television, home network computers and display boxes in many other fields. One such field is in the area of medical imaging and in particular, patient monitoring systems.
3. The Graphics display systems typically include a display controller, a central processing unit (CPU), a random access memory (RAM) or virtual access memory (VRAM), a display unit, normally a CRT or LCD display system etc., The display controller is the part of the graphics display system that receives
display pixel data from any combination of locally attached video and graphics input ports, processes the data in some way, and produces final display pixels as output. The same has been detailed in the flow chart at Figure 1.0 herein below.
4. Data that are displayed on the screen of a display device are, for example, text, figures, and images. The window screen is a screen on which various sentences and computer images are displayed in separate areas, and has high resolution of, for example, a part of the 1024.times.768 dots. In accordance with the continuing development of such display functions, a processing ability that can provide higher performance at a higher speed is required for hardware components, such as a CPU and a video adaptor that actually performs a drawing process. A frame buffer (VRAM) for temporarily storing drawing information must have a large memory capacity.
5. The Display Controller also reads the stored data from the video memory, decodes the color and puts it on the screen beginning from the first pixel on the top left corner to the last pixel on the bottom right. This refreshing of video memory and screen is repeated every 16 milliseconds. A row on the screen is refreshed with horizontal synchronization (HSYNC) and the entire frame is refreshed with vertical synchronization (VSYNC).
C) DESCRIPTION OF PRIOR ART:
Traditional Approach:
6. For a monochrome screen, each pixel is represented by one byte data, which is the color information whereas for a color screen each pixel is represented by 8/16/24 bits representing the red-green-blue (RGB) values of a pixel data. The video memory is mirror image of the screen, which contains the color information of the screen. It stores the color information directly for monochrome screen whereas for color screen it will store the index of color look-up-table (LUT) in the memory (Embedded RAM) of the Display controller. The number of colors Display Controller can support determines the memory width and the depth of the screen. The memory is determined by the screen resolution (ex- for a 640 x 480 memory depth should be 300 kilo bytes (KB), for a 1024 x 1024 memory depth should be 1024KB). The processor writes the color index in the video memory and the display controller also reads the stored data from the video memory. Video memory acts as an interface between the processor and the display controller, as the processor cannot access the video memory directly, it will write to Display Controller and then the controller will write the data to video memory.
7. The Display Controller reads the stored data from the video memory decodes the color and puts it on the screen beginning from the first pixel on the top left corner to the last pixel on the bottom right. A row on the screen is refreshed with HSYNC & the entire frame is refreshed with VSYNC.
8. Consider a block or rectangular or square shaped area in the screen as shown in the figure 1.1 with the background set to blue and the text color set to black. Supposedly, the intent is to change the background color from blue to red keeping the same text color as black. With traditional design approach, processor has to read color index of all the pixels falling within the block from the video memory, compare the index and then rewrite all the pixels having blue index with the index of red color.
9. This operation of reading the entire block of the highlighted area pixel color index, comparing the index with the LUT and then rewrite the entire block area would require enormous processing speed, memory, and is very primitive. We propose a new methodology which would reduce the over all memory requirement and increase the speed of the entire operation.
D) OBJECT OF THE INVENTION:
10. It is the primary object of invention to invent a method with higher response time when changing a highlighted area(s) pixel color.
11. It is another object of this invention to invent a method to reduce the processing time when displaying a highlighted area, which normally requires reading and refreshing the whole pixel data in the highlighted area(s).
12. It is another object of this invention to decrease the refresh time of the screen.
13. It another object of this invention to reduce the memory requirement by updating only the area of interest and leaving the rest of the pixel data untouched.
14. It is another object of this invention to transmit minimal data to the video memory while changing the color of a highlighted area.
15. It is another object of this invention to invent the possibility of using a low-bit data bus when handling display screens with highlighted area(s).
E) PROPOSED SOLUTION:
16.To overcome the problems mentioned above, the Display Controller core is redesigned on FPGA (Altera's ACEX 50K device). In this, new scheme apart
from the usual way of the processor writing to video memory, Display controller reading the color index from the memory, decoding the RGB data and putting it on the screen, a new feature is added. Consider the block highlighting once again. The processor just needs four parameters to mark the highlighted area namely, starting row address, starting column address, end row address and end column address. These four coordinates are written into an internal memory (initialized as RAM) of Display Controller (FPGA).
17. The Display controller then reads these four parameters from the RAM and
compares it with the present pixel that is read from the video memory for
refresh. If the pixel address falls within the block specified by the four
parameters, then and only then the Display Controller (FPGA) will compare
the color index read from video memory. If the index matches, it will change
the index to point to the new color in the color look up table and if the index
mismatches, it will pass the same index to the color look up table.
F) SCOPE OF THE INVENTION:
18. The primary object of the invention is to invent a method of display with
higher response time when changing a highlighted area(s) pixel color. It is
another object of this invention to invent a method to reduce the processing
time when displaying a highlighted area, which normally requires reading and
refreshing the whole pixel data in the highlighted area(s) and to decrease the refresh time of the screen. This invention reduces the memory requirement on the screen by updating only the area of interest and leaving the rest of the pixel data untouched. By doing so there is a transmission of minimal data to the video memory while changing the color of a highlighted area. The advantage of this invention is also the usage of a low-bit data bus when handling display screens with highlighted area(s). The invention is novel and carries wide public utility in the field of Graphics display systems used more particularly in medical devices.
19. Although the invention has been described with reference to specific
embodiments, this invention is not to be construed in limiting sense. Various
modification(s) of the disclosed embodiments, as well as alternate embodiments
of the invention, will become apparent to persons skilled in the art upon
reference to the description of the invention. It is therefore contemplated that
such modifications can be made without departing from the spirit or scope of
the present invention as defined.
G) BEST METHOD OF PERFORMING THE INVENTION:
20. This feature has been used effectively for the applicant's standalone Patient
Monitoring Machine shown in figure 1.2 for CURSOR. The CURSOR is a
block highlighted with red color.
21. As the optical encoder is rotated, as shown in figure 1.3 the CURSOR moves to indicate its current position and the area is highlighted. Highlighted area changes from blue color background to red colored background.
22. With traditional approach, the processor has to read, compare and re-write all pixels in "MENU" block. Same activity of reading, comparing and re-writing has to be repeated for the "GAIN" block (CURSOR position) as shown in figure 1.2. The Processor has to update the video memory every time the CURSOR position is changed. This process of updating the video memory incurs a lot of overhead on CPU. The overhead further increases if multiple blocks have to be highlighted. With our new methodology of encoding only the coordinates for which the color has to be changed reduces the over head on the CPU. With our new methodology of transmitting only the coordinates and one single color index reduces the over head on the transmission bus. With our new methodology of reading and writing only the coordinates and one single color index reduces the memory requirements.
23. The method presented above achieves both refreshing speed and low memory requirement while changing the color of a highlighted area in a display controller unit and there is no loss of performance when changing the highlighted area hence is a cost effective and practical way of achieving the
performance benefits of existing hardware. The method also presents a way of achieving the current performance with a lower performance hardware setup.
H) What is claimed is:
a) An improved method and system employing coding and decoding color information of a display controller when changing a highlighted area on a screen comprising the steps of:
i) Identifying the co-ordinates for the area(s) to be highlighted.
ii) Transmitting the co-ordinates (address range) to the RAM internal to FPGA.
iii) FPGA bypasses video memory information (color index) and points to specific color index for the locations which lies with in the address range.
To,
The Controller of Patents, The Patent office, At Chennai.
| # | Name | Date |
|---|---|---|
| 1 | 856-CHE-2004-FER.pdf | 2017-05-31 |
| 1 | 856-che-2004-form 5.pdf | 2011-09-03 |
| 2 | 856-che-2004-form 26.pdf | 2011-09-03 |
| 2 | 856-CHE-2004-Correspondence-180915.pdf | 2015-09-22 |
| 3 | 856-che-2004-form 1.pdf | 2011-09-03 |
| 3 | 856-CHE-2004 CORRESPONDENCE OTHERS 12-06-2015.pdf | 2015-06-12 |
| 4 | 856-che-2004-drawings.pdf | 2011-09-03 |
| 4 | 856-CHE-2004 CORRESPONDENCE OTHERS 21-05-2015.pdf | 2015-05-21 |
| 5 | 856-che-2004-description(provisional).pdf | 2011-09-03 |
| 5 | 856-CHE-2004 CORRESPONDENCE OTHERS 08-12-2014..pdf | 2014-12-08 |
| 6 | 856-che-2004-description(complete).pdf | 2011-09-03 |
| 6 | 856-CHE-2004 CORRESPONDENCE OTHERS 25-11-2013.pdf | 2013-11-25 |
| 7 | 856-che-2004-claims.pdf | 2011-09-03 |
| 7 | 856-CHE-2004 CORRESPONDENCE OTHERS. 25-11-2013.pdf | 2013-11-25 |
| 8 | 856-CHE-2004 POWER OF ATTORNEY 30-08-2013.pdf | 2013-08-30 |
| 8 | 856-CHE-2004 FORM-1 25-11-2013.pdf | 2013-11-25 |
| 9 | 856-CHE-2004 FORM-13 30-08-2013.pdf | 2013-08-30 |
| 9 | 856-CHE-2004 FORM-13 25-11-2013.pdf | 2013-11-25 |
| 10 | 856-CHE-2004 FORM-2 25-11-2013.pdf | 2013-11-25 |
| 10 | 856-CHE-2004 OTHER DOCUMENT 25-11-2013.pdf | 2013-11-25 |
| 11 | 856-CHE-2004 FORM-6 25-11-2013.pdf | 2013-11-25 |
| 11 | 856-CHE-2004 POWER OF ATTORNEY 25-11-2013.pdf | 2013-11-25 |
| 12 | 856-CHE-2004 FORM-6 25-11-2013.pdf | 2013-11-25 |
| 12 | 856-CHE-2004 POWER OF ATTORNEY 25-11-2013.pdf | 2013-11-25 |
| 13 | 856-CHE-2004 FORM-2 25-11-2013.pdf | 2013-11-25 |
| 13 | 856-CHE-2004 OTHER DOCUMENT 25-11-2013.pdf | 2013-11-25 |
| 14 | 856-CHE-2004 FORM-13 25-11-2013.pdf | 2013-11-25 |
| 14 | 856-CHE-2004 FORM-13 30-08-2013.pdf | 2013-08-30 |
| 15 | 856-CHE-2004 FORM-1 25-11-2013.pdf | 2013-11-25 |
| 15 | 856-CHE-2004 POWER OF ATTORNEY 30-08-2013.pdf | 2013-08-30 |
| 16 | 856-CHE-2004 CORRESPONDENCE OTHERS. 25-11-2013.pdf | 2013-11-25 |
| 16 | 856-che-2004-claims.pdf | 2011-09-03 |
| 17 | 856-CHE-2004 CORRESPONDENCE OTHERS 25-11-2013.pdf | 2013-11-25 |
| 17 | 856-che-2004-description(complete).pdf | 2011-09-03 |
| 18 | 856-CHE-2004 CORRESPONDENCE OTHERS 08-12-2014..pdf | 2014-12-08 |
| 18 | 856-che-2004-description(provisional).pdf | 2011-09-03 |
| 19 | 856-che-2004-drawings.pdf | 2011-09-03 |
| 19 | 856-CHE-2004 CORRESPONDENCE OTHERS 21-05-2015.pdf | 2015-05-21 |
| 20 | 856-che-2004-form 1.pdf | 2011-09-03 |
| 20 | 856-CHE-2004 CORRESPONDENCE OTHERS 12-06-2015.pdf | 2015-06-12 |
| 21 | 856-che-2004-form 26.pdf | 2011-09-03 |
| 21 | 856-CHE-2004-Correspondence-180915.pdf | 2015-09-22 |
| 22 | 856-che-2004-form 5.pdf | 2011-09-03 |
| 22 | 856-CHE-2004-FER.pdf | 2017-05-31 |
| 1 | search_23-05-2017.pdf |