1. Title of the invention
A method for avionics system testing to test multiple discrete signals in common time reference.
2. Field of Invention
A method for improvement in general pertaining to avionics integration testing and in particular analysis of system performance using dedicated display of signal characteristics along with usage of embedded signal generation and interlock functions. This is achieved by monitoring six signals in common time reference using four dedicated display for monitoring of pulse arrival sequence, monitoring of pulse amplitude, duration and pulse plot, usage of embedded signal generation & interlock functions, dedicated circuit for holding momentary signals to continuous display.
3. Background of invention
It is becoming increasingly stringent certification requirement to test complete avionics system in Test Rig prior to installation on aircraft. To do so, in prior art, multiple tester viz multi meter, CROs are required to test all test input signals as the input/output port of tester are limited. In prior method, there were dedicated tester for voltage measurement, dedicated tester for resistance measurement and dedicated tester for pulse display. Hence in prior art there was no combined tester which will test all parameter together. Further, during testing, along with test equipment, a specific test equipment which gives equipment presence information by providing electrically of type open Circuit/Ground & 28VDC /Open circuit also required. In summary, prior art had following drawbacks:
a) As the number of input signal increases, more number of test equipment required due to limitation in input channels of test equipment. This leads to difficultly in simultaneous analysis of all signals in common time.
b) The linking of input/output port with different tester is relatively complicated because of numerous connectivity. A connectivity failure may arise due to contact misalignment with tester, missing or contaminated probes, and open circuit /sort circuit possibility due to manual handling of probes. Each tester output to be precisely aligned and most of the time good contact with the tester is necessary for completion of signal path.
c) In many application, it is required of dedicated signal path, simulation and visual display of parameter simultaneously.

d) For testing of arrival of momentary signals, due to short duration of signal, it was difficult to observe the signals. Also there was no direct indication of momentary pulses on display for visual confirmation of pulse arrival.
e) Relative pulse position measurement was not possible, as different multi-meter and CRO was used with no common start time .
f)Measurement of pulse duration, amplitude of pulse in a single display was not possible due to usage of different test equipment, which leads to high lead time in noting the displayed values at different tester.
g) Determination of sequence of Pulse arrival was not possible
h) No possibility of simulation of any signal or condition from tester.
i) No possibility of validation of signals when required to be passed through safety interlock.
Above limitation method of prior integration testing, leads to long lead time in testing and often repetition of test. Also errors in relative pulse position measurement, pulse sequence measurement due to manual readout. Also Due to non- availability of simulation feature of open circuit/ground and open circuit /28VDC type of signal in tester, external system has to be connected with tester. This leads to more expensive, time consuming integration testing activity. Thus needed an convenient method for to overcome above shortcoming .
4. Summary of the Invention
The present innovation invention presents an improved method for system integration testing. This comprises of an integrated ground tester having following features:
a. In accordance with one aspect of invention is Embedded signal generation
feature. Simulation of signal is important when actual system which generate
equivalent signal is not present or difficult to connect the system which generate
signals. In this tester, simulation of open circuit & ground and 28VDC and
ground signal simulation is possible.
b. In accordance with one aspect of invention is Embedded signal interlock testing
feature. This tester has provision of passing the signals through embedded
interlock circuit of validation of signal and system. This insures that pass /fail
criteria of system design as per signal is met or not.
c. In accordance with one aspect of invention is, Hold circuit for holding
momentary signals. Practically whenever a momentary signal arrives it visually
difficult to monitor the signal as time span of signal is very less. This tester has
dedicated circuit which will hold the momentary signal into continuous signal.
The continuous signal will be displayed using displays. This will help testing
person that signal has arrived.

d. In accordance with one aspect of invention is .Measure and Display signal
characteristics in four dedicated display. It consist display of all Signals in
common time reference of signals pertaining to multiple system. Signal arrival
sequence display. Signal pulse width display. Signal amplitude display .During
integration testing it is very vital to know the sequence of pulse arrival. In this
case, if 5 signals arrived on tester, this tester will display which signals arrived
first and which signal is arrived last and sequence of arrival of their signal. This
help validation of sequence as per deign requirement of system.
e. In accordance with one aspect of invention is Jester does not require any
battery or commercial supply for operation. This tester will be operated through
available 28 VDC system supply.
5. Detailed Description of the Invention
The present invention presents a method for improvement in avionics integration testing using a novel electrical interconnect called as novel tester, providing a selectable electrical path and selectable function between input and output of system under test.
The present invention relates to a method for monitoring and analyzing the behavior of interrelated system which are under test through signals generated by system under test [103,104,105], using an electrical interconnect named as tester; the signals from system under test is applied to input port of said tester, which has an embedded signal simulation feature providing simulation test signal to input ports of system under test.
The invention describes a method for achieving very high improvement in testability of various signals generated from various system. As shown in fig 1, the said tester has input port [100] for supply of 28VDC a reference power supply used as a voltage input for usage as a voltage input on subsequent electrical interconnect This tester works on 28 VDC [100] which is available at test rig or aircraft. This tester does not require any battery or commercial supply of 230 VAC. Therefore ,as long as reference voltage is available as input the tester can be used and aloows further circuitory to host and process six input channels . The tester has a operable switch named as power ON/OFF switch [101] for ON/OFF function. This switch is toggle switch. Upon power ON condition ,28 VDC is supplied to power supply safety box [106]. The power supply safety box [106] has a current protection with 1 Ampere fuse. The system which are under test are system under Test 1(103], system under Test 2[104], system under Test 3[105]. This represent systems which has active interface with tester. The tester has a junction box [107] to host six signals .The signals from system under test connected to a junction box[107] for

distribution of signal to interlock relay .interlock bypass switch[108],The junction box [107] has banana test socket also which is useful to connect external test equipment. Further .these signals are fed to distribution box[107].This box gives supply to interlock/bypass selection switch [108].When interlock switch [108]is selected as interlock relay signal will go to interlock relay[111] through distribution box [121].Interlock relay [111]works as per user defined selection of signal feeding to terminals, based on this output data will be fed to distribution box [110].The output of interlock relay is connected to distribution box[110] .from distribution box [110]data is fed to microcontroller [115].Microcontroller[115] process the data .measure voltage at input port .derive the parameter at each input port .detect arrival sequence .pulse width .amplitude and gives output to four display systems First display[117] is for signal plot in common time reference. Second display [118], is for signal amplitude measurement This section displays the amplitude of signals with identification of input Ports. Third display [119] is for signal duration measurement. This section displays the duration of signals with identification of input Ports. Fourth display [120] is for signal occurrence sequence measurement. Display indication [116] for visual Indication of Arrival & Presence of momentary signal,- as the momentary pulse will be available for momentary duration, this section will hold the pulse and made available in Display continuously for visual indication to observer for arrival. The ultra short duration pulse is passed to relay R2-R6 which hold it as a continuous display corresponding to eash test input.
The tester next sets channel to supply a valid simulation to input channels of system under test. Tester has embedded Open/28VDC type or open/ground Signal Simulation done through simulation relay [112]. The operation of this relay is controlled through control switch 1 [114]and control switch 2[121]. This interface provides simulation of Open/28VDC type Signal Simulation. Since tester simulates the signals, essentially removes the requirement of actual system needed during integration testing. This simulate external system. Open/Ground type Signal Simulation interface provides simulation of Open/Ground type Signal Simulation. This also is to simulate external system. The simulation signal is through single output port [122]. For distribution boxes [110] [113] [110] is interface mainly made of banana socket connector for interface between tester and to other external tester.
a. Step of operation for tester:
Step 1, identify the signals required for testing.
Step2, Identify the signals required for simulation and type of simulation. Example many times it is required that when external system is present signal

shall be ground and when external system is absent signal shall be ground. So it is possible to simulate external system using this tester.
Step 3, Establish inter connection using standard interface for signals mentioned in step 1 and 2.
Step 4, Connect power port of tester to available supply at test Rig or aircraft (28VDC).
Step 5, The signal can be routed through safety interlock circuit, in case the same is required.
Step 5, Carry out operation on system so that test signal will be generated and observe result like pulse amplitude, duration and sequence of occurrence of signal on tester and validation of signals can be done incase required.
b. Details of testing achieved:
b.1 This has feature of measurement of momentary signal. Practically whenever a momentary signal arrives it visually difficult to monitor the signal as time span of signal is very less. This tester has dedicate circuit which will hold the momentary signal into continuous signal. The continuous signal will be displayed using LED displays .This will help testing person that signal has arrived.
b.2 Second feature is sequence monitoring as per arrival of signals in common time reference. For example if 5 signals arrived on tester, this tester will display which signals arrived first and which signal is arrived last and sequence of arrival of their signal .This help validation of sequence as per deign requirement of system.
b.3 Other feature is determination of each pulse characteristics like what is amplitude of signal ,time duration of signal. These pulse characteristics are displayed in Digital readout. There is dedicated digital readout for individual signal
b.4.This tester has additional feature of simulation of some vital signals.
Simulation of signal is important when actual system is present .It this tester
.simulation of open circuit ground and 28VDC and ground signal simulation is
possible. /

b.5 This tester has provision of testing of interlock logic of validation of signal and system This insures that pass /fail criteria of system design as per signal is met or not. comparative analysis of various system to decide pass fail criteria is carried out.
b.6 This tester do not need any battery or commercial supply to operate the tester as it can be operated through available system supply.
6. Brief Description of the Drawings
Fig1, is a simplified view of the electrical interconnection of each functional block of tester.
Fig 2, is a simplified view of Interlock /Bypass Switch, Junction Box, Interlock Relay interface. Signals 1 to 6 has selection switch S1-S6 for each signal. Once switches are selected as "On", signal will flow through interlock relay R1 to microcontroller through distribution box. signal. Once switches are selected as "OFF", signal will flow to microcontroller through distribution box.
Fig 3 , is a simplified view of Micro-controller, Display and holding relay interface. All six signals are connected to distribution box. This is spliced into two signal path. First one is connected to microcontroller and to four dedicated displays. Later path to connected to relay for momentary holding circuit
Fig 4 , is a simplified view of Relays interconnection with 28 VDC & momentary signal for visual Indication of Arrival & Presence of momentary signal. Here . ground is continuously available on X2 port. When momentary signal arrives at X2, relay will be energized. After energization terminal B1 and B2 will be shorted. Terminal B2 will supply 28 VDC to X1, which makes relay to be continuously ON. Output of A2 will be given to display.
Fig 5, is a simplified view of Control Switch"!, Control Switch 2, Simulation relay (R7)interface. In this .control switch 1 will have two input lines either 28VDC or ground .Once 28VDC is selected using control switch 1 ,relay R7 will be energized and 28VDC will be available to pin 2 of control switch 2 .Based on operation of control switch 2 .28VDC or open will be available at banana connector In other case ,once control switch 1 is selected as ground ,relay R7 will be non energized ,then control switch 2 will simulate open circuit /ground type of signal.
Fig 6 , is a simplified view of flow chart for Signal flow .