FIELD OF THE INVENTION:
The present invention generally relates to radio broadcasting receivers. More specifically, the present invention relates to a system and method for minimizing acquisition time in DRM (Digital Radio Mondiale) receivers.
BACKGROUND OF THE INVENTION:
Broadcasting is a process of distribution of audio and / or video to dispersed audience through various electronic mass communication mediums. In recent days, digital radio broadcasting has become more popular because of its audio quality compared to traditional analog radio broadcasting. The digital radio broadcasting exists in frequency bands such as used by AM, FM bands and also in other bands for data transmission and reception.It may include several channels that contain audio, informational data, diagnostic parameters and other data.
Digital Radio Mondiale (DRM) is a broadcasting standard at AM bands below 30 MHz and VHF bands above 30 MHz. It is a high quality digital replacement for analogue radio broadcasts of AM and FM frequency. The DRM digital radio stream contains three channels namely a Main Service Channel (MSC), a Fast Access Channel (FAC), and a Service Description Channel (SDC).The MSC may contain an audio or informational data, depending on the type of service being broadcast. The FAC may contain transmission frame id, type of modulation of SDC & MSC, number of services, type of services and part information on how to decode MSC. The SDC may contain information about the received DRM digital radio stream, such as a radio station identifier, geographic location, time, date, and other information including additional information to decode MSC.
DRM has the following features,
i. Supports both audio and data output; ii. Provides good audio quality;
iii. Provides more number of services in a single frequency; iv. Supports simulcasts(transmission of analog and digital simultaneously);

v. Supports data services like Journaline, Electronic Programme Guide (EPG) and Slide
show; and vi. Supports Emergency Warning System (EWS) and Alternate Frequency Switching
(AFS).
Further, DRM has different robustness modes used under different propagation conditions. Robustness Modes A, B, C and D are used for transmissions under 30MHz and Robustness Mode E is used in VHF bands. Modulation parameters are different for different Robustness Modes.
One of the major performance differentiator of DRM Receivers is the acquisition time taken by the receiver. Acquisition time is the time taken by the receiver to output the audio signal after receiving the DRM radio signal i.e. after tuning to a frequency. The radio data stream(both audio and data) is contained by the MSC. To start MSC processing, receiver needs SDC channel information. Based on first received transmission frame, acquisition time will change. Following are the three conditions on reception of the transmission frames.
i. First received transmission frame is Frame-0 and SDC is absent: As per DRM transmission frame structure, SDC is part of Frame-0. MSC processing will start after the reception of SDC. After getting SDC, to provide audio data for decoding, receiver will take 800 ms delay for short interleaver depth and 2400 ms delay for long interleaver depth. If the SDC is not obtained from the first frame itself, DRM receiver has to wait for SDC. This time is 1146.68ms in the case of robustness mode A and B (2 SDC symbols and duration of one symbol is 26.66 ms). For robustness mode C, the wait time is 1140 (3 SDC symbols and duration of one symbol is 20 ms). For robustness mode D, the wait time is 1150.02 (3 SDC symbols and duration of one symbol is 16.66 ms). Here, the MSC symbols received before SDC are lost and acquisition takes additional 1146.68 ms for robustness mode A and B, 1140 ms for robustness mode C and 1150.02 for robustness mode D to audio out after receiving first frame.
ii. First received transmission frame is Frame-1: FAC is obtained in the first frame. To get first SDC, receiver has to wait 800ms. After receiving the SDC, receiver starts

MSC processing. After getting SDC, to provide audio data for decoding, receiver will take 800 ms delay for short interleaver depth and 2400 ms delay for long interleaver depth. Here, the MSC symbols received before SDC are lost and acquisition takes additional 800 ms to audio out after receiving first frame.
iii. First Received transmission frame is Frame-2: FAC is obtained in the first frame. To get first SDC, receiver has to wait 400 ms. After receiving the SDC, receiver starts MSC processing. After getting SDC, to provide audio data for decoding, receiver will take 800 ms delay for short interleaver depth and 2400 ms delay for long interleaver depth. Here, the MSC symbols received before SDC are lost and acquisition takes additional400 ms to audio out after receiving first frame.
Conventionally, many systems and methods are known in the existing art that have been proposed to overcome the problems associated with the time taken to execute the data frames at the receiver end.
Japanese Patent Application No. 2007088923 to Alpine Electronics Inc, entitled “Receiver and reception frequency detecting method” deals with a receiver and reception frequency detection method to search receivable frequencies in a short period of time in Digital Radio Mondiale system. A broadcast schedule creation unit creates a broadcast schedule list based on the detected schedule information and stores schedule list in the memory and during seek operation the reception frequency is searched in the list thereby eliminating the need of searching unnecessary frequencies.
However, the above solution does not overcome the delay caused during the processing of frames. Hence, further developments have been proposed to avoid time delay in processing of frames using memory units.
United States Patent No. 7974338 to Harman Becker Automotive Systems GmbH, entitled “System for decoding a digital radio stream” deals with a method for improving user experience in DRM by outputting data contained in Fast Access Channel(FAC) and Service Description channel(SDC) without waiting for the Main Service Channel (MSC) decoding to

finish. The DRM channels (FAC,SDC, MSC) decoded data is stored in a memory and reused to improve acquisition time.
European Patent Document No. 1104138 to Robert Bosch Gmbh, entitled “Descrambling of data frames” discloses a method for reducing audio decoding delay in Digital Radio systems like Digital Radio Mondiale (DRM). By selecting the most likely frame configuration for a frequency and by filling the memory of de-interleaver with demodulated data before the control channel is decoded; parallel processing of information has been performed and thereby delay time is reduced in the receiver side.
Though the above existing systems and methods disclose storing of decoded DRM signal data in memory unit for reducing delay in Digital Radio Mondiale (DRM) receiver, still there exists time delay for reception and processing of frames during frame execution or during incorrect selection of configuration
To overcome these problems and thereby to improve user experience, the present invention proposes a system and method to improve the acquisition time by storing the demodulated data on memory unit. After identifying the first frame id by decoding FAC, the stored demodulated data from memory is re-split to get MSC channel data. This MSC data is stored in memory unit and once SDC is available, MSC data stored in memory unit is decoded.
SUMMARY OF THE INVENTION:
An objective of the present invention is to propose an effective system and method for improving the acquisition time of a DRM (Digital Radio Mondiale) receiver, in order to enhance the user experience.
In the present invention, the DRM receiver system comprises: a) Antenna, b) Tuner, c) Processor with internal components arrangement, d) one or more Memory / storage unit and e) Output devices. The processor of the present invention comprises: a) Asynchronous Sample Rate Converter (ASRC), b) Demodulator, c) Channel splitter, d) Channel decoder and e) Middleware and Applications.

According to the present invention, a DRM (Digital Radio Mondiale) signal from the transmission station is received through the antenna. The receiver is tuned to a frequency using the tuner and is fed to the processor. In the processor unit, the received signal is converted to demodulator sample rate, demodulated and stored in the memory unit. Also, the demodulated signal is split into Fast Access Channel (FAC), Service Description Channel (SDC) and Main Service Channel (MSC). The channel split data is decoded by the channel decoder. Middleware parses the channel decoded data and process as audio and data. Application sends processed data to output devices such as speaker & display.
In accordance with the present invention, the DRM demodulator output is stored in memory for reuse in case of reception of Frame-0 without SDC orFrame-1 or Frame-2. If the first received frame is Frame-0 without SDC or Frame-1 or Frame-2, the channel splitter re-splits the data stored in memory-1and stores MSC data in memory-2. Once SDC is available, MSC data stored in memory-2 is decoded. This solution avoids the additional time taken in waiting for MSC data after receiving SDC data to decode MSC data when Frame-0 (without the first one or two symbols), Frame–1 or Frame -2 is received. Thus, the acquisition time of DRM signal is improved.
The objective and advantages of the present invention will become more evident from the following detailed description when taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS:
The objective of the present invention will now be described in more detail with reference to the accompanying drawings, in which:
FIG. 1 shows a block diagram of DRM receiver of the present invention;
FIG. 2 shows a detailed block diagram of DRM receiver with internal components of the
processor;
FIG. 3 shows the structure of DRM transmission super frame;
FIG. 4 shows the overall flow of the present invention;

FIG. 5A shows a graphical representation of time taken for executing frames under condition
(i) where the first received transmission frame is Frame-0 and SDC is absent;
FIG. 5B shows a graphical representation of time taken for executing frames under condition
(ii) where the first received transmission frame is Frame-1; and
FIG. 5C shows a graphical representation of time taken for executing frames under condition
(iii) where the first received transmission frame is Frame-2.
REFERENCE NUMERALS:
100: DRM receiver
10: Antenna
20: Tuner
30: Processor
31: Asynchronous Sample Rate Converter (ASRC)
32: Demodulator
33: Channel splitter
34: Channel decoder
341: FAC decoder
342: SDC decoder
343: MSC decoder
35: Middleware & Application
351: Middleware
352: Application
40: Memory (memory-1 & memory-2)
50: Output devices
DETAILED DESCRIPTION OF THE PRESENT INVENTION:
The present invention proposes an effective system and method for improving the acquisition time of the DRM signal at DRM receiver in order to enhance the user experience.

In general, Digital Radio Mondiale (DRM) is a digital radio standard used in all frequency bands (AM and VHF) above and / or below 30 MHz. The DRM is a high quality digital replacement of analogue radio broadcasts in AM and FM bands. One of the major performance differentiator of DRM Receiver is the acquisition time.
The present invention provides a system for improving the acquisition time in DRM receiver (100). The system comprises components such as: a) an antenna (10) to receive radio signal from a transmission station, b) a tuner (20) to tune the receiver (100) to a frequency, c) a processor (30) to process the tuned signal, d) one or more memory / storage units(40) to store the signal data and e) one or more output devices(50) (such as display / speaker) to output the processed data and audio.
According to the present invention, the signal from any of the transmission stations is received by the antenna (10) located at the receiver end (100) which is tuned to receive the desired frequency. The obtained DRM signal is processed by a processor which comprises: a) an Asynchronous Sample Rate Converter (ASRC) (31) to convert the sample rate of input signal to demodulator sample rate, b) a demodulator (32) to demodulate the information / data for further processing, c) a channel splitter (33) to split the demodulated data into Fast Access Channel (FAC), Service Description Channel (SDC) and Main Service Channel (MSC), d) a channel decoder (34) to decode the information from each channel and e) a middleware (351) to parse the decoded channel data and process as audio and data and applications (352) to send processed data to output devices (50)such as speaker and display.
FIG. 1 illustrates a basic block diagram of the DRM receiver (100). The receiver (100) comprises: a) an antenna (10), b) a tuner (20), c) a processor unit (30), d) one or more memory units (40) and e) one or more output devices (50). According to FIG. 1, a DRM signal received by the antenna (10) at the receiver end (100) is tuned to a certain frequency using tuner (20) and the tuned DRM signal is processed at the processor unit (30). The processed signal data is stored in the memory (40) and outputted through the output devices (50) as audio and data.
Referring to FIG. 2, a detailed block diagram of the DRM receiver(100) in accordance with the present invention is illustrated. It includes a processor (30) comprising: an ASRC (31), a

demodulator (32), a channel splitter (33), a channel decoder (34) and a middleware & application unit (35). The sample rate of tuned DRM radio signal is converted to demodulator sample rate using ASRC (31). The demodulated data is stored in memory-1 and split into three channels of DRM such as Fast Access Channel (FAC), Service Description Channel (SDC) and Main Service Channel (MSC) using channel splitter (33).This data from channel splitter (33) is decoded by the channel decoder (34). Now, the middleware (351) parses the channel decoded data and processes as audio and data. The processed data is then provided to output devices (50) connected in the circuitry through application unit (352). The output device (50) is a display device and / or a speaker but not limited to it.
FIG. 3 illustrates the structure of transmission super frame of DRM signal. The duration of one transmission super frame is 1200 ms. Each transmission super frame contains a set of consecutive transmission frames. Referring to Fig. 3, the transmission super frame consists of three transmission frames (Frame-0, Frame-1 and Frame-2). The duration of each transmission frame is 400 ms. The transmission frame further contains Fast Access Channel (FAC), Service Description Channel (SDC) and Main Service Channel (MSC). The Fast Access Channel (FAC) and Main Service Channel (MSC) are available on each frame whereas the Service Description Channel (SDC) is available only in Frame-0 represented by first two or three symbols. FAC contains the transmission frame ID and necessary information to find the service details and also to decode SDC and MSC. SDC which is available at the starting of each super frame contains information to decode the data contained in MSC. MSC has two types of interleaving depths, short and long. Based on interleaving depth, MSC multiplex frame is spread in one frame for short and five frames for long. The MSC has 800 ms delay for short interleaving and 2400 ms delay for long interleaving respectively. It is known in the art that the radio data stream(both audio and data) is contained by the MSC. The time taken to output audio for decoding after receiving SDC will be the delay of multiplex frame based on whether it is short or long. Also, as the processor (30) needs SDC channel information to start MSC processing, the acquisition or processing time will change based on the first received transmission frame.
There are three conditions that exists during the reception of the transmission frames, namely (i) First Received transmission frame is Frame-0, (ii) First Received transmission frame is Frame-1 and (iii) First Received transmission frame is Frame-2.

According to FIG. 4, the flow steps of the present invention involves(a) the demodulated output from DRM demodulator (32) is sent to memory-1 (40) for storage as well as to channel splitter (33) for splitting the data into FAC, SDC and MSC;(b) The FAC data from channel splitter (33) is decoded by FAC decoder (341) and the FAC parser parses the frame ID;(c) Now, the DRM receiver (100)checks whether the received frame is a first received frame or not;(d) If it is a first received frame, the receiver (100) further checks the frame ID whether the frame is frame-0 or not, else it checks the availability of SDC data from previously received frame;(e) If the first received frame is frame-0, the receiver (100)then checks the availability of SDC in the current frame (i.e. frame-0); else (i.e. not frame-0), it loads demodulated output from memory–1 (40) for re-splitting; (f) If SDC is available fully on the currently received frame, the SDC decoder (342) starts SDC data decoding; else, it loads demodulated output from memory – 1 (40) for re-splitting;(g) Now, the receiver checks the availability of SDC parameters, if it is available, the receiver (100) then checks the availability of MSC data on memory-2 (40); else it stores MSC data to memory–2 (40); and(h) If MSC data is available on memory-2 (40), then the receiver (100) loads the MSC data of previously stored frame from memory-2 (40) for decoding to provide audio output; else, the MSC data of the current frame is decoded to provide audio output.
FIG. 5A depicts the graphical representation of time taken for executing frames according to the present invention under condition (i) where the first received transmission frame is Frame-0 and SDC is absent. In traditional method, when the first received frame is Frame-0 and SDC is not available, the receiver (100) waits for 1146ms - 1150 ms to receive SDC data and then waits for MSC data to be available to process the frame for providing the output. With the system of present invention, once it is identified that the first received frame is Frame-0 and SDC is not available, the processor (30) fetches demodulated data from memory-1 (40) and re-splits the data to obtain MSC data and stores it into memory-2 (40). Once SDC data is available, the MSC data stored in memory-2 (40) and the MSC data from current frame is decoded without any delay to provide audio output. Thus, reduces the delay of 1146ms-1150 ms for providing the output in case of long interleaving.
FIG. 5Bdepictsthe graphical representation of time taken for executing frames according to the present invention under condition (ii) where, the first received transmission frame is

Frame–1. In traditional method, when the first received frame is Frame-1, the receiver (100) waits for 800ms to receive the SDC data and then waits for MSC data to be available to process the frames for providing the output. With the system of present invention, once it is identified that the first received frame is Frame-1 and not Frame-0, the processor (30) fetches demodulated data from memory-1 (40) and re-splits the data to obtain MSC data and stores it into memory-2 (40).Once SDC data is available, the MSC data stored in memory-2 and the MSC data from current frame is decoded without any delay to provide audio output. Thus, reduces the delay of 800ms for providing the output in the case of long interleaving. In case of short interleaving, a similar method is adapted and delay of up to 400 ms is reduced.
FIG. 5C depicts the graphical representation of time taken for executing frames according to the present invention under condition (iii) where, the first received transmission frame is Frame–2. In traditional method, when the first received frame is Frame-2, the receiver (100) waits for 400ms to receive the SDC data and then processes the frames to provide the output. With the system of present invention, once it is identified that the first received frame is Frame-2 and not Frame-0, the processor (30) fetches demodulated data from memory-1 (40) and re-splits the data to obtain MSC data and stores it into memory-2 (40). Once SDC data is available, the MSC data stored in memory-2 (40) and the MSC data from current frame is decoded without any delay to provide audio output. Thus, reduces the delay of 400ms in providing the output in the case of long interleaving. In case of short interleaving, a similar method is adapted and delay of up to 400 ms is reduced.
Hence, the present solution avoids the additional time taken of a) 1146ms – 1150ms used in condition (i), where the first received transmission frame is Frame-0 without SDC, b) 800 ms used in condition (ii), where the first received transmission frame is Frame-1 and c) 400 ms used in condition (iii), where the first received transmission frame is Frame-2in case of long interleaving depth as DRM channel splitter (33) stores the demodulator (32) output in memory (40). In case of short interleaving, a similar method is adapted and delay of up to 400 ms is reduced. If the first received frame is other than Frame-0 (i.e.Frame-1 or Frame-2), then on next loop the channel splitter (33) re-splits the data stored in memory (40) and start MSC channel decoding after obtaining SDC parameters, thus enhancing the user experience by improving the acquisition time.

While the foregoing written description of the invention enables one of ordinary skill to make and use what is considered presently to be the best mode thereof, those of ordinary skill will understand and appreciate the existence of variations, combinations, and equivalents of the specific embodiment, method, and examples herein. The invention should therefore not be limited by the above described embodiment, method, and examples, but by all embodiments and methods within the scope and spirit of the invention as claimed.

1. A system for improving acquisition time of a DRM receiver (100), comprising:
a. an antenna (10) to receive digital radio signal;
b. a tuner (20) to tune said receiver (100) to a frequency;
c. a processor (30)to process said radio signal, wherein said processor (30)
comprises:
i. a demodulator (32) to demodulate said signal received from ASRC (31); ii. a channel splitter (33) to split said demodulated signal into multiple
channels; iii. one or more channel decoders (34) to decode the data from said channel
splitter (33); and iv. a middleware (351) and application (352) to parse said decoded data,
process and send as audio and data;
d. one or more memory units (40) to store said demodulated signal from
demodulator (32); and
e. one or more output devices (50) to output said processed signal information.
2. The system as claimed in claim 1, wherein said processor (30) further comprises an Asynchronous Sample Rate Converter (ASRC) (31) to convert the sampling rate of said received signal to demodulator sample rate;
3. The system as claimed in claim 1, wherein said channel splitter (33) splits said demodulated signal into Fast Access Channel, Service Description Channel and Main Service Channel.
4. The system as claimed in claim 1, wherein said channel decoder (34) includes FAC decoder (341), SDC decoder (342) and MSC decoder (343).
5. A method for improving acquisition time of DRM receiver comprising the steps of: a. receiving DRM signal through antenna (10) at receiver end (100);

b. tuning said receiver (100) to a frequency using a tuner (20);
c. converting the sample rate of DRM signal to a demodulator sample rate using ASRC
(31);
d. demodulating the signal from ASRC (31) using a demodulator (32);
e. storing said demodulated signal on memory-1 (40) for reuse, wherein said memory-1
(40) is accessed when the first received frame ID is Frame-0 without SDC data,
Frame–1 or Frame–2;
f. splitting said demodulated signal into FAC, SDC and MSC channels using a channel
splitter (33);
g. decoding said channel split data of each channels using channel decoders (34),
wherein when SDC is not available, said channel splitter re-splits the stored data in
memory-1 (40) and stores MSC data into memory-2 (40);
h. parsing said decoded channel data and processing as audio and data in middleware
(351); i. sending processed data to output devices through application (352); and j. outputting said processed signal data through one or more output devices (50).
6. The method as claimed in claim 5, wherein said channel decoders are FAC decoder (341), SDC decoder (342) and MSC decoder (343).
7. The method as claimed in claim 5, wherein said frame ID is obtained by parsing said FAC decoded data from said FAC channel decoder (341).
8. The method as claimed in claim 5 to 7, wherein said MSC decoder (343) uses stored MSC data from memory-2 (40) if present and decodes said MSC data from current frame.