Claims:
1. A method for protecting a circuit having at least a first circuit breaker arranged downstream of a second circuit breaker, the method comprising the steps of:
detecting an event indicative of any or a combination of an earth current fault and a short circuit current fault in said circuit;
transmitting restraint signals, from said first circuit breaker, to said second circuit breaker with high priority based on a software interrupt policy; and
tripping said first circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
2. The method of claim 1, wherein the second circuit breaker receives the restraint signals with the high priority based on a hardware interrupt policy.
3. The method of claim 1, further comprising a step of checking whether an interrupt based on any of SI restraint signals and GI restraint signals is detected.
4. The method of claim 1, wherein the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in an event indicative of any or a combination of the earth current fault and the short circuit current fault detected by said first circuit breaker.
5. The method of claim 1, wherein when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
6. The method of claim 1, wherein in case the second circuit breaker is connected to one or more upstream circuit breakers, the second circuit breaker transmits the restraint signals to at least one of the one or more upstream circuit breakers in order to delay tripping of the at least one of the one or more upstream circuit breakers in an event indicative of any or a combination of the earth current fault and the short circuit current fault in said second circuit breaker.
7. An electrical circuit comprising one or more circuit breakers configured to trip the electrical circuit in case of detection of an event indicative of any or a combination of an earth current fault and the short circuit current fault in said circuit, wherein at least a first circuit breaker of the one or more circuit breakers that is arranged downstream of a second circuit breaker of the one or more circuit breakers transmits on said detection, restraint signals to said second circuit breaker based on a software interrupt policy, and wherein the second circuit breaker trips in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
8. The electrical circuit of claim 7, wherein a controller is configured to prioritize transmission of the restraint signals in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
9. The electrical circuit of claim 7, wherein the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in said first circuit breaker.
10. The electrical circuit of claim 7, wherein when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
, Description:
TECHNICAL FIELD
[0001] The present disclosure relates generally to the field of circuit breakers. In particular, the present disclosure relates to a method for hardware interrupt based zone selective interlocking for circuit breakers to protect an electrical circuit.
BACKGROUND
[0002] Background description includes information that may be useful in understanding the present disclosure. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication specifically or implicitly referenced is prior art.
[0003] A fault condition like short circuits or ground fault in electrical circuits/system causes a thermal stress and a mechanical stresses over the electronic systems that leads to damage of components in the electrical system. The thermal stress is a result of heat generated in the electrical system during the fault and the mechanical stress is the result of peak current that causes high magnetic forces that can lead to deformation of the components such as bus bars, conductors, insulators, etc. The effect of the thermal stress and the mechanical stress is reduced by reducing faulty time duration that is associated with the electrical system.
[0004] Circuit breakers are electrical switches designed to protect an electrical systems from damage caused by an over-current condition, a short circuit, a ground fault, etc. Under normal circuit conditions, the circuit breakers carry currents and when there is a fault in electrical system, the circuit breakers are employed to break circuit to interrupt current flow in the electrical circuit.
[0005] However, more than one circuit breaker are coordinated to interrupt flow of current in order to protect the electrical circuit from damage as quick as possible under the fault conditions. Coordination assures that continuity of service is maximized during any of the over-current or the ground fault. The circuit breaker nearest to the fault will clear the fault while all other circuit breakers in the system remain closed, which provides continuity of service to the unaffected parts of the system. In a coordinated system, longer delays and higher pickups are selected on upstream devices to allow downstream devices to trip first. This selection results in longer trip times because the circuit breakers wait for the selected delay time before tripping. This can expose the system to large amounts of fault stress.
[0006] Generally the circuit breakers are connected in a single line in the coordination system to detect the fault as well as to clear the fault. A major problem associated with circuit breakers that are connected in a single line is such that a circuit breaker near the fault has to detect the fault as well as clear the fault without causing other breakers connected in same line to trip. However due to latency in communication of module and due to delay in digital signals processing, co-ordination between the upstream and downstream circuit breakers operate intermittently that causes all the circuit breakers in the same line to issue trip randomly and due to the latency the trip time to clear the fault increases which leads to more effect of thermal and a mechanical stresses on electrical systems.
[0007] There is, therefore, a need in the art to provide a method based on zone selective interlocking for circuit breakers in order to isolate and clear a short circuit or ground fault without an intentional time delay in an electrical circuit.
[0008] All publications herein are incorporated by reference to the same extent as if each individual publication or patent application were specifically and individually indicated to be incorporated by reference. Where a definition or use of a term in an incorporated reference is inconsistent or contrary to the definition of that term provided herein, the definition of that term provided herein applies and the definition of that term in the reference does not apply.
[0009] In some embodiments, the numbers expressing quantities of ingredients, properties such as concentration, reaction conditions, and so forth, used to describe and claim certain embodiments of the invention are to be understood as being modified in some instances by the term “about”. Accordingly, in some embodiments, the numerical parameters set forth in the written description and attached claims are approximations that can vary depending upon the desired properties sought to be obtained by a particular embodiment. In some embodiments, the numerical parameters should be construed in light of the number of reported significant digits and by applying ordinary rounding techniques. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of some embodiments of the invention are approximations, the numerical values set forth in the specific examples are reported as precisely as practicable. The numerical values presented in some embodiments of the invention may contain certain errors necessarily resulting from the standard deviation found in their respective testing measurements.
[0010] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0011] The recitation of ranges of values herein is merely intended to serve as a shorthand method of referring individually to each separate value falling within the range. Unless otherwise indicated herein, each individual value is incorporated into the specification as if it were individually recited herein. All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g. “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0012] Groupings of alternative elements or embodiments of the invention disclosed herein are not to be construed as limitations. Each group member can be referred to and claimed individually or in any combination with other members of the group or other elements found herein. One or more members of a group can be included in, or deleted from, a group for reasons of convenience and/or patentability. When any such inclusion or deletion occurs, the specification is herein deemed to contain the group as modified thus fulfilling the written description of all groups used in the appended claims.

OBJECTS OF THE INVENTION
[0013] A general object of the present disclosure is to provide a method based on zone selective interlocking for circuit breakers to protect an electrical circuit.
[0014] Another object of the present disclosure is to provide a method based on zone selective interlocking for circuit breakers to isolate and clear a fault in an electrical circuit with no intentional delay.
[0015] Another object of the present disclosure is to provide a method based on zone selective interlocking to allow the circuit breakers to communicate with each other in order to reduce trip time and to clear a fault in an electrical circuit.
[0016] Another object of the present disclosure is to provide method assisted by hardware interrupt for circuit breakers in order to reduce latency in signal transmission and processing.
SUMMARY
[0017] The present disclosure relates to a method based on zone selective interlocking to clear fault in electrical circuits. In particular, the present disclosure relates to a method for hardware interrupt based zone selective interlocking for circuit breakers in order to protect an electrical circuit.
[0018] An aspect of the present disclosure discloses a method for protecting an electrical circuit having at least a first circuit breaker arranged downstream of a second circuit breaker, the method including the steps of detecting an event indicative of any or a combination of an earth current fault and a short circuit current fault in said circuit, transmitting restraint signals, from said first circuit breaker, to said second circuit breaker with high priority based on a software interrupt policy and tripping said first circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
[0019] In an embodiment, the second circuit breaker receives the restraint signals with the high priority based on a hardware interrupt policy.
[0020] In an embodiment, the method further includes a step of checking whether an interrupt based on any of SI restraint signals and GI restraint signals is detected.
[0021] In an embodiment, the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in an event indicative of any or a combination of the earth current fault and the short circuit current fault detected by said first circuit breaker.
[0022] In an embodiment, when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
[0023] In an embodiment, in case the second circuit breaker is connected to one or more upstream circuit breakers, the second circuit breaker transmits the restraint signals to at least one of the one or more upstream circuit breakers in order to delay tripping of the at least one of the one or more upstream circuit breakers in an event indicative of any or a combination of the earth current fault and the short circuit current fault in said second circuit breaker.
[0024] In an embodiment, the circuit can be any or a combination of electrical circuit, electronic circuit, electrical system, electronic system and the like.
[0025] Another aspect of the present disclosure discloses an electrical circuit comprising one or more circuit breakers configured to trip the electrical circuit in case of detection of an event indicative of any or a combination of an earth current fault and the short circuit current fault in said circuit, wherein at least a first circuit breaker of the one or more circuit breakers that is arranged downstream of a second circuit breaker of the one or more circuit breakers transmits on said detection, restraint signals to said second circuit breaker based on a software interrupt policy, and wherein the second circuit breaker trips in the event indicative of any or a combination of the earth current fault, the short circuit current fault and the like in the circuit.
[0026] In an embodiment, a controller is configured to prioritize transmission of the restraint signals in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
[0027] In an embodiment, the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in said first circuit breaker.
[0028] In an embodiment, when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
[0029] Various objects, features, aspects and advantages of the inventive subject matter will become more apparent from the following detailed description of preferred embodiments, along with the accompanying drawing figures in which like numerals represent like components.
BRIEF DESCRIPTION OF DRAWINGS
[0030] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure. The diagrams are for illustration only, which thus is not a limitation of the present disclosure, and wherein:
[0031] FIG. 1 illustrates an exemplary representation of zone selective interlocking in accordance of embodiment of the present disclosure.
[0032] FIG. 2 illustrates an implementation of zone selective interlocking with circuit breaker in accordance of embodiment of the present disclosure.
[0033] FIG. 3 illustrates an exemplary representation of proposed method for method for protecting a circuit in accordance of embodiment of the present disclosure.
[0034] FIG. 4 illustrates an exemplary representation of implementation of proposed method for protecting a circuit in accordance of embodiment of the present disclosure.

DETAILED DESCRIPTION
[0035] The following is a detailed description of embodiments of the disclosure depicted in the accompanying drawings. The embodiments are in such detail as to clearly communicate the disclosure. However, the amount of detail offered is not intended to limit the anticipated variations of embodiments; on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the scope of the present disclosure as defined by the appended claims.
[0036] If the specification states a component or feature “may”, “can”, “could”, or “might” be included or have a characteristic, that particular component or feature is not required to be included or have the characteristic.
[0037] As used in the description herein and throughout the claims that follow, the meaning of “a,” “an,” and “the” includes plural reference unless the context clearly dictates otherwise. Also, as used in the description herein, the meaning of “in” includes “in” and “on” unless the context clearly dictates otherwise.
[0038] Exemplary embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments are shown. These exemplary embodiments are provided only for illustrative purposes and so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those of ordinary skill in the art. The invention disclosed may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Various modifications will be readily apparent to persons skilled in the art. The general principles defined herein may be applied to other embodiments and applications without departing from the scope of the invention. Moreover, all statements herein reciting embodiments of the invention, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future (i.e., any elements developed that perform the same function, regardless of structure). Also, the terminology and phraseology used is for the purpose of describing exemplary embodiments and should not be considered limiting. Thus, the present invention is to be accorded the widest scope encompassing numerous alternatives, modifications and equivalents consistent with the principles and features disclosed. For purpose of clarity, details relating to technical material that is known in the technical fields related to the invention have not been described in detail so as not to unnecessarily obscure the present invention.
[0039] Each of the appended claims defines a separate invention, which for infringement purposes is recognized as including equivalents to the various elements or limitations specified in the claims. Depending on the context, all references below to the "invention" may in some cases refer to certain specific embodiments only. In other cases, it will be recognized that references to the "invention" will refer to subject matter recited in one or more, but not necessarily all, of the claims.
[0040] All methods described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The use of any and all examples, or exemplary language (e.g., “such as”) provided with respect to certain embodiments herein is intended merely to better illuminate the invention and does not pose a limitation on the scope of the invention otherwise claimed. No language in the specification should be construed as indicating any non-claimed element essential to the practice of the invention.
[0041] Various terms as used herein are shown below. To the extent a term used in a claim is not defined below, it should be given the broadest definition persons in the pertinent art have given that term as reflected in printed publications and issued patents at the time of filing.
[0042] The present disclosure relates to a method based on zone selective interlocking to clear fault in electrical circuits. In particular, the present disclosure relates to a method for hardware interrupt based zone selective interlocking for circuit breakers in order to protect an electrical circuit.
[0043] An aspect of the present disclosure discloses a method for protecting an electrical circuit having at least a first circuit breaker arranged downstream of a second circuit breaker, the method including the steps of detecting an event indicative of any or a combination of an earth current fault and a short circuit current fault in said circuit, transmitting restraint signals, from said first circuit breaker, to said second circuit breaker with high priority based on a software interrupt policy and tripping said first circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
[0044] In an embodiment, the second circuit breaker receives the restraint signals with the high priority based on a hardware interrupt policy.
[0045] In an embodiment, the method further includes a step of checking whether an interrupt based on any of SI restraint signals and GI restraint signals is detected.
[0046] In an embodiment, the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in an event indicative of any or a combination of the earth current fault and the short circuit current fault detected by said first circuit breaker.
[0047] In an embodiment, when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
[0048] In an embodiment, in case the second circuit breaker is connected to one or more upstream circuit breakers, the second circuit breaker transmits the restraint signals to at least one of the one or more upstream circuit breakers in order to delay tripping of the at least one of the one or more upstream circuit breakers in an event indicative of any or a combination of the earth current fault and the short circuit current fault in said second circuit breaker.
[0049] In an embodiment, the circuit can be any or a combination of electrical circuit, electronic circuit, electrical system, electronic system and the like.
[0050] Another aspect of the present disclosure discloses an electrical circuit comprising one or more circuit breakers configured to trip the electrical circuit in case of detection of an event indicative of any or a combination of an earth current fault and the short circuit current fault in said circuit, wherein at least a first circuit breaker of the one or more circuit breakers that is arranged downstream of a second circuit breaker of the one or more circuit breakers transmits on said detection, restraint signals to said second circuit breaker based on a software interrupt policy, and wherein the second circuit breaker trips in the event indicative of any or a combination of the earth current fault, the short circuit current fault and the like in the circuit.
[0051] In an embodiment, a controller is configured to prioritize transmission of the restraint signals in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
[0052] In an embodiment, the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in said first circuit breaker.
[0053] In an embodiment, when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
[0054] In an embodiment, the circuit can be any or a combination of electrical circuit, electronic circuit, electrical system, electronic system and the like.
[0055] FIG. 1 illustrates an exemplary representation of zone selective interlocking (ZSI) system in accordance of embodiment of the present disclosure. In an aspect, a hardware interrupt based zone selective interlocking (ZSI) system 100 includes a first circuit breaker (also referred to as downstream breaker) 102 connected upstream to a second circuit breaker (also referred to as upstream breaker hereinafter) 104 configured to trip an electrical circuit in case of detection of an event indicative of any or a combination of earth current fault, short circuit current fault, over-current fault and the like. In an embodiment, the ZSI system 100 can include GPIO pins to receive and transmit restrain signals between the first and the second circuit breakers 102 and 104.
[0056] In an embodiment, the ZSI system 100 can allow the circuit breakers 102/104 to communicate with each other using hardware interrupt for transmitting restrain signals between the first circuit breaker 102 and the second circuit breaker 104.
[0057] In an embodiment, whenever a fault occurs in the circuit, the circuit breakers 102/104 nearest to the fault can detect the fault.
[0058] In an embodiment, the ZSI system 100 can include a DSP controller to prioritize transmission of the restraint signals in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit. In an embodiment, the ZSI system 100 can include an OLED display module for displaying of all input metering parameters such as current, voltage, power and the like.
[0059] In an embodiment, the first circuit breaker 102 can detect an event indicative of any or a combination of an earth current fault (EF) and a short circuit (SC) current fault in said circuit.
[0060] In an embodiment, the first circuit breaker 102 can receive input restrain signals including any or a combination of GIN signals and SIN signals, then the first circuit breaker 102 can transmit restraint signals including any or combination of GOUT signals and SOUT signals to the second circuit breaker 104.
[0061] In an embodiment, any or a combination of GIN signals and SIN signals can be received by at least a first ZSI scheme 106 of the ZSI system 100. In an embodiment, the restrain signals can be transmitted to the second circuit breaker 104 by at least a second ZSI scheme 108 of the ZSI system 100.
[0062] In an embodiment, the first circuit breaker 102 can detect the fault and send high priority restraint signals to the DSP controller and the DSP controller can cease other processes in the circuit and acknowledge the received restraint signals for restraining tripping of the upstream breaker 104.
[0063] In an embodiment, the upstream breaker 104 can be connected in a same line as of the downstream circuit breaker 102 and can affect other processes in the circuit to completely halt and wait until a pre-defined delay interval expires while the downstream breaker 102 clear the fault. In an embodiment, the second circuit breaker 104 can maintain any or a combination of EF tripping delay and SC fault tripping delay in order to delay tripping of the second circuit breaker 104 in the event indicative of any or a combination of the EF and the SC fault detected by the first circuit breaker 102.
[0064] In an embodiment, the first circuit breaker 102 closer to the fault can ignore its preset short time and/or ground fault delays and clear the fault without any intentional delay.
[0065] In an embodiment, when restraint signals transmitted by the first circuit breaker 102 are not received by to the second circuit breaker 104, the second circuit breaker 104 is tripped instantaneously. In an embodiment, in case the second circuit breaker 104 is connected to one or more upstream circuit breakers, the second circuit breaker 104 transmits the restraint signals to at least one of the one or more upstream circuit breakers in order to delay tripping of the at least one of the one or more upstream circuit breakers in the event indicative of any or a combination of the EF and the SC fault in the second circuit breaker 104.
[0066] In an embodiment, the downstream breaker 102 can transmit the restrain signals to the upstream breaker 104 with high priority based on a software interrupt policy.
[0067] In an embodiment, the first circuit breaker 102 and the second circuit breaker 104 can communicate with each other so that a short circuit or ground fault in the electrical circuit can be isolated and cleared by the nearest circuit breaker without any intentional delay.
[0068] In an embodiment, the ZSI system 100 can eliminate any intentional delay in tripping of a circuit breaker without sacrificing coordination between the circuit breakers to provide for faster tripping times of the circuit breakers that limits fault stress by reducing the amount of let-through energy the system is subjected to during the faulty condition.
[0069] In an embodiment, the ZSI system 100 can notify a user with help of alarms such as audio/visual alarms or tactile alarms in case of tripping of any of the circuit breakers.
[0070] FIG. 2 illustrates an exemplary representation illustrating clearing of fault in an electrical circuit in accordance of embodiment of the present disclosure. In an aspect, the first circuit breaker 102 can be connected downstream to a second circuit breaker 104 for clearing the fault. In an embodiment, the circuit breakers 102 and 104 can communicate with each other by using hardware interrupt policies and software interrupt policies to enable high priority transmission of restrain signals between the first circuit breaker 102 and the second circuit breaker 104.
[0071] In an implementation, if a fault such as ground current fault, short circuit current fault and the like occur at point A, the first circuit breaker 102 detects the fault and sends a restrain signals to the second circuit breaker 104.
[0072] In an embodiment, the second circuit breaker 104 can receive the restrain signals in order to maintain any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker 104 in an event indicative of any or a combination of EF and SC fault in the circuit . In an embodiment, the first circuit breaker 102 can cleat the fault with no intentional delay.
[0073] In an implementation, if a fault occurs at point B, The second circuit breaker 104 detects the fault. In an embodiment, the second circuit breaker 104 maintains any or a combination of EF tripping delay and SC fault tripping delay to delay tripping of the second circuit breaker 104 in the event indicative of any or a combination of EF and SC fault in the first circuit breaker 102.
[0074] In an embodiment, when the restrain signals transmitted by the first circuit breaker 102 is not received by the second circuit breaker 104, the set time period delay of the second circuit breaker 104 is not taken into account and the second circuit breaker 104 trips instantaneously without any intentional delay in order to clear the fault in the circuit.
[0075] In an embodiment, if the second circuit breaker 104 is connected to further upstream breakers, then the second circuit breaker 104 sends a restrain signals to at least one upstream breaker. The upstream breaker maintains any or a combination of EF tripping delay and SC fault tripping delay to delay tripping of the upstream breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the second circuit breaker 104.
[0076] FIG. 3 illustrates an exemplary flowchart representation of proposed method for protecting an electrical circuit against a fault in the electrical circuit in accordance to an embodiment of the present disclosure. In an aspect, the method 300 for protecting the electrical circuit having at least a first circuit breaker arranged downstream of a second circuit breaker can include, at step 302, detecting an event indicative of any or a combination of an earth current fault and a short circuit current fault in the electrical circuit.
[0077] In an aspect, the method can further include, at step 304, transmitting restraint signals, from the first circuit breaker, to the second circuit breaker with high priority based on a software interrupt policy.
[0078] In an aspect, the method can further include, at step 306, tripping the first circuit breaker in the event indicative of any or a combination of the earth current fault and the short circuit current fault in the circuit.
[0079] In an embodiment, the method can further include a step of checking whether an interrupt based on any of SI restraint signals and GI restraint signals is detected.
[0080] In an embodiment, the second circuit breaker receives the restraint signals with the high priority based on a hardware interrupt policy. In an embodiment, the second circuit breaker maintains any or a combination of earth current fault tripping delay and short circuit current fault tripping delay to delay tripping of the second circuit breaker in an event indicative of any or a combination of the earth current fault and the short circuit current fault detected by said first circuit breaker. In an embodiment, when restraint signals transmitted by the first circuit breaker are not received by the second circuit breaker, the second circuit breaker is tripped instantaneously.
[0081] FIG. 4 illustrates an exemplary representation of implementation of proposed method for protecting the electrical circuit in accordance of embodiment of the present disclosure. In an aspect, the method 400 can include, at step 402, initializing various modules and peripherals of ZSI system associated with the electrical circuit.
[0082] In an embodiment, the method 400 can include, at step 404, initializing hardware interrupt for GIN/SIN input restrain signals and assigning GPIO pins to allow transmission of GOUT/SOUT restrain signals, from a downstream circuit breaker, to an upstream circuit breaker. In an embodiment, the restrain signals can be of any or a combination of earth current fault scheme and short circuit current fault scheme.
[0083] In an embodiment, the method 400 can include at step 406, initializing scheduling on of various tasks pertaining to clearing of a fault in the circuit by a scheduler. In an embodiment, a new task is added in the scheduler and the hardware interrupt based Interrupt Service Routine (ISR) is scheduled for monitoring or transmitting the restrain signals from the downstream circuit breaker to the upstream circuit breaker.
[0084] In an embodiment, the method 400 can include at step 408, displaying metering parameters such as current, voltage, power and the like on a display module, such as an OLED display module.
[0085] In an embodiment, the method 400 can include at step 410, detecting an event indicative of any or a combination of earth current fault and short circuit current fault in the circuit. In case, if the event indicative of the fault is not detected at step 410, then step 408 is again executed. However, if at step 410, an event indicative of the fault is detected, then at step 412, it is checked whether an interrupt based on any of SI restraint signals and GI restraint signals is detected. If at step 412, an interrupt is detected then step 408 is executed again. On the contrary, if at step 412, an interrupt is not detected, then at step 414, restraint signals are transmitted from the downstream circuit breaker to the upstream circuit breaker with high priority based on a software interrupt policy.
[0086] In an embodiment, the method 400 can include at step 416, transmitting trip command to an FSD. Thereafter, at step 418, the downstream circuit breaker is open to clear the fault. In an embodiment, after executing of step 418, step 408 is again executed and the method 400 proceeds further accordingly.
[0087] Without departing from the spirit and concept of the present invention, any variations and modifications to the embodiments should be within the apprehension of those with ordinary knowledge and skills in the art, and therefore fall in the scope of the present invention which is defined by the accompanied claims. Though the present invention has been described on the basis of some preferred embodiments, those skilled in the art should appreciate that those embodiments should by no means limit the scope of the present invention. Without departing from the spirit and concept of the present invention, any variations and modifications to the embodiments should be within the apprehension of those with ordinary knowledge and skills in the art, and therefore fall in the scope of the present invention which is defined by the accompanied claims.
[0088] Only certain features of the invention have been specifically illustrated and described herein, and many modifications and changes will occur to those skilled in the art. The invention is not restricted by the preferred embodiment described herein in the description. It is to be noted that the invention is explained by way of exemplary embodiment and is neither exhaustive nor limiting. Certain aspects of the invention that not been elaborated herein in the description are well understood by one skilled in the art. Also, the terms relating to singular form used herein in the description also include its plurality and vice versa, wherever applicable. Any relevant modification or variation, which is not described specifically in the specification are in fact to be construed of being well within the scope of the invention. The appended claims are intended to cover all such modifications and changes which fall within the spirit of the invention.
[0089] The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation.
[0090] It should be apparent to those skilled in the art that many more modifications besides those already described are possible without departing from the inventive concepts herein. Moreover, in interpreting both the specification and the claims, all terms should be interpreted in the broadest possible manner consistent with the context. In particular, the terms “comprises” and “comprising” should be interpreted as referring to elements, components, or steps in a non-exclusive manner, indicating that the referenced elements, components, or steps may be present, or utilized, or combined with other elements, components, or steps that are not expressly referenced. Where the specification claims refer to at least one of something selected from the group consisting of A, B, C ….and N, the text should be interpreted as requiring only one element from the group, not A plus N, or B plus N, etc. The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the scope of the appended claims.
[0091] While embodiments of the present disclosure have been illustrated and described, it will be clear that the disclosure is not limited to these embodiments only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the scope of the disclosure, as described in the claims.
[0092] In the description of the present specification, reference to the term "one embodiment," "an embodiments", "an example", "an instance", or "some examples" and the description is meant in connection with the embodiment or example described, the particular feature, structure, material, or characteristic included in the present invention, at least one embodiment or example. In the present specification, the term of the above schematic representation is not necessarily for the same embodiment or example. Furthermore, the particular features structures, materials, or characteristics described in any one or more embodiments or examples in proper manner. Moreover, those skilled in the art can be described in the specification of different embodiments or examples are joined and combinations thereof.
[0093] All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.
[0094] Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
[0095] The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
[0096] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

ADVANTAGES OF THE INVENTION
[0097] The present disclosure provides a method based on zone selective interlocking for circuit breakers to protect an electrical circuit.
[0098] The present disclosure provides a method based on zone selective interlocking for circuit breakers to isolate and clear a fault in an electrical circuit with no intentional delay.
[0099] The present disclosure provides a method based on zone selective interlocking to allow the circuit breakers to communicate with each other in order to reduce trip time and to clear a fault in an electrical circuit.
[00100] The present disclosure provides a method assisted by hardware interrupt for circuit breakers in order to reduce latency in signal transmission and processing.