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A Method For Short Circuit Fault Detection

Abstract: In the present invention, a method of short circuit detection is disclosed. The method comprising: generating, by means of a current sensor, derivative of input current signal as an output; integrating, by means of an integrator, said output to obtain integrated current signal; feeding said integrated current signal to a processing unit for measuring peak current; and comparing, by said processing unit, said measured peak current and a preset value of a threshold current (ITH), wherein a detection flag is raised when said peak current exceeds said preset value of a threshold current ; thereby issuing a trip signal to an electronic tripping unit. This method is capable of detecting the current level precisely even with capacitor switching and nonlinear loads

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
20 March 2017
Publication Number
13/2017
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
cal@patentindia.com
Parent Application
Patent Number
Legal Status
Grant Date
2022-07-12
Renewal Date

Applicants

LARSEN & TOUBRO LIMITED
L & T House, Ballard Estate, P.O. Box: 278, Mumbai Maharashtra, India 400 001

Inventors

1. PURANDARE, Kedar, Ravindra
Larsen & Toubro Limited SDDC L&T Business Park, 4th Floor, TC2 Tower B, Saki Vihar Road, Powai, Mumbai Maharashtra India 400072
2. GARG, Shaini
Larsen & Toubro Limited SDDC L&T Business Park, 4th Floor, TC2 Tower B, Saki Vihar Road, Powai, Mumbai Maharashtra India 400072
3. TANDON, Swati
Larsen & Toubro Limited SDDC L&T Business Park, 4th Floor, TC2 Tower B, Saki Vihar Road, Powai, Mumbai Maharashtra India 400072

Specification

Claims: A method for detection of short circuit, comprising:
generating, by means of a current sensor, derivative of input current signal as an output;
integrating, by means of an integrator, said output to obtain integrated current signal;
feeding said integrated current signal to a processing unit for measuring peak current; and comparing, by said processing unit, said measured peak current and a preset value of a threshold current (ITH), wherein a detection flag is raised when said peak current exceeds said preset value of a threshold current ; thereby
issuing a trip signal to an electronic tripping unit.

The method as claimed in claim 1, wherein said current sensor is a Rogowski coil.

The method as claimed in claim 1, wherein said current peak is measured by using a relation:

I_peak= v(P^2+Q^2 )

Wherein, P=Ip*cos?(?); Q=Ip*sin?(?).

The method as claimed in claims 1-3, wherein an input filter means adapted to perform high frequency filtering to reduce noises and errors at an input stage.

The method as claimed in claim4, wherein an analog to digital converter adapted to perform digitizing of said derivative of said input current signal filtered by said input filter, for further processing.

The method as claimed in claim 1, wherein said processing unit is adapted with regression module configured for measuring said peak current before said input current reaches to original peak.

The method as claimed in claims 1-6, wherein during said measured peak current exceeds said preset value of said threshold current, a counter value in said processing unit is incremented.

The method as claimed in claim 7, wherein said comparison continues till said counter value exceeds a final tripping threshold which is a preset threshold value.

A system for detection of short circuit, said system adapted to perform method as claimed in any one of claims 1-8.
, Description:TECHNICAL FIELD OF THE INVENTION

The present subject matter described herein, in general, relates to fault detection techniques, and more particularly, to a method for short circuit fault detection.

BACKGROUND OF THE INVENTION

Short circuit basically defined as “an abnormal connection (including an arc) of relatively low impedance, whether made accidentally or intentionally, between two points of different potential. In general, electrical systems and loads are stressed electro dynamically and thermally by short-circuit currents. The amount of stress is affected primarily by the amplitude of the short-circuit current and the time from short-circuit occurrence until switch off.

The best way to limit fault stress is to clear the fault in the shortest amount of time. Unfortunately, clearing the fault in the shortest amount of time could sacrifice coordination and lead to broader power outages. The best way to limit fault stress is to clear the fault in the shortest amount of time. Unfortunately, clearing the fault in the shortest amount of time could sacrifice coordination and lead to broader power outages. Zone-selective interlocking (ZSI) eliminates intentional delay, without sacrificing coordination, resulting in faster tripping times. This limits fault stress by reducing the amount of let-through energy the system is subjected to during an over-current. Early fault detection is a technique intended for short-circuit detection in micro second range.

For some existing fault detection techniques, reference is made to US6437576 which relates to a method for rapid detection of short circuits based on estimating the electrical characteristics of the short-circuit load and calculating the peak value of the current on the basis of N successive samples of the instantaneous current and its first derivative. This document relates to a method which can rapidly detect the initiating of short-circuit conditions in an electrical network. In addition to short circuit detection, simultaneous calculation of the short circuit power factor and of the phase of the voltage at the moment of short circuit is also possible and the detection time in milliseconds. However, high end filtering is required for current derivatives.

Further reference is made to US 0312505 A1, US6313639 B1 and US 6844 737 B2. The inventions are based on the root locus approach which involves the current and its first and second derivative or any two of them continuously and successively at the same time and are processed as a digital numerical sequence. The basic idea behind the method as disclosed in these patent documents is to plot root loci for determination of thresholds, also called ‘limit curves’. Detection is based on the numerical sequences crossing their respective limit curves the detection time in microsecond range. In these references, the involvement of the second derivative makes the method more sensitive to high frequency noise and harmonic interference in the current signal which will result in fault detection

Further, Reference is made to a non-patent document, Journal of Power and Energy Engineering, 2014, 2, 432-437, entitled ‘A new method for early short circuit detection’. The paper teaches detecting of the short circuit based on regression method which involves sequence of the current and it’s integral in time for determining the prospective current peak. Short circuit will be identified when estimated Current peak exceeds the preset threshold. This method is suitable only for sinusoidal signal at a given frequency for a resistive-inductive network.

Thus, in view of the existing methods of short circuit fault detection, there exists a dire need to provide a method of short circuit fault detection that recognizes the fault at an early stage.

SUMMARY OF THE INVENTION

The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the present invention. It is not intended to identify the key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concept of the invention in a simplified form as a prelude to a more detailed description of the invention presented later.

An object of the present invention is to provide a short circuit detection method that recognizes the fault at an early stage and gives a trip command to isolate the faulty system thereby eliminating the hazardous condition created by the fault.

Another object of the present invention is to provide a method of fault detection which is capable of estimating correct peak at the time of fault under various system configurations and with a variety of loads that may include machines with high inrush currents and the like.

Still another object of the present invention is to provide a method of fault detection which is based on regression mechanism by which current can be predicted before it actually reaches to its original peak.

Accordingly, in one aspect, the present invention provides a method for detection of short circuit comprising:
generating, by means of a current sensor, derivative of input current signal as an output;
integrating, by means of an integrator, said output to obtain integrated current signal; feeding said integrated current signal to a processing unit for measuring peak current; and comparing, by said processing unit, said measured peak current and a preset value of a threshold current (ITH), wherein a detection flag is raised when said peak current exceeds said preset value of a threshold current; thereby
issuing a trip signal to an electronic tripping unit.

In another aspect of the present invention there is provided a system for detection of short circuit adapted to perform the method as described herein above.
Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

The above and other aspects, features, and advantages of certain exemplary embodiments of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings in which:

Figure 1 illustrates the schematic diagram of the power system network consisting of RL load in short circuit, in accordance with the present invention.

Figure 2 shows the block diagram for carrying out the method for early short circuit detection in an electrical network, in accordance with an embodiment of the present invention.

Figure 3 illustrates a flow chart representation of the method for short circuit detection in accordance with an embodiment of the present invention.

Persons skilled in the art will appreciate that elements in the figures are illustrated for simplicity and clarity and may have not been drawn to scale. For example, the dimensions of some of the elements in the figure may be exaggerated relative to other elements to help to improve understanding of various exemplary embodiments of the present disclosure. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary.

Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.

The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.

It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise.

By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic was intended to provide.

Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments and/or in combination with or instead of the features of the other embodiments.

It should be emphasized that the term “comprises/comprising” when used in this specification is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

The present invention provides a method of short circuit detection in power systems that recognizes the fault at an early stage and gives a trip command to isolate the faulty system thereby eliminating the hazardous condition created by the fault. Unlike existing methods, the present invention is capable of detecting the current level precisely even before the current half cycle is completed which is required for RMS calculation.

The present invention includes detection of short circuit at early stage firstly to raise the Zone-selective interlocking (ZSI) flag followed by the trip signal, i.e., trip signal issued when predicted peak crosses the preset threshold for few successive samples wherein peak prediction is the determination of prospective current peak before it actually reaches its peak. This method is based on the regression technique that involve N successive samples of the current.

The following invention also offers improved ZSI coordinated distribution system to limit fault stress on the system by reducing the time it takes to clear the fault.

In one implementation, reference is made to figure 1, wherein a schematic diagram of the power system network consisting RL load (4) along with fault taking place at load side is shown. A circuit breaker is provided with an electronic tripping unit (2). The RL network (3) represents the line impedance which is responsible for the fault power factor The differential equations for switching-on process of the single-phase RL circuit at a given frequency ? can be derived from the equivalent circuit at a rated voltage (root mean square value) v as a function of the time t:
v=Ri+L di/dt
The above system equation can be solved for current which is given as:
i(t) = [?Ip*sin???(wt-f)cos?+Ip*cos?(wt-f)? sin?-?Ip*sin??(?-f).e^((-wt)/tanf) ]
As the short circuit power factor is considered to be 0.9 or higher power factor range, the above equation can be rewritten as:
[i(t)]= [ P Q S][¦(A@B@C)]

Where,
P=Ip*cos?(?) Q=Ip*sin?(?)S= ?-Ip*sin??(?-f)
And,
A=sin?(wt-f); B=cos?(wt-f); C=e^((-wt)/tanf)

In one implementation, reference is made to figure 2, which shows the block diagram for carrying out the method for early short circuit detection in an electrical network. A Rogowski coil (5) is preferably used as a current sensor that outputs derivative of current signal. The output signal from the Rogowski coil will be integrated by an integrator 6 to obtain the current signal (i(t)). Obtained signal sequence will then be fed to the processing unit (7) and the calculation of estimated peak is carried out and detection flag will be raised when the calculated peak exceeds the threshold. Flag raising will be preliminary information of the fault so the trip signal is issued when the condition is satisfied for N consecutive samples. The evaluation of current peak will be carried out within the processing unit (7) using the relation given by the following equation. And thereby the trip signal will be issued by the tripping unit (8).

I_peak= v(P^2+Q^2 )

In one implementation, reference is made to figure 3, which provides the flow chart of the present invention. The Rogowski coil will be used as current sensors which produce derivatives of current as the output. An input filter (9) can be adapted to reduce the noise/harmonics (which may lead to the nuisance tripping) at the input stage itself thus allowing use in particular in industrial power supply systems with loads fed from converters/inverters. The first derivative of the input current i, filtered in this way, will be digitized by an analog/digital (A/D) converter (10) for further processing, and integrated by numerical or digital integrator (11). High frequency filtering will be carried out prior to the digitizing process to compensate for the errors resulting from numerical integration.

In one implementation, the numerical sequences thus obtained can be fed to the input channels of the processing unit where estimated peak will be calculated with high processing controller using regression technique. Detection will be raised when estimated peak crosses the preset value ITH at first. Sampling will be carried out at a particular frequency to achieve the desired result. Every time the estimated current peak exceeds the set threshold the counter (12) will be incremented. The comparison process will continue till the counter value exceeds the final tripping threshold which can be a preset threshold value. Threshold for the current peak will be chosen such that the detection takes place when the estimated current peak exceeds the set threshold for at least N successive times to prevent the system from nuisance tripping which could arise in the case of any capacitor switching or transient occurring in the system.

Some of the important features of the present invention, considered to be noteworthy are mentioned below:
The present invention provides an improved ZSI coordinated distribution system to limit fault stress on the system by reducing the time it takes to clear the fault.
The method involves the regression approach by which current peak is predicted before it actually reaches to its original peak.
The present invention involves regression analysis on current transient equation to determine the current peak by taking N successive samples i(t) to give trip command.
The present invention provides a short circuit detection method through a separate analysis of the current, making it more reliable in short circuit detection. Unlike the prior art, the measured parameter is current which in turn eliminates the requirement of high end filtering which is required for current derivative.

Some of the non-limiting advantages of the present invention are mentioned below:
The present invention provides a method of fault detection which is capable of estimating correct peak time at the time of fault under various system configurations and with a variety of loads like high in rush currents etc.
The present invention provides a method of short circuit detection which is capable of detecting the current level precisely even before the current half cycle is completed which is required for RMS calculation.
In the present invention input filter means are adapted to perform high frequency filtering to reduce noises and errors at input stage.
The present invention provides a method of short circuit detection where the processing and calculation is much easier and faster as it processes a single current signal for peak prediction.
The method of fault detection of the present invention is capable of detecting the current level precisely even with capacitor switching and nonlinear loads

Although a method of short circuit detection have been described in language specific to structural features and/or methods, it is to be understood that the embodiments disclosed in the above section are not necessarily limited to the specific features or methods or devices described herein. Rather, the specific features are disclosed as examples of implementations of the method of short circuit detection that involves mathematical regression analysis on current transient equation to determine the current peak by taking N successive samples (t) to give trip command.

Documents

Application Documents

# Name Date
1 Power of Attorney [20-03-2017(online)].pdf 2017-03-20
2 Form 9 [20-03-2017(online)].pdf_168.pdf 2017-03-20
3 Form 9 [20-03-2017(online)].pdf 2017-03-20
4 Form 3 [20-03-2017(online)].pdf 2017-03-20
5 Form 18 [20-03-2017(online)].pdf_167.pdf 2017-03-20
6 Form 18 [20-03-2017(online)].pdf 2017-03-20
7 Drawing [20-03-2017(online)].pdf 2017-03-20
8 Description(Complete) [20-03-2017(online)].pdf_166.pdf 2017-03-20
9 Description(Complete) [20-03-2017(online)].pdf 2017-03-20
10 PROOF OF RIGHT [17-06-2017(online)].pdf 2017-06-17
11 PROOF OF RIGHT [04-07-2017(online)].pdf 2017-07-04
12 ABSTRACT 1.jpg 2018-08-11
13 201721009650-ORIGINAL UNDER RULE 6 (1A)-100717.pdf 2018-08-11
14 201721009650-FER.pdf 2020-07-27
15 201721009650-OTHERS [03-09-2020(online)].pdf 2020-09-03
16 201721009650-FER_SER_REPLY [03-09-2020(online)].pdf 2020-09-03
17 201721009650-CLAIMS [03-09-2020(online)].pdf 2020-09-03
18 201721009650-PA [18-01-2021(online)].pdf 2021-01-18
19 201721009650-ASSIGNMENT DOCUMENTS [18-01-2021(online)].pdf 2021-01-18
20 201721009650-8(i)-Substitution-Change Of Applicant - Form 6 [18-01-2021(online)].pdf 2021-01-18
21 201721009650-FORM-26 [04-08-2021(online)].pdf 2021-08-04
22 201721009650-Response to office action [14-06-2022(online)].pdf 2022-06-14
23 201721009650-PatentCertificate12-07-2022.pdf 2022-07-12
24 201721009650-IntimationOfGrant12-07-2022.pdf 2022-07-12
25 201721009650-FORM-27 [05-09-2024(online)].pdf 2024-09-05

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3 2020-07-2005-01-38E_20-07-2020.pdf

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