FIELD OF THE INVENTION:
The present disclosure relates generally to the field of automated test
equipment. More particularly, the present invention provides an apparatus for
the automated testing and validation of electronic controllers (EC) of
Electrostatic Precipitator (ESP). Further, the present invention relates to an
apparatus which can simulate ESP electrical operation for testing EC and can
generate test reports.
BACKGROUND OF THE INVENTION:
Electrostatic precipitation is one of the most effective processes to control air
pollution generated by industrial emissions. Electrostatic precipitator (ESP) is
an air pollution control device designed to electrically charge and collect
particulates generated from industrial processes such as those occurring in
power plants, cement plants, pulp and paper mills and utilities. ESP is divided
into a plurality of fields depending on the dust load. Each field is individually
powered / charged by a high voltage transformer rectifier set and the charging
is controlled through a feedback system by electronic controllers (ECs) which
also monitor the ESP field status for control action. During continuous
operation of an electrostatic precipitator, the dust collected on the electrodes is
removed by periodically rapping/hitting the electrodes with mechanical
hammers controlled by rapping motors. The rapping mechanism is critical to
ESP efficiency and so is controlled automatically by a controller or by the ESP
Power supply controller itself. ESP energisation can be done through a single
phase mains frequency silicon phase-controlled power supply or through a
three-phase power frequency silicon controlled rectifier power supply or
through Insulated Gate Bipolar Transistor {hereafter referred as IGBT)

controlled high frequency high voltage Switch Mode Power Supply (hereafter
referred as SMPS). All the three power supply systems for ESP has advantages
and disadvantages and the selection of power supply system varied. Each of
these systems have a control system for optimum operation and monitoring
and requires dedicated and custom controllers to cater to the specific control
and monitoring inputs and outputs of each of the power supply system for
ESP. Thus there are a variety of power supplies and associated ECs existing
for an ESP.
In a production centre, the ECs need to be tested and validated before
supplying to a site. System functional test, both hardware and
software/firmware associated, of all controllers need to be performed and
validated. In the prior art it is done using a simulator device which can
simulate ESP signals. The simulated inputs and outputs are generated
manually through mechanical keys and push-button switches by the operator.
The simulator device is different for different power supply methods. Here,
operator has to manually test each EC by means of the switches and keys
present on the simulator. The testing, verification and documentation are done
manually which is inaccurate and lacks precision.
Manufacturers, in the recent times, have developed automated test equipment
(ATE) to test and validate individual components as well as complete systems.
This increases the speed of testing as well as reliability. Conventional
automatic test equipment provides temporary electrical connections between
the component or unit under test and the measurement instruments within the
ATE. The ATE unit also provides space for unit under test-specific local
circuits, such as buffer amplifiers, load circuits, digital and analog inputs and
outputs etc. Therefore, ATE is an essential tool for debugging, developing and
validating the software/firmware.

In the prior arts, there exists ATEs for various electronic components, systems
etc. However, there is no special ATE for ESP ECs, A versatile ATE which can
simulate diverse signals and power supply for ESP application is not available.
The prior art for example: US20050229064A1, discloses an ATE for testing
electronic components. It has provision to generate digital signals only and
cannot perform a system level testing.
The prior art patents US20150378872A1 and US9213625B1 teaches about
ATE for testing software functionality and to detect change in software
program. It has provision to test software only and cannot perform a system
level testing.
The prior arts generally lack a versatile ATE for ESP ECs which can simulate
analog and digital inputs and outputs both automatically and manually. They
also lack in system level testing including both hardware and software
integrated system functional test and automatic test report generation.
The prior arts generally lack a ATE for ESP ECs which can simulate analog and
digital inputs and outputs both automatically and manually. The system also
lacks level testing including both hardware and software integrated system
functional test and automatic test report generation.
OBJECTS OF THE INVENTION:
It is therefore an object of the invention to provide a ATE for ESP EC which can
simulate all kind of power supplies used in ESP viz single phase mains
frequency silicon phase-controlled power supply, three-phase power frequency
silicon controlled rectifier power supply and Insulated Gate Bipolar Transistor
(hereafter referred as IGBT) controlled high frequency high voltage Switch Mode
Power Supply (hereafter referred as SMPS) to eliminate the need for separate
testing units for different power supply ECs.

Another object of the invention is to provide an ATE which can simulate the
alarm and status signals related to thyristors, IGBTs, high voltage transformer
rectifier set, EC panels etc and the ESP field current and voltage feedbacks
which are essential for verifying the functionality of various ESP ECs.
Another object of the invention is to provide an ATE which can simulate both
analog and digital inputs and outputs required for testing ESP ECs and can
also be configured to test any general I/O systems.
A still another object of the invention is to provide an ATE which has provision
for automated as well as manual operation and testing of ECs to avoid manual
errors in testing and reduce the testing time.
A still another object of the invention is to provide an ATE which has provision
for CMRR (common mode rejection ratio), Offset and Gain tuning of the op-amp
(operational-amplifier) circuits used in ESP ECs.
Yet another object of the invention is to provide an ATE which can test and
verify the EC's hardware as well as the firmware loaded into it.
A still further object of the invention is to provide a ATE which can act as an
ESP electrical simulator which can be used by the firmware developer to debug
and develop the firmware for ESP ECs.
A still further object of the invention is to provide an ATE with automatic test
report generation and test data logging feature.
SUMMARY OF THE INVENTION:
Accordingly, a modified ATE is provided capable of simulating all kind of power
supplies used in ESP viz., single phase mains frequency silicon phase-
controlled power supply, three-phase power frequency silicon controlled
rectifier power supply and IGBT controlled high frequency high voltage SMPS.
The modified ATE further comprises hardware and the associated software to
simulate the alarms and status signals related to thyristors, IGBTs, high

voltage transformer rectifier set, EC panels etc and the ESP field current and
voltage feedbacks which are essential for verifying the functionality of various
ESP ECs.
The modified ATE comprises hardware and the associated software with user
interface for testing and verifying ESP ECs both automatically and manually.
The modified ATE comprises hardware and the associated software to simulate
both analog and digital inputs and outputs required for testing ESP ECs and
which can also be configured to test any general I/O systems.
The modified ATE comprises provision for CMRR (common mode rejection
ratio), Offset and Gain tuning of the Op-Amp (operational-amplifier) circuits
used in ESP ECs.
The modified ATE comprises hardware and the associated software for
complete functional testing of ESP ECs.
The modified ATE further comprises a multi master protocol based CAN
communication network and RS-485 serial communication for communicating
with ECs.
The modified ATE also comprises Ethernet based communication protocol for
test data logging to a computer and for test report generation.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS:
It is to be noted, however, that the appended drawings illustrate only typical
embodiments of the present subject matter and are therefore not to be
considered for limiting of its scope, for the invention may admit to other equally
effective embodiments. The detailed description is described with reference to
the accompanying figures. In the figures, the left-most digit(s) of a reference
number identifies the figure in which the reference number first appears. The
same numbers are used throughout the figures to reference like features and
components. Some embodiments of system or methods in accordance with

embodiments of the present subject matter are now described, by way of
example, and with reference to the accompanying figures, in which:
Fig. 1 shows a block diagram of the ATE for ECs of ESP.
The figures depict embodiments of the present subject matter for the purposes
of illustration only. A person skilled in the art will easily recognize from the
following description that alternative embodiments of the structures and
methods illustrated herein may be employed without departing from the
principles of the disclosure described herein.
DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT OF THE
INVENTION:-
In Fig. 1, block [1] is the power supply unit for the ATE which provides required
voltages / power for all the circuits and peripheral devices,
In Fig. 1, block [5] is the central processor which executes the software
methods for simulating various signals and testing ESP ECs by the ATE. It has
provisions to take analog and digital signals as feedback signals. It has
provisions to give out control signals based on input signals. It has inbuilt
memory to store the program (control logic). It executes the software methods
to implement the automated testing of different ESP ECs. It has inbuilt CAN
communication module, RS485 module, RS232 module and an Ethernet
module for communicating with different ESP ECs. It processes and sends the
test data to external computer for logging and report generation through the
Ethernet interface. It reads commands from the user interfaces like keypad
switches, LCD and also displays system status through the LCD module.
In Fig. 1, block [2] is the linear power supply circuit which simulates main
frequency thyristor controlled ESP power supply for testing the ESP EC. It
consists of thyristors, firing circuits, contactors, ESP field current and voltage
feedback circuits etc.

In Fig. 1, block [3] is the SMPS section which simulates high frequency switch
mode power supply for ESP for testing ESP SMPS EC. It consist of rectifier,
IGBT based inverter, driver circuits, contactors, high frequency transformer,
ESP field current and voltage feedback circuits etc.
In Fig. 1, block [7] is the Digital I/O section. It has provisions to generate
digital inputs required for the ESP EC under test. Digital inputs generation is
controlled by the central controller [5] in automated testing and are controlled
through switches in the front facia in manual mode testing. It also has
provision to read the digital outputs generated by the ESP EC under test.
In Fig. 1, block [8] is the Analog I/O section. It has provisions to generate
analog signals (both voltage and current signals) required for the ESP EC under
test.
In Fig. 1, block [4] is an ethernet communication interface for connecting the
ATE with external computer for test data logging and test report generation.
ATE will send the test status and results to a standard computer through
Ethernet as TCP/IP packets.
In Fig. 1, block [6] is user interface comprising of keypad and LCD for providing
input commands to the ATE and display of system parameters. Selection of
particular modes for testing each type ESP EC is done through this module.
Switches for simulating signals in manual test mode are present in this block.
In Fig. 1, block [9] is the section consisting of terminal blocks and connectors
for interfacing various ESP EC modules with the ATE. Power supplies, signals,
communication lines etc. of ATE and ESP EC are connected through this block.

WE CLAIM:
1. A modified automated test equipment (ATE) system to validate
parameters of an electronic controllers (EC) for an electrostatic
precipitator (ESP), the said system comprising:
- a power supply unit (1);
- a linear power supply circuit (2) to simulate main frequency Thyristor
based linear power supply;
- a switch mode power supply (SMPS) (3) to simulate high frequency
switch-mode power supply.;
- a digital input/output unit (7) to generate digital input;
- a analog input / output unit (8) to generate analog signals;
- a central processor (5), configured to generate control signals based
on the analog and digital signals;
- interfacing means to communicate with an Ethernet communication
interface;
- peripheral devices (6) to provide input commands to the modified ATE
system;
wherein the system performs testing and verifies the electronic
controllers of an ESP manually and automatically.
2. The ATE as claimed in claim 1, for simulating alarms and status signals
of thyristors, IGBTs, high voltage transformer rectifier, EC panel, ESP
field current and voltage feedbacks and DC bus voltage and current of
SMPS system and CMRR (common mode rejection ratio), Offset and Gain
tuning of the op-amp (operational-amplifier) circuits used in ESP ECs.

3. The ATE as claimed in claim 1, to simulate both analog and digital
inputs and outputs required for testing ESP ECs and configured to test
any I/O systems.
4. The ATE as claimed in claim 1, wherein the central processor is provided
with in-built control program for automated testing and verification of
various ESP ECs.
5. The ATE as claimed in claim 1, comprising an interface for coupling
power supply, signals, communication channels of ATE and ESP EC,
under test.
6. The ATE as claimed in claim 1, comprising an interface for logging test
data and report generation to an external computer through ethernet
interface.
7. The ATE as claimed in claim 1, as illustrated in the accompanying
drawings.