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A Multichannel Frequency Reconfigurable Rf Receiver

Abstract: ABSTRACT “A MULTICHANNEL FREQUENCY RECONFIGURABLE RF RECEIVER” The present invention relates to a multichannel frequency reconfigurable RF receiver. In one embodiment, the receiver comprises at least one top deck structure comprising plurality of RF channels configured to receive plurality of RF frequency signals and convert the received RF signals to plurality of first intermediate frequency outputs using first mixer and signal1, at least one bottom deck structure configured to receive the converted to plurality of first intermediate frequency outputs and convert the received first intermediate frequency outputs to the plurality of second intermediate frequency outputs using second mixer and signal2, wherein the top deck structure and the bottom deck structure are coupled through vertical transitions which enables the RF receiver to be adaptable to all RF frequencies and configured to process the signals in a very high dynamic range. Figure 1 (for publication)

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
30 March 2023
Publication Number
40/2024
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

Bharat Electronics Limited
Outer Ring Road, Nagavara, Bangalore - 560045, Karnataka, India

Inventors

1. Priyanka Pai
RFMW/PDIC, Bharat Electronics Limited, Jalahalli P.O., Bangalore - 560013, Karnataka, India
2. Anirudh Kumar
RFMW/PDIC, Bharat Electronics Limited, Jalahalli P.O., Bangalore - 560013, Karnataka, India
3. Yachamaneni Sandeep
RFMW/PDIC, Bharat Electronics Limited, Jalahalli P.O., Bangalore - 560013, Karnataka, India
4. Ramprakasam
NS1/BG, Bharat Electronics Limited, Jalahalli P.O., Bangalore - 560013, Karnataka, India
5. Kavitha V
RFMW/PDIC, Bharat Electronics Limited, Jalahalli P.O., Bangalore - 560013, Karnataka, India

Specification

DESC:FORM 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See section 10, rule 13)

“A MULTICHANNEL FREQUENCY RECONFIGURABLE RF RECEIVER”

Bharat electronics limited

With address:
Outer ring road, nagavara, bangalore 560045, india

The following specification particularly describes the invention and the manner in which it is to be performed.
FIELD OF THE INVENTION
[0001] The present disclosure/invention relates in general to RF receiver and more particularly to a multichannel frequency reconfigurable RF receiver.
BACKGROUND OF THE INVENTION
[0002] Generally, receivers are well known in the art which is the basic building block of any radar or communication system. The receiver is designed to detect and amplify weak signals received by the antenna. Most of the receivers are super heterodyne receivers. These receivers generally used in the systems should have high dynamic range, high measurement accuracy.
[0003] Conventional receivers can have multiple channels. These channels should have a high dynamic range and the channels have to be phase and gain matched across channels over the entire dynamic range for better measurement accuracy. These receivers are developed using super heterodyne architecture. To detect very low-level inputs from the antenna, the receiver should have a front-end amplifier circuit which has a low noise figure. The received signal is then mixed with Signal 1 and Signal 2 resulting in double down converted intermediate frequency (IF). The receiver is a combination of amplifiers, mixers, attenuators and filters, integrated for miniaturizing and attaining the best response.
[0004] One of the prior art discloses a radar receiver. The radar receiver having amplitudes which may vary within a wide range of possible amplitudes are processed, an improved intermediate frequency and video frequency amplifier arrangement having a dynamic range corresponding to the range of possible amplitudes of the received signals.
[0005] Another prior art discloses a receiver with wide dynamic range. A monopulse receiver, wherein a desired wide dynamic range is achieved for range gated monopulse sum and difference signals, is shown to incorporate: (a) a multiplexer for time-multiplexing such signals (b) a first and a second receiver channel responsive to the time-multiplexed signals, each such channel having a dynamic range less than the desired wide dynamic range and greater than one-half the desired wide dynamic range, the gains in such channels being offset so that together such channels have the desired dynamic range (c) a first and a second sampler and analog-to-digital converter, respectively, responsive to the signals out of the first and the second receiver channel, for producing digital words indicative of the amplitude of each component signal in the time-multiplexed signals and (d) logic and control means for forming bytes from predetermined portions of each one of the digital words and for selecting the byte indicative of the amplitude of each component signal.
[0006] Another prior art discloses a flexible wideband radar receiver architecture with enhanced sensitivity, dynamic range, instantaneous bandwidth, and range window capability. A signal processing system including a plurality of receivers configured to receive a return signal from a transmitted radio frequency (RF) waveform. A mode control processor is configured to selectively and independently alter at least one characteristic of a signal down conversion process per formed by each receiver. A digital signal processor is configured to integrate the outputs of the plurality of receivers.
[0007] Further prior art discloses a modular multichannel receiver. This prior art receiver adopts direct digital synthesis (DDS) based phase shifting to achieve a phase resolution in sub-degree level.
[0008] Therefore, there is a need in the art with a multichannel frequency reconfigurable RF receiver to solve the above-mentioned limitations.
SUMMARY OF THE INVENTION

[0009] An aspect of the present invention is to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below.
[0010] Accordingly, in one aspect of the present invention relates to a multichannel frequency reconfigurable RF receiver. The RF receiver comprising: at least one top deck structure comprising plurality of RF channels configured to receive plurality of RF frequency signals and convert the received RF signals to plurality of first intermediate frequency outputs using first mixer and signal1 splitter, at least one bottom deck structure configured to receive the converted to plurality of first intermediate frequency outputs and convert the received first intermediate frequency outputs to the plurality of second intermediate frequency outputs using second mixer and signal2 splitter, wherein the top deck structure and the bottom deck structure are coupled through vertical transitions which enables the RF receiver to be adaptable to all RF frequencies and configured to process the signals in a very high dynamic range.
[0011] Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.
BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
[0012] The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and modules.
[0013] Figure 1 shows an internal block diagram of RF receiver channel (identical for both CH1 and CH2) according to an exemplary implementation of the present disclosure/ invention.
[0014] Figure 2 shows a measured results of high gain channel for various input level according to an exemplary implementation of the present disclosure/ invention.
[0015] Figure 3 shows a measured results of low gain channel for various input levels according to an exemplary implementation of the present disclosure/ invention.
[0016] Figure 4 shows a measured results of gain difference between high gain and low gain channels according to an exemplary implementation of the present disclosure/ invention.
[0017] Figure 5 shows a top deck structure of the RF receiver according to an exemplary implementation of the present disclosure/ invention.
[0018] Figure 6 shows a bottom deck structure of the RF receiver according to an exemplary implementation of the present disclosure/ invention.
[0019] Figure 7 shows a gain matching of low gain CH1 and CH2 after gain setting according to an exemplary implementation of the present disclosure/ invention.
[0020] Figure 8 shows a gain matching of high gain CH1 and CH2 after gain setting according to an exemplary implementation of the present disclosure/ invention.
[0021] Figure 9 shows a phase matching of CH1 and CH2 after phase setting according to an exemplary implementation of the present disclosure/ invention.
[0022] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative methods embodying the principles of the present disclosure. Similarly, it will be appreciated that any flow charts, flow diagrams, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.
DETAILED DESCRIPTION OF THE INVENTION

[0023] The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.
[0024] The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.
[0025] It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces.
[0026] By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic was intended to provide.
[0027] Figures discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way that would limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged communications system. The terms used to describe various embodiments are exemplary. It should be understood that these are provided to merely aid the understanding of the description, and that their use and definitions in no way limit the scope of the invention. Terms first, second, and the like are used to differentiate between objects having the same terminology and are in no way intended to represent a chronological order, unless where explicitly stated otherwise. A set is defined as a non-empty set including at least one element.
[0028] In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the present disclosure. It will be apparent, however, to one skilled in the art that the present disclosure may be practiced without these details. One skilled in the art will recognize that embodiments of the present disclosure, some of which are described below, may be incorporated into a number of systems.
[0029] However, the systems and methods are not limited to the specific embodiments described herein. Further, structures and devices shown in the figures are illustrative of exemplary embodiments of the presently disclosure and are meant to avoid obscuring of the presently disclosure.
[0030] It should be noted that the description merely illustrates the principles of the present invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described herein, embody the principles of the present invention. Furthermore, all examples recited herein are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the invention and the concepts contributed by the inventor to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
[0031] The various embodiments of the present disclosure/invention describe a multi-channel frequency reconfigurable RF receiver with high dynamic range.
[0032] In one embodiment, the RF receiver has at least two receive channels, where each receive channel (i.e., CH1 and CH2) is split into high gain channel and low gain channel outputs to achieve improved high dynamic range. Each receive channel is split through a device to provide high gain and low gain outputs. The high gain channel is used to detect the minimum detectable signal of a dynamic range and the low gain channel is used to detect a maximum level of the wide dynamic range. The gain difference of the two channels is maintained at G3 with minimum variation so that there is a smooth transition in measurement for the entire dynamic range.
[0033] In one embodiment, the present invention “RF receiver” comprises of multiple channels split into high and low gain channels for achieving high dynamic range. The RF receiver consists of at least two deck approach (i.e., Top deck and bottom deck) with vertical transition for compactness and the approach provides better isolation between channels. The receiver is configured with an attenuator and phase shifters controlled by microcontroller through Ethernet, thus achieving total programmability in phase and gain matching.
[0034] The present invention has a unique design/construction of RF receiver including RF to IF paths to achieve compactness without degradation in the performance.
[0035] The present invention consists of a unique multi deck approach where the high and low frequency sections are organized in separate decks for better isolation between the receiver channels. Further, the present invention RF receiver uses high resolution serial peripheral interface-based attenuators and phase shifters for high accurate phase and gain matching between channels.
[0036] The present invention has a unique design/construction of receiver structure that allows the flow of different frequency signals between top deck structure and bottom deck structure through vertical transitions to minimize the interface connections.
[0037] The present invention RF receiver consists of an inbuilt microcontroller circuitry for controlling and monitoring receiver through Ethernet thereby providing on the go gain and phase matching facility during receiver operation without disturbing receiver hardware.
[0038] In one embodiment, the present invention describes designing multichannel receiver by splitting each receiver channel into high gain and low gain channel outputs through a coupler and an attenuator to achieve an improved high dynamic range. The gain difference between the high gain and low gain channels and linearity in output power is maintained so that during processing high gain and low gain channels a smooth transition between channels is achieved. The present invention also describes a unique mechanical design structure of the RF receiver, containing the top deck structure where at least four identical RF channels are converted into at least four IF1 outputs using signal1 splitter/section and the bottom deck structure where at least four identical IF1 channels are converted into at least four IF2 channels using signal2 splitter/section. The interconnection between the top deck structure and bottom deck structure is through a vertical transition. This enables the Rx to be adaptable to any RF frequencies. Hence achieving miniaturization through minimum interfaces. A migration of receiver to any frequency bands can be done by only changing the RF and Signal1 section which is in the top deck structure. Hence, allowing the bottom deck structure to be the same.
[0039] The present invention receiver also uses high resolution serial peripheral interface-based attenuators and phase shifters for high accurate phase and gain matching between channels across frequency and power levels. An inbuilt microcontroller circuitry for controlling and monitoring receiver through Ethernet thereby providing on the go gain and phase matching facility during receiver operation without disturbing receiver hardware.
[0040] Figure 1 shows an internal block diagram of receiver channel (identical for both CH1 and CH2) according to an exemplary implementation of the present disclosure/ invention.
[0041] The figure shows an internal block diagram of compact, programmable multi-channel frequency reconfigurable RF receiver channel (identical for both CH1 and CH2). The figure shows an internal block diagram of compact, programmable multi-channel frequency reconfigurable RF receiver channel (identical for both CH1 and CH2). The compact multichannel RF receiver contains at least two identical receiver channels i.e., CH1 & CH2. The internal block details of each channel are shown in figure 1. In order to achieve a very high dynamic range, each receiver channel is designed with 2 different gains channels (Block 10, 11). The initial section of each receive channel is developed in order to maintain a good noise figure and cater for a high-power reflection (Block 12). Following this section, the receive channel gain is split into two gain channels using a coupler (Block 13) and an attenuator (Block 14). These channels are called high gain channel (Block 10) and low gain channel (Block 11). The main path output of the coupler is called the high gain channel (Block 10). This channel gives a total gain of G1±?1dB. The coupled path output with an attenuator is called the low gain channel (Block 11). This channel provides a total gain of G2±?2dB with minimum variation. The gain difference between the two channels is maintained at G3±?dB (G3 = G1-G2).
[0042] In one embodiment, the present invention provides a multichannel frequency reconfigurable RF receiver. The RF receiver comprising: at least one top deck structure comprising plurality of RF channels configured to receive plurality of RF frequency signals and convert the received RF signals to plurality of first intermediate frequency outputs using first mixer and signal1 splitter, at least one bottom deck structure configured to receive the converted to plurality of first intermediate frequency outputs and convert the received first intermediate frequency outputs to the plurality of second intermediate frequency outputs using second mixer and signal2 splitter, wherein the top deck structure and the bottom deck structure are coupled through vertical transitions which enables the RF receiver to be adaptable to all RF frequencies and configured to process the signals in a very high dynamic range.
[0043] The RF channels are configured to receive RF signals and each RF channel is configured to split into at least two different gain channels (10, 11), where the two different gain channels include at least one high gain channel (10) and at least one low gain channel (11). The high gain channel (10) is configured to process high power signals in the top deck structure and the low gain channel (11) is configured to process low power level signals in the bottom deck structure, where the high frequency section and low frequency section is positioned in separate deck for better isolation between the receiver channels.
[0044] Each RF channel is split into high gain channel (10) and low gain channel (11) using at least one coupler (13) and at least one attenuator (14), where through path output of coupler (13) is high gain channel (10) and provides a total gain of G1±?1dB and the coupled path output with the attenuator (14) is low gain channel (11) provides a total gain of G2±?2dB with minimum variation, the gain difference between the channels is maintained at G3±?dB (G3 = G1-G2).
[0045] The high gain channel amplifies the signals (L1 to L2) in the range of IF2 intermediate power level (L3) to maximum linear power detected by ADC-1 (L4), the ADC-1 processes signals from high gain channel. The low gain channel amplifies input receive level from RF intermediate power level (L5) to maximum input RF power level (L6) to a range of IF2 intermediate power level (L7) to maximum linear power detected by ADC-2 (L8), the ADC-2 processes signals from low gain channel.
[0046] In one embodiment, the top deck structure of the receiver further comprises an inbuilt microcontroller circuitry which controls phase shifters and attenuators though serial peripheral interface for high accurate phase and gain matching between channels across frequency and power levels and further comprises an ethernet interface thereby providing adaptive gain and phase setting facility during receiver operation.
[0047] The high gain channel detects the minimum detectable signal of a dynamic range, and the low gain channel detects a maximum level of the wide dynamic range. The receiver admits flow of different RF frequency signals between top deck structure and bottom deck structure through vertical transitions to minimize the interface connections.
[0048] Figure 2 shows a measured results of high gain channel for various input level according to an exemplary implementation of the present disclosure/ invention.
[0049] The figure shows/represents the measured results of high gain channel for various input level. Each receive channel gives a very high dynamic range. When the RF signal having a power level from minimum RF detectible level (L1) to RF intermediate RF power level (L2) enters the receiver channel. The high gain channel amplifies the signal in the range of IF2 intermediate power level (L3) to maximum linear power detected by ADC-1 (L4). Hence this channel amplifies the RF input signal in the range of L1 to L2 to IF2 output level range L3 to L4.
[0050] Figure 3 shows a measured results of low gain channel for various input levels according to an exemplary implementation of the present disclosure/ invention.
[0051] The figure shows a measured results of low gain channel for various input levels. The RF input levels higher than L2 input will saturate the ADC-1. Input receive level from RF intermediate power level (L5) to maximum input RF power level (L6) will be amplified by the low gain channel to a range of IF2 intermediate power level (L7) to maximum linear power detected by ADC-2 (L8). Hence this channel amplifies the RF input signal in the range of L5 to L6 to IF2 output level range L7 to L8. Hence ADC-1 processes signals from high gain channel and ADC-2 processes signals from low gain channel.
[0052] Figure 4 shows a measured results of gain difference between high gain and low gain channels according to an exemplary implementation of the present disclosure/ invention.
[0053] The figure shows the measured results of gain difference between high gain and low gain channels. The figure represents measured results of gain difference between two channels for various input levels from L9 dBm to L10 dBm. Input levels from L9 dBm to L10 dBm are considered as buffer level processing as these levels can be processed by both ADC-1 and ADC-2. To avoid processing mismatch in these levels and achieve smooth transition between ADC-1 and ADC-2, gain difference is maintained at G3±?dB between the channels.
[0054] Figure 5 shows a top deck structure of the RF receiver according to an exemplary implementation of the present disclosure/ invention.
[0055] The figure shows the top deck structure of the RF receiver. The RF multichannel receiver contains at least two receive input channels i.e., CH1 and CH2. Each of these receive channels are split into at least two output channels i.e., High Gain channel and Low Gain channel. Hence there are at least four RF identical output channels which are double down converted to IF frequency for further processing. A unique design/construction structure is implemented to double down convert at least four such RF identical channels to IF using signal1 splitter/section and signal2 splitter/section respectively.
[0056] The design structure is divided into at least two halves, called top deck structure (Block 15) and bottom deck structure (bock 16) (Fig 6). The (Block 15) where the high frequency section is kept in top deck and low frequency section is kept in bottom deck (Fig6) to achieve the better isolation between the channels.
[0057] In one embodiment, the top deck structure has at least two sections called RF section (Block 16a, 16b, 16c) and signal 1 section (Block 17a, 17b). There are at least four identical RF sections (Block 16c). The RF section starts from one side and travels towards the mixer’s RF input port, whereas signal 1 starts from opposite side, splits equally and travels towards the mixer’s Signal1 input port (Block 17a, 17b).
[0058] As the RF channels (Block 16c) are identical, phase and gain matching between the receive channels are achieved by design. The residual phase difference is adjusted using the phase shifter. The output of the mixer is called the first IF signal (IF1 output) and is passed to the bottom deck (block 16) through an RF vertical transition which is achieved through a simple RF vertical transition and RF connectors.
[0059] Figure 6 shows a bottom deck structure of the RF receiver according to an exemplary implementation of the present disclosure/ invention.
[0060] The figure shows the bottom deck structure (block 16) of the RF receiver. Like the top deck structure, the bottom deck structure receives the IF1 signal. This bottom deck contains at least two sections, IF section (Block 19) and Signal2 section (Block 20). In one embodiment, at least four identical IF sections are used for at least four output channels. As the IF channels are identical, phase and gain matching between the receive channels are achieved by design. The IF1 input received from top deck is amplified and filtered before reaching the IF input port of second mixer. The Signal 2 required for the mixer is split equally and travels towards the Signal2 input port of the mixer in the same plane. The output of the mixer is called the second IF signal (IF2 output) which is then amplified and filtered. This output is the final IF output used for further processing the signal.
[0061] This unique design receiver structure uses minimum interface connection. In the top deck structure, interface between Signal 1 and mixer is through a drop in isolator which serves both as interface and gives isolation between channels. The only interface connection is between top deck and bottom deck through a vertical transition. In the bottom deck structure, the interface between the IF1 and Signal 2 is through a joint which just connects the traces of Signal 2 distribution to Signal 2 input of IF1 section. Hence achieving miniaturization through minimum interfaces.
[0062] A migration of receiver to any frequency bands can be done by only changing the RF and Signal 1 section which is in the top deck structure. Hence allowing the bottom deck structure to be same.
[0063] For accurate measurements of the receiver, the receiver should be linear for the entire dynamic range. Any amplitude error for the entire dynamic range will cause false measurement. Also, for the ADCs to process the accurate information across all the 4 channels should be phase matched.
[0064] For a known frequency of signal which is transmitted, the gain accuracy and the phase accuracy between channels has to be matched for the entire dynamic range. During the receiver operation, the gain and phase setting can be provided. During the receiver operation, the gain and phase setting can be provided.
[0065] The RF multichannel receiver features a phase shifter with an accuracy of ??phase and an attenuator with an accuracy of ?dB attenuation. This is used for high accurate phase and gain matching between channels. These phase shifters and attenuators are placed at IF1 section of all the channels where there is little bandwidth.
[0066] The RF multichannel receiver contains an inbuilt microcontroller circuitry which controls these phase shifters and attenuators though serial peripheral interface. This microcontroller also features an Ethernet interface thereby providing adaptive gain and phase setting facility during receiver operation.
[0067] Before its operation the phase errors between the channels are captured for different frequency of transmission and using the phase shifter the phase errors are minimized. These phase shift values obtained for each frequency of transmission is loaded into the receiver through Ethernet interface during receiver operation. Figure 9 shows the phase matching of CH1 and CH2 after phase settings. This programmability feature in receiver provides on the go phase matching between channels for any frequency during its operation without disturbing any hardware.
[0068] Similar to phase matching, before its operation the gain errors between the channels are captured for different frequency of transmission and using the attenuator the errors are minimized. These attenuator values obtained for each frequency of transmission are loaded into the receiver through Ethernet interface during receiver operation. Figure 7 shows the gain matching of Low gain CH1 and CH2 after gain settings. Figure 8 shows the gain matching of High gain CH1 and CH2 after gain settings. This programmability feature in the receiver provides on the go gain matching between channels for any frequency across power levels during its operation without disturbing any hardware.
[0069] The various embodiments described above are specific examples of a single broader invention. Any modifications, alterations or the equivalents of the above-mentioned embodiments pertain to the same invention as long as they are not falling beyond the scope of the invention as defined by the appended claims. It will be apparent to a person skilled in the art that the multichannel frequency reconfigurable RF receiver may be provided using some or many of the above-mentioned features or components without departing from the scope of the invention. It will be also apparent to a skilled person that the embodiments described above are specific examples of a single broader invention which may have greater scope than any of the singular descriptions taught. There may be many alterations made in the invention without departing from the spirit and scope of the invention.
[0070] Figures are merely representational and are not drawn to scale. Certain portions thereof may be exaggerated, while others may be minimized. Figures illustrate various embodiments of the invention that can be understood and appropriately carried out by those of ordinary skill in the art.
[0071] In the foregoing detailed description of embodiments of the invention, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the invention require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the detailed description of embodiments of the invention, with each claim standing on its own as a separate embodiment.
[0072] It is understood that the above description is intended to be illustrative, and not restrictive. It is intended to cover all alternatives, modifications and equivalents as may be included within the spirit and scope of the invention as defined in the appended claims. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein,” respectively.
,CLAIMS:We Claim:
1. A multichannel frequency reconfigurable RF receiver, the RF receiver comprising:
at least one top deck structure comprising plurality of RF channels configured to receive plurality of RF frequency signals and convert the received RF signals to plurality of first intermediate frequency outputs using first mixer and signal1;
at least one bottom deck structure configured to receive the converted to plurality of first intermediate frequency outputs and convert the received first intermediate frequency outputs to the plurality of second intermediate frequency outputs using second mixer and signal2;
wherein the top deck structure and the bottom deck structure are coupled through vertical transitions which enables the RF receiver to be adaptable to all RF frequencies and configured to process the signals in a very high dynamic range.

2. The receiver as claimed in claim 1, wherein the RF channels are configured to receive RF signals and each RF channel is configured to split into at least two different gain channels (10, 11), where the two different gain channels include at least one high gain channel (10) and at least one low gain channel (11).

3. The receiver as claimed in claim 1, wherein the high gain channel (10) is configured to process high power level signals in the top deck structure and the low gain channel (11) is configured to process low power level signals in the bottom deck structure, where the high frequency section and low frequency section is positioned in separate deck for better isolation between the receiver channels.

4. The receiver as claimed in claim 1, wherein each RF channel is split into high gain channel (10) and low gain channel (11) using at least one coupler (13) and at least one attenuator (14), where through path output of coupler (13) is high gain channel (10) and provides a total gain of G1±?1dB and the coupled path output with the attenuator (14) is low gain channel (11) provides a total gain of G2±?2dB with minimum variation, the gain difference between the channels is maintained at G3±?dB (G3 = G1-G2).

5. The receiver as claimed in claim 1, wherein the high gain channel amplifies the signals (L1 to L2) in the range of IF2 intermediate power level (L3) to maximum linear power detected by ADC-1 (L4), the ADC-1 processes signals from high gain channel.

6. The receiver as claimed in claim 1, wherein the low gain channel amplifies input receive level from RF intermediate power level (L5) to maximum input RF power level (L6) to a range of IF2 intermediate power level (L7) to maximum linear power detected by ADC-2 (L8), the ADC-2 processes signals from low gain channel.

7. The receiver as claimed in claim 1, wherein the top deck structure of the receiver further comprises an inbuilt microcontroller circuitry which controls phase shifters and attenuators though serial peripheral interface for high accurate phase and gain matching between channels across frequency and power levels and further comprises an ethernet interface thereby providing adaptive gain and phase setting facility during receiver operation.

8. The receiver as claimed in claim 1, wherein the high gain channel detects minimum detectable signal of a dynamic range, and the low gain channel detects a maximum level of the wide dynamic range.

9. The receiver as claimed in claim 1, wherein the receiver admits flow of different RF frequency signals between top deck structure and bottom deck structure through vertical transitions to minimize the interface connections.

10. The receiver as claimed in claim 1, wherein the attenuator is a high-resolution serial peripheral interface-based attenuator and plurality of phase shifters configured for high accurate phase and gain matching between channels.
Dated this 30th day of March, 2023
For BHARAT ELECTRONICS LIMITED
(By their Agent)

D. MANOJ KUMAR (IN/PA-2110)
KRISHNA & SAURASTRI ASSOCIATES LLP

Documents

Application Documents

# Name Date
1 202341023955-PROVISIONAL SPECIFICATION [30-03-2023(online)].pdf 2023-03-30
2 202341023955-PROOF OF RIGHT [30-03-2023(online)].pdf 2023-03-30
3 202341023955-FORM 1 [30-03-2023(online)].pdf 2023-03-30
4 202341023955-DRAWINGS [30-03-2023(online)].pdf 2023-03-30
5 202341023955-Correspondence_Form1_19-04-2023.pdf 2023-04-19
6 202341023955-FORM-26 [16-06-2023(online)].pdf 2023-06-16
7 202341023955-FORM 3 [28-03-2024(online)].pdf 2024-03-28
8 202341023955-ENDORSEMENT BY INVENTORS [28-03-2024(online)].pdf 2024-03-28
9 202341023955-DRAWING [28-03-2024(online)].pdf 2024-03-28
10 202341023955-CORRESPONDENCE-OTHERS [28-03-2024(online)].pdf 2024-03-28
11 202341023955-COMPLETE SPECIFICATION [28-03-2024(online)].pdf 2024-03-28
12 202341023955-POA [29-10-2024(online)].pdf 2024-10-29
13 202341023955-FORM 13 [29-10-2024(online)].pdf 2024-10-29
14 202341023955-AMENDED DOCUMENTS [29-10-2024(online)].pdf 2024-10-29