FIELD OF INVENTION
The present invention generally relates to test equipment for mega power plant
or various industrial processes and specifically relates to a test equipment for
test and validation of SOE (Sequence of Event) recording capability of DCS
(Distributed Control System), of mega power plants or various industrial
processes.
BACKGROUND OF THE INVENTION
Control and automation of power plant and various industrial processes is being
done using distributed control systems.
The processes involved are complex with multiple closed-loop control logics
getting executed simultaneously. Overall control process has large number of
signals / parameters (called as I/Os).
Any malfunction in the process or tripping of the plant results in status change of
many digital signals in a very short span of time (few seconds). These signals
are captured and recorded by the DCS in their chronological order of occurrence.
Simultaneously occurrences if any are recorded; as and when the event takes
place. This capability of DCS is known as "Sequence of Event" recording.
To analyze the cause of malfunction or trip, it is absolutely necessary that the
DCS records events in the correct chronology. For this to happen, two signals
occurring as close as just one millisecond apart, need to be distinctly recorded.
To test and validate this important capability of DCS, an equipment is required to
simulate a 'worst trip condition' where all the digital signals generated are one
millisecond apart.
A typical 500 MW power plant control system has nearly 600 SOE enabled digital
signals. To test the SOE recording capability of DCS in their same order of
occurrence and with correct time stamping, a minimum of 20 % digital input
signals are to be triggered, captured and analyzed. Hence a minimum of 120
channels are needed. The pulse-generators or function-generators available in
the market are not having more that 8 channels.
The pulse generator available in the market has independent channels. Hence
time synchronization, with one millisecond delay between triggering of adjacent
channels, is not possible. Due to this, the most important aspect of the testing
i.e. a resolution of one millisecond in time stamping is not possible.
The rising and falling edges of the pulses should be of the order of nano-seconds
so as to avoid any overlapping, which could result in same time stamping of 2
adjacent signals.
With all the control panels interconnected on the fast Ethernet during the
integrated testing, to simulate the running-plant load condition, it is necessary
that the new invention is capable of repeatedly triggering the SOE or other
signals.
To verify the time synchronization of all the control processors in the system, the
invention should be capable of triggering all the channels simultaneously so that
all connected signals are recorded with the same time stamping.
This application is related to following U.S. patent applications:
1. US Patent No. 6067648 is related to the invention "A digital
programmable delay which provides a series of pulses that are
programmed in both pulse latency and trigger latency to control the
operation of a memory module test system".
The above invention is for pulse series witli programmable-delay on a single
channel.
2. US Patent No. 5087835 is related to the invention "positive edge
triggered synchronized pulse generator".
The above invention is for pulse generator, with single asynchronous channel,
capable of generating an output pulse which is synchronized to an internal
clock pulse.
3. US Patent No. 6173424 is related to the invention "programmable pulse
generator and method for using same".
The above invention is for a programmable pulse generator with upto 3
output channels for generating pulses having programmable voltage levels
(varying pulse amplitude).
4. European Patent No. CN1117669 (A) is related to the invention "multi-
channel synchronous magnetic pulse generator".
The pulse generator has 10 channel pulse outputs with 10 numbers
synchronous accuracy and total 100 KJ magnetic pulse energy. Each channel
works independently and outputs 10 KJ energy. The pulse energy can be
adjusted by the control of working voltage and the number of output
channels.
There are significant difference between the above patents and present
invention. The present invention is to satisfy the requirement of multiple
(min 128) synchronized channels, programmable pulse width, dual mode of
operation (mono-shot and sequential), external programmable trigger source
for auto trigger and optical switching.
SUMMARY OF THE INVENTION
The main object of the invention is related to a multi-channel pulse generation
having 128 channels. Each adjacent pulse will have a time gap of one
millisecond. Due to its modular construction it can be expanded upto 256
channels by inserting additional cards (each card is having 32 channels).
There is a perfect synchronization between the channels.
There are two modes of operations: 'Sequential' and 'Mono-Shot'.
> In sequential mode the channels trigger as a pulse-train with one
millisecond delay between adjacent channels.
> In mono-shot mode all the channels trigger simultaneously.
Channel are provided with optical-switches so as to achieve very fast pulse rise
and fall time. Hence the adjacent channel overlapping is negligible.
For 'continuous triggering' in either mode (apart from the manual-trigger), there
is a variable frequency trigger pulse output available which can be looped to the
external trigger input of the equipment.
The pulse-width on each channel is adjustable from 1 to 1000 millisecond.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
The invention can now be described in detail with the help of the figures of the
accompanying drawings in which
Figure 1 shows functional block diagram of multi-channel pulse generator.
Figure 2 shows the schematic diagram of integral mother board.
Figure 3 shows the schematic diagram of interface board.
Figure 4 shows schematic diagram of 32 channels pulse generation board.
Figure 5 shows the output of 128 channels captured
in sequential mode of operation.
Figure 6 shows the output of 128 channels captured
in mono-shot mode of operation.
Figures 7a and 7b show the interface connectivity and test setup
of a typical DCS with pulse generator equipment.
DETAILED DESCRIPTION OF THE PREFERRED
EMBODIMENT OF THE INVENTION
The invention will now be described in an exemplary embodiment as depicted in
the accompanying drawings. There can however be other embodiments of the
same invention, all of which are deemed covered by this description.
Multi-channel pulse generator: an overall function block diagram of multi-
channel pulse generator is illustrated in Figure 1. As shown therein, the multi-
channel pulse generator (1) consists of high speed embedded system (2) and
microprocessor based pulse generator hardware modules (3). The application
code for SOE simulation is loaded into flash of embedded system to generate
optically isolated output pulses. The channel outputs are connected to digital
input cards of the DCS. Triggering the output of this equipment simulates 128
events at 1 millisecond gap between adjacent events which are captured by the
DI cards of the DCS and time-stamped in the same chronological order of their
occurrences.
It operates in dual modes: 'Sequential' and 'Mono-shot'. In sequential mode, the
channels trigger as a pulse-train with one millisecond delay between adjacent
channels. In mono-shot mode all the channels trigger simultaneously. Both the
modes can be further operated either manually or automatically through external
trigger signal. In manual mode, the output triggers once on manually pressing
the push-button. In auto mode, the output triggers continuously as per the
trigger-pulse fed externally. A trigger source with programmable variable
frequency is provided on the equipment itself that can be looped to the trigger
input for continuous auto-triggering.
The invention comprises three hardware modules as explained below.
1. Integral mother board (4)
2. Interface board (5)
3. 32 channels pulse generation board (6)
Integral mother board: Mother board is designed to integrate both interface
module and 32 channels pulse generation boards through address, data and
control bus. The entire signal paths are shielded to prevent noise interference.
The routings of all signals are shown in the schematic diagram of Figure 2.
Interface board: The interface board is double EURO size board having dual
'64 pins EURO connectors' referred to as "Jl" and "J2". The Jl connector links
the system bus that carries the ADDRESS, DATA and CONTROL LINES to / from
the embedded controller through their respective buffers. The clock signal from
1 MHZ crystal is given to the clock input of the 82c54 timer chip. The chip
selects are derived from the decoders to select the respective timers. In the
interface card, U6 IC is used (two independent 16-bit timers are cascaded in
series to obtain 32-bit counter) to generate a minimum frequency of 2 Hz and
this in turn is used for calibration of multi-channel pulse generation equipment.
The U5 IC is used to generate 1 KHz signal square wave and is being connected
to INTO pin of micro controller to execute 1 millisecond interrupt software. The
schematic diagram of interface board is shown in Figure 3.
32 channels pulse generation board: The pulse generation board is a
double EURO size four layer board having dual '64 pins EURO connectors"
referred to as "Jl" and "J2". The Jl connector links to the system bus that
carries the ADDRESS, DATA and CONTROL LINES to / from the mother board.
The 32 outputs of the opto-isolators are connected to the module through the J2
connector.
The pulse generation board is used to generate 32 channels output pulses. The
desired pulse width can be generated through software program. The card can
be used as a mono-shot mode or sequential mode. In mono-shot mode all the
32 timers are triggered at a time t=0 to generates 32 pulses of desired pulse
width. Where as in sequential mode of operation, all the timers are triggered
sequentially with adjacent channels, having a fixed delay of 1 millisecond of
desired pulse width. The schematic diagram of 32 channels pulse generation
board is shown in Figure 4.
The pulse generation board consists of:
Timers (82C54): Used to generate required pulse width either in mono-shot
mode or sequential mode based on the selection of menu.
Buffers (74LS244, 74I_S245): used for buffering the address, data and control
bus.
Decoders (74LS138): Used to generate the chip selects for timers.
Opto-isolators (4N35): Used for interfacing the output pulses to the digital input
cards of DCS.
Features of 32 channel pulse generation board:
In this card all the timers are triggered in mono shot or sequential mode to
generate the required pulse width right from 1 millisecond to 1 second of 5V
magnitude. These timers are programmed by using dynamic C software to get
the desired pulse width. All these 32 channels triggered pulses are interfaced to
DCS of input modules through OPTO couplers. There is a perfect
synchronization between the channels.
There are two modes of operations: 'Sequential' and 'Mono-shot'.
> In sequential mode (7) the channels trigger as a pulse-train with one
millisecond delay between adjacent channels as shown in Figure 5.
> In mono-shot mode (8) all the channels trigger simultaneously as shown
in Figure 6.
Each channel is provided with optical-switches so as to achieve very fast pulse
rise time and fall time. Hence the adjacent channel overlapping is negligible.
The above hardware modules are assembled and integrated in a suitable
enclosure.
Using 30 meter interface cables, the channels are hooked to the digital input of
the DCS package, spread over various "distributed processing units" (DPS).
Equipment is triggered in both the modes and the simulated EVENTS are
captured on the DCS. Results are found to be exactly in line with the equipment
are shown in Figures 7a and 7b.
The main features of the equipment are:
1. 128 output channels, expandable up to 256.
2. Two modes of operations, selectable by toggle switch.
• Sequential having EXACTLY 1 millisecond delay between the pulses
on adjacent channels. Pulse delay displayed on a seven segment
display in terms of "millisecond".
• Mono-shot in which all channels should triggered simultaneously.
3. Pulse rise time is 100-500 nano-seconds.
4. The pulse width is a programmable between 1 millisecond to 1 second.
Seven segment VFD display provided to display pulse width.
5. The pulse can be interfaced to a digital input card of any DCS.
6. Housed in a portable cabinet.
7. Modular construction comprising pluggable I/O cards having 32 channels
each.
8. Systems have facility for power on calibration and self check.
9. Final outputs terminated at the back using suitable industrial connectors,
wherein all 32 channels of a card are brought out in a single 64 pins male
counterpart of the lockable connector pairs.
10.Two triggers: One manual push button and the other as an input (BNC
Type) wherein an external signal can be coupled.
11. A build-in square wave source with adjustable frequency (2 KHz to 2 Hz)
and 5 V DC for continuous triggering through external trigger input.
Output is through a BNC type connector and a seven segment VFD display
is provided to set and monitor output frequency.
12. Input supply to the unit is single phase 240 V AC 50 Hz. Suitable fans are
provided for cooling the unit. -----------------------------------------------------;
WE CLAIM
1. A multi-channel output pulse generator (1) equipment for test and
validation of SOE (sequence of events) recording capability of DCS
(distributed control system) of a mega power plant or various industrial
process control system comprising:
- high speed embedded system (2);
- microprocessor based hardware modules (3);
characterized in that the pulse generator has multiple (min 128) synchronized
channel with programmable pulse width, dual mode of operation and external
programmable trigger source for auto trigger and optical switching.
2. The pulse generator as claimed in claim 1 generates output pulses which
are synchronized.
3. The multiple output channels as claimed in claim 1 are expandable.
4. The dual mode of operation as claimed in claim 1 are selectable by toggle
switch.
5. The dual mode of operation as claimed in claim 1 may be sequential (7)
having exactly one millisecond delay between the pulses on adjacent
channel or mono shot (8) in which channel can be triggered
simultaneously.
6. The pulse generator as claimed in claim 1 generates pulses whose rise
time is 100 to 500 nano seconds.
7. The pulse generator as claimed in claim 1 generates pulse width on
synchronized channels which is programmable within a range of 1
millisecond to 1000 milliseconds.
8. The pulse width as claimed in claim 1 can be displayed on seven segment
VFD display provided with pulse width.
9. The pulse generator as claimed in claim 1 generates pulses that can be
interfaced to a digital output card of any DCS (distributed control system).
10. The pulse generator as claimed in claim 1 has modular construction
comprising pluggable I/O cards having 32 channels each.
11. The pulse generator with dual mode (3) of operation as claimed In claim 1
can be operated manually or automatically.
12. The manual mode of operation of pulse generation as claimed in claim 11
the output triggers once on manually pressing the push button.
13. The automatic mode of operation of pulse generation as claimed in claim
11, the output triggers continuously as per trigger-pulse fed externally.
14. The pulse generator as claimed in claim 1 is provided with trigger source
with programmable variable frequency that can be looped to the trigger
input for continuous auto-triggering.
15.The output channel of the pulse generator as claimed in claim 1 are
provided with optical switches so as to achieve very fast pulse rise and fall
time making the possibilities of adjacent channel overlapping negligible.
16. The microprocessor based hardware module (3) of the pulse generator as
claimed in claim 1 comprises:
- integral mother board (4)
- interface board (5)
- 32 channels pulse generation board (6)
17. The integral mother board as claimed in claim 16 integrates both interface
module and 32 channel pulse generation board through address, data and
control bus and the signal paths are shielded to prevent noise interface.
18. The interface board as claimed in claim 16 is a double EURO sized board
having dual connector referred as "Jl" and "J2".
19. The 32 channels pulse generator board as claimed in claim 16 is double
EURO size four layer board having dual "64" pins EURO connector referred
as "Jl" and "J2" of which Jl links to system bus that carries the Address,
Data, and control lines to / and from the mother board.
20. The pulse generation board as claimed in claim 16 generates 32 channels
output pulses and the desired output pulses can be generated through
software programme.
21.The pulse generation board as claimed in claim 16 can work on mono-shot
mode or sequential mode wherein in mono-shot mode all the 32 timers
are triggered at a time to generate 32 pulses of desired width and in case
sequential mode of operation all the times are triggered sequentially with
adjacent channels having fixed delay of 1 millisecond.
22.The pulse generation board as claimed in claim 16 consists of timers used
to generate required pulse width either in mono shot mode or sequential
mode.
23. The pulse generation board as claimed in claim 16 consists of buffers for
buffering the address, data and control bus.
24. The pulse generation board as claimed in claim 16 consists of opto-
isolators for interfacing the output pulses to the digital input card of DCS.
25. A multi-channel output pulse generator (1) equipment for test and
validation of SOE (sequence of events) recording capability of DCS
(distributed control system) of a typical mega power plant or industrial
process control system, substantially as herein described and illustrated in
the figures of the accompanying drawings.

The invention relates to a multi-channel output pulse generator (1) equipment
for test and validation of SOE (sequence of events) recording capability of DCS
(distributed control system) of a typical mega power plant and industrial
processes control system comprising: high speed embedded system (2);
microprocessor based hardware modules (3); characterized in that the pulse
generator (6) has multiple (min 128) synchronized channel with programmable
pulse width, dual mode of operation (7, 8) and external programmable trigger
source for auto trigger and optical switching.