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A Process Of Making Ceramic Tile

Abstract: The present invention relates to a process of making an antistatic ceramic tile with only an antistatic top coating which dissipates the static charges away from surface of tiles laid on a normal floor surface. The novel process comprises of preparation of electrically conducting powder by heat treating intimately mixed oxides from the group of and not limited to lanthanum oxide, tungsten oxide, rare earth oxide doped zirconium oxide, bismuth oxide, iron oxide, antimony oxide and tin oxide at a temperature of 6500C to 9500C, which is further mixed with glaze raw materials to obtain a glaze slip and application of the same on ceramic tile, which is then vitrified at temperature range of 11000C to 12500C depending on the nature of the ceramic tile body and intermediate glaze coating characteristics. The present invention also describes how the electrically active powder can be industrially prepared by treating the mixed oxide raw materials in normal room temperature process.

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Patent Information

Application #
Filing Date
11 November 2020
Publication Number
41/2022
Publication Type
INA
Invention Field
METALLURGY
Status
Email
info@worldwideintellec.com
Parent Application
Patent Number
Legal Status
Grant Date
2024-12-16
Renewal Date

Applicants

Orient Bell Limited
8, Industrial Area, Sikandrabad 203205, UP, India

Inventors

1. SAMANTA Maharshi
8, Industrial Area, Sikandrabad 203205, UP, India
2. GUPTA Arpit
8, Industrial Area, Sikandrabad 203205, UP, India
3. GARG Anil
8, Industrial Area, Sikandrabad 203205, UP, India
4. VINOTHAN R.
8, Industrial Area, Sikandrabad 203205, UP, India
5. PAL Jagdish
8, Industrial Area, Sikandrabad 203205, UP, India
6. GUPTA Sanjeev
8, Industrial Area, Sikandrabad 203205, UP, India
7. AGARWAL Anil
8, Industrial Area, Sikandrabad 203205, UP, India

Specification

FIELD OF THE INVENTION
The present invention described herein relates to a process of making an antistatic ceramic tile with only an antistatic top coating
More particularly, the present invention provides a process of making an antistatic ceramic tile and a laying process thereof which dissipates the static charges away from surface of tiles laid on a floor surface with the help of interconnected copper wire and semi-conducting grout filled in the gaps between tiles.
BACKGROUND OF THE INVENTION
The world is growing through a process of permanent change in the way we work, be it work from site office or from home. With the increased requirement for the personal health, hygiene, online activities and related data security, all the nations are experiencing a surge in demand for highly specialized medical diagnostic and clinical centers for assuring a round the clock health checkup ; and data centers for large scale data warehousing server locations. These sophisticated medical centers and data warehouses contain highly sensitive semiconductor based instruments and equipment which are susceptible to generation and dissipation of static electric charges that occur due to human movement in the vicinity of those equipment. It is a fact that walking on the carpeted floor can generate a static charge in excess of 30,000 V and can damage many sensitive instruments around. The presence of static charge is familiar to most people because they can feel, hear, and even see the spark as the excess charge is neutralized when brought close to an electrical conductor such as a conducting path to earth, or a region with an higher or lower charge concentration of the opposite polarity such as positive or negative.
The static electric charges, both positive and negative ones that get generated due to relative movement of the touching surfaces float free and travel to all connected spaces without any hindrance and interact with integrated circuits and in turn damage

the normal working of those. The degree of generation of the static electricity depends on multiple factors and increases with use of fundamentally insulating flooring and wall surfaces coupled with low temperature and low humidity conditions originating more due to the round the clock operating air-conditioners and use of alcohol based cleaning solutions.
It has been proved with certainty that if the flooring surfaces have surface electrical resistivity in a particular range, the surfaces can get rid of the floating positive and negative static charges through appropriately designed interconnected electrical earthing design. These surfaces are called electrically antistatic. It is also established that if the surface electrical resistivity range of the surfaces is greater than kilo ohm per square (>103 Q/Sq) and lesser than giga ohm per square (109 Q/Sq), the surfaces can effectively get rid of the floating charges. In this connection, it is also observed that if the surface resistivity value is in the range of 103 Q/Sq to 106 Q/Sq, the surface can dispose of the static charges faster than the surfaces with resistivity value in the range of 106 Q/Sq to 109 Q/Sq, Accordingly, the surfaces with surface electrical resistivity in the range of 103 Q/Sq to 106 Q/Sq are called Antistatic Conductive surfaces and the surfaces with surface electrical resistivity in the range of 106 Q/Sq to 109 Q/Sq are called Antistatic Dissipative surfaces. These surfaces can be used according to the application depending on the generated surface charge density and their requirement for a time dependent discharge.
Various types of ceramic tiles are used in many applications due to their inherent functional properties such as high crushing and flexural strength, high abrasion resistance together with easy and fast application and availability of zillions of design possibilities. The surface electrical resistivity of ceramic tiles generally vary in the range of 1010 Q/Sq to 1014 Q/Sq which makes them fully insulating and thus rendering those unusable for any antistatic application. Therefore, in order to make use of the functional benefits of ceramic tiles for laying in antistatic applications, the

surface electrical resistivity must be reduced to achieve a value of lesser than 109 Q/Sq, preferable in the range of 107 Q/Sq to 108 Q/Sq for being anti-static dissipative and 104 Q/Sq to 105 Q/Sq for being antistatic conductive,
Therefore, an object of the present invention is to provide a ceramic tile with a surface resistivity lesser than 109 Q/Sq, preferable in the range of 107 Q/Sq to 108 Q/Sq for being anti-static dissipative and surface resistivity lesser than 106 Q/Sq, preferable in the range of 104 Q/Sq to 105 Q/Sq for being antistatic conductive.
The above-mentioned information in the background section is only intended to enhance the understanding of the reader with respect to the field to which the present invention pertains. Therefore, unless explicitly stated otherwise, any of the features or aspects discussed above should not be construed as prior art merely because of its inclusion in this section.
There are different reports available for antistatic flooring in patent literatures published worldwide and are available in public domain. There are many different types of flooring solutions to address the antistatic property requirements. These include conducting rubber based flooring tiles, conducting vinyl rubber based polymeric tiles, and graphite impregnated composite tiles. However, these types of flooring come with their inherent limitations such as very low operational life after laying owing to very low surface abrasion resistance, dust accumulation owing to availability of micro pores, permanent mark left from moved furniture owing to its softness etc. beside walking noise generated on a vinyl floors that creates a disturbances for the people working who requires a firm concentration. Therefore, there is a justified desire for using a ceramic tiles for flooring purposes. In the public domain, there are a few references available for antistatic ceramic tiles, and bricks. The most relevant documents are analyzed here for their usefulness and limitations.

In the patent CN101463645A an antistatic ceramic tile and method of producing the same is described. The document details about a process of dispersing semi conducting tin antimony particles with a density of 1-4 / cm2 at a 1:2, 1:3, and 1:4 weight mixing ratio with the ceramic raw material for the tile blank, wherein these particles are dispersed in the top surface of the ceramic tile blank and a semiconducting glaze is used to cover semi-conducting particles that impregnate tile blank. Here the impregnated semiconducting particles are discrete and do not have any continuity for any electrical connectivity. The ceramic tile blank is totally resistive and therefore, these discrete and dispersed semiconducting particles are sandwiched between one top covering glaze in one side and one insulating tile blank on the other side. Therefore, theses semiconducting dispersed particles do not serve any purpose in aid to the antistatic property of the tile. The ceramic tiles are burnt at temperature range of 1180 C to 1230C for a duration of 15 minutes. The duration of 15 minutes of burning at this high temperature of 1180C to 1230C yields a very deformed and warped tile for use in any practical purpose and therefore, it is not a feasible manufacturing process. The document also does not disclose any mixing ratio of the tin and antimony metal powder thus rendering it impossible for any person to reproduce any tangible results. Moreover, for the purpose of laying of ceramic tiles on application area, the document does not give any solution as to how the surface charge will be collected and transported through the entire floor surface and discharged from the application area for it being functionally antistatic.
Another patent document, Indian Patent 251411 discloses a process of manufacturing an antistatic tile by first preparing electrically conducting powder using 80 - 90 % tin oxide and 10 - 20% antimony, more specifically and actually with 90% tin oxide and 10% antimony and firing it at a temperature of 1000C to 1300C, and then milling the melt to powder of particle size 0.3 micron to 10 micron. This conducting powder was then mixed with glaze raw materials containing quartz, frits, alumina, zircosil or feldspar to prepare a slip that is applied as a coating on the tile surface and fired again

at 1000 C to 1300 C by applying a pressure of 350kg / cm2 .This patent also discloses of providing a depression at the corner of the tile for eventual interconnection of the multiple tiles laid on floor through a resin bonding from the depressed corner area. The laying process of the tile, as explained in the drawing therein, explains that after the tiles are laid, resing to be filled in the common depression are formed at the corner junction of the four tile and must be cured and polised off the excess and smoothened for final use. After carefully analyzing the process detailed in the disclosure and taking laboratory trials, and applying Maj Brogniart's formula it is found that the glaze slip with a density of 1.9 g/cc to 2.05 g/cc, as mentioned in the patent will contain approximately 20% water. Now if this slip contains conductive powder in the range of 20 to 70 % of its total weight, then actually the glaze slip contains 25% to 86% of conductive powder on dry basis. The addition of 86% active high melting oxide powder to the slip will make it simply unusable for any practical Bell application (as claimed) in industrial manufacturing practice. Rather it seems that it is misleading any person skilled in the art. Moreover, at this kind of high percentage addition, the thermal expansion coefficient of the resulting glaze will be highly different, in this case much higher comapred to that of the ceramic base body and will result in fine crazing crack across all the glazed surfaces in addition to resultant concave upward face of fired tile. This crack will generate Griffith flaws that weaken the strength of the tile in mid to long term of usage rendering it unusable and asking for replacement. Also, these fine cracks will pose serious problems for dust adhesion and stain removal. Moreover, the small depression with straight oblique direction at the corners of the tile will not allow sufficient conductive path for the accumulated surface charge to get grounded, thus making the very purpose defeated. The attached flow chart of process shows filling resin till the embossed corners of tile while laying. This step of having an embossed corner contradicts the earlier step claiming to have a depression on the tile tends to mislead the general practitioner.

Another document EP 92830195.5 discloses a process for the manufacture of antistatic ceramic tiles with low water absorption. The document essentially discloses a process of mixing a range of ratios of antimony and tin oxide into the ceramic body raw material. Here the mixture of the antimony oxide, tin oxide, iron oxide, copper oxide, zinc oxide, silver oxide, aluminum oxide and lead oxide is first ground and then calcined at a temperature in excess of 1200C. A more preferable mix is disclosed as 85% tin oxide and 15% antimony oxide and this mixed material is added into the ceramic raw material body composition at not less than 5%. Advantageous mix ratio is disclosed as 25%, 30% and 35%. The ceramic tile body thus obtained is fired at a temperature greater than 1200C. With the water absorption in the range of 2%, this product will attract dust and stains while in use and will attract impurities that will stick to the antistatic top surface which will be rendered non-antistatic after some time in use.
Another patent document US 3,658,583 discloses a method for processing semi-conductive glaze compositions for electrical insulators. Here a process is disclosed wherein calcining a mixture of 85 - 94 mol percent, calculated as tin oxide and 33 -15 mol percent, calculated as antimony oxide at a temperature of 1,000 - 1,300 C under an oxidizing atmosphere; mixing 25 - 45 percent by weight of the calcined material with 55 - 75 percent by weight of a conventional ceramic glaze composition; melting the resulting mixture at a temperature of 1200C to 1400 C under an oxidizing atmosphere and pulverizing the melt to prepare a fritted material; and mixing again not less than 70 percent by weight of the resulting fritted material with not more than 30 percent by weight of at least one member selected from the group consisting of clay minerals. Here in this context, it is to be noted that, the melting point of tin oxide and antimony oxide is 1630C and 656C respectively. The eutectic melting temperature of a range of compositions on tin and antimony oxides are in the range of 1000C to 1400C. Therefore, essentially the cited document discloses a process of melting and fritting the tin oxide and antimony oxide admixture at a very high

temperature and using it to mix with other raw materials to make a glaze fit for application on electrical insulators.
Another patent document PCT/US2006/002401 discloses a method of manufacturing tin oxide based ceramic resistors. In this document, tin oxide and antimony oxide are mixed in various molar ratios and heated at temperatures from 1150C to 1350C to get the desired resistivity as applicable to ceramic resistors. It is also reported that the mix can also be fired at different temperatures to achieve a wide range of resistivity, though the final product becomes humidity sensitive and brittle in nature with substantially high bulk porosity. The firing durations are in the range of 30 minute to 60 minutes.
Yet another patent document, CN105064638A discloses an antistatic ceramic tile and manufacturing method thereof. Here the ceramic tile is made of an antistatic blank layer, an antistatic enamel layer, a surface decorating layer. The antistatic blank layer is composed of an antistatic bottom layer and a tile blank top layer. On which the antistatic enamel layer is formed. This document discloses a process of sticking a conductive adhesive tape for the antistatic ceramic tile to realize whole-body conduction. The distinctive feature of this process is that it uses an antistatic bottom layer and an adhesive tape to connect the antistatic top layer of the ceramic tile to the common earthing connections. As detailed, the process is very cumbersome as there are two antistatic layers in a tile, one in the body of the tile and another in the glaze layer of the tile and it uses an adhesive tape which is by no definition a permanent solution. Moreover, ceramic tiles fixed in this process will not be sound and will lose interfacial contacts when subjected to repeated use.
Yet another patent document, CN103739207A discloses a manufacturing method of microcrystalline glass ceramic composite brick panel with antistatic glass layer. This reveals of a process of making antistatic glass frit at a temperature of 1200C to 1600C

with particle size max 4 mesh (4.76mm), grinding the same and spraying this at a mass ratio of 24% to 50% with the help of adhesive and rolling with a pressing roller for fixing and firing in a kiln at a temperature of 1200~ 1250 °C for a duration of 60 minutes to 120 minutes. To achieve the product, the process uses conductive inorganic compounds such as barium titanate, lead titanate, conductive tin oxide, conductive zinc oxide and conductive titanium oxide. The salient feature of this patent is preparing a conductive glass frit at temperature of 1200C to 1600C using some conductive metal oxide powders and applying on a brick.
In view of the above mentioned products and processes disclosed in the patent documents, the features disclosed and the limitations therein, it is an object of the present invention to disclose a simpler process of industrially manufacturing an antistatic active compound first and then applying it on a non-antistatic ceramic tile substrate to produce a dust-free and stain-free antistatic ceramic tile with only an antistatic top coating and providing a design solution to aid to connecting the array of tiles to dissipate the static charges away from surface of tiles laid on a normal floor surface.
OBJECTS OF THE INVENTION
The main object of the present invention is to provide a manufacturing process of making an antistatic ceramic tile comprising of heating of solid state mixed and sintered though not melted mixed oxide compound that includes inter alia insulating stannic oxide, insulating antimony penta-oxide, insulating zinc oxide and insulating lanthanum oxide, and insulating tungsten oxide, and one rare-earth-oxide, stabilized zirconium oxide at a temperature range of 650C to 950C.
Another object of the present invention is to provide a process of manufacturing an antistatic ceramic tile comprising of preparing of active material from a mixture of

mixed oxide compounds including insulating stannic oxide, insulating antimony oxide, insulating zinc oxide and insulating lanthanum oxide and insulating bismuth oxide and insulating tungsten oxide, and one rare-earth-oxide which are intimately mixed in a specified process to allow the solid state reactions to occur at room temperature, such as 15C to 45C.
Another object of the present invention is to provide a process of making an antistatic ceramic tile which is dust-free and stain-free at working surface with ultra-low body water absorption property.
Another object of the present invention is to single fire the ceramic glaze at temperatures in the range of 950-1225 C with the help of suitable frit composition.
Further another object of the present invention is to provide a process of making an antistatic ceramic tile for a better dry adherence and final fired adherence of the antistatic glaze coatings to the tile body surface, which offers not only an improved life of the antistatic coating owing to the higher abrasion resistance but also an increased potentiality of static charge dissipation owing to the achieved higher coating density both at surface and at volume.
Yet another object of the present invention is to provide a process of making an antistatic ceramic tile that aid in dissipating the static charges for small sized tiles to even for very large format ceramic tiles with sizes in excess of 600 x 600mm, 800mm x 800mm, 1200mm x 1200mm, 1200mm x 2400mm and so on.
Still another object of the present invention is to provide a process of making an antistatic ceramic tile which does not require a conductive tape for necessary inter-tile connectivity for antistatic charge dissipation.

Yet another object of the present invention is to provide a process of manufacturing large format antistatic ceramic tiles where no depression will be required on anyone corners of the ceramic tiles in order to avoid any aesthetic challenge posed by the corner depression after laying of the tile.
Yet another object of the present invention is to provide a manufacturing process and composition of the bi component grout composition that can be used for laying the ceramic tiles with possible minimum gaps between tiles.
Yet another object of the present invention is to provide a homogeneous trough along all the edges of the tile in order to apply grout evenly so that after laying of the tiles, the tiled surface appears to be very evenly designed and does not pose any visual challenge.
These and other objects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following detailed description. It should be understood, however, that the following descriptions, while indicating preferred embodiments and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications.
SUMMARY OF THE INVENTION:
The present invention discloses a process of making an antistatic ceramic tile with only an antistatic top coating which dissipates the static charges away from surface of tiles laid on a normal floor surface. The process further defines the preparation of electrically conducting powder by firing raw materials from the group of and not limited to lanthanum oxide, tungsten oxide and their derivatives, rare earth oxide doped zirconium oxide, bismuth oxide, copper oxide, iron oxide, antimony oxide and

tin oxide with particle size range of average 30-40 micron at a temperature range of 650C to 950 C, which is after proper washing mixed with other glaze raw materials to obtain a glaze slip and application of the same on ceramic tile, which is then fired at temperature of 1150 C to 1250 C depending on the nature of the ceramic tile body and intermediate glaze coating characteristics.
The present invention also discloses a co-firing process of manufacturing antistatic ceramic tiles where the active oxide components for antistatic property realization are homogeneously intermixed in a novel milling process in presence of another crystal-bridging oxide material, are not heat treated or calcined before and the whole active powders in a particular typical composition are mixed with ceramic glaze materials and applied on the preglazed tiles, co-fired along with the final tile vitrification, thereby removing one prior heat-treatment or firing step in the manufacturing process.
The present invention also discloses a process of making an modified antistatic ceramic tile which can be readily used as a custom flooring units for a raised access flooring application.
DESCRIPTION OF INVENTION
The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the detailed following description. Descriptions of well-known components and processing techniques are omitted so as not to unnecessarily obscure the embodiments herein.
A process of making ceramic tile is defined herein. The process comprising of the steps of

a) preparing electrically conducting powder by pre-sintering by firing oxides of lanthanum, tungsten, , bismuth, iron, copper, antimony, tin, and rare earth oxide doped zirconium oxide at a temperature of 650C to 1200 C,
b) preparing antistatic precursor powder by custom milling and mixing oxides of lanthanum, tungsten, rare earth oxide doped zirconium oxide, bismuth, iron , antimony and tin at a room temperature and washing and drying said resultant mix,
c) quenching the electrically conductive powder of step a) with excess cold air blast to sufficiently quick cool and thereby restore the resulting doped metal oxide phase;
d) milling the said conducting powder of step c) into a particle size of 45 micron to 60 micron followed by its washing with alcohol and subsequent drying;
e) milling of glaze raw materials along with the milled conducting powder of step b) and d) to obtain a glaze slip of desired rheological property such as slip density and slip viscosity;
f) applying of an intermediate glaze layer of suitable composition that matches the thermal expansion co-efficient of tile substrate after the tile is dried suitably, post forming and shaping at pressing stage or extrusion stage;
g) applying the semi-conductive powder mixed glaze slip of step d) and e) over the said ceramic tile of step f) for adequate surface covering;
h) drying the said resultant two layer glaze slip coated ceramic tile and firing it at temperature of 1150 C to 1250 C depending on the nature of the ceramic tile body and intermediate glaze coating characteristics;
i) Rectifying the edges of the tile and squaring the said tile as required for flawless orthogonal laying, applying a conductive resin based grout that holds the tile in place and carries the surface static charges away from the tile surface using an inter connected mesh of grounded conducting copper wire which are suitably placed along the gaps between the tiles and/or below the tiles and soldered at the wire crossing junctions at the gaps available at the

corners between the tiles and or aluminum bus bars or wires placed underneath the ceramic tiles.
The present invention describes more in detail the manufacturing of anti static vitrified ceramic tiles which can have surface electrical conductivity in the range of 10A3 ohm/square to 10A6 ohm/square for being in anti static conductive range and in the the range of 10A6 ohm/square to 10A9 ohm/square for being in anti static dissipative range.
The desired range of properties are achieved through carefully mixing the constituent oxides of selected metals in definite composition and processing those individually as oxide mixtures and applying those on the preformed tiles (either pressed or extruded, or by any other suitable process) and vitrifying the whole coated product.
The optimum resulting color of the ceramic tiles, which is of great importance for any architectural installations, in two or more definitive shades are achieved through carefully selecting the oxide composition of the active oxides and mixing ratio of the active oxides in the glass matrix in the coating application.
The resulting volumn conductivity of the glaze coating of the tiles are achieved through carefully selecting and achieving the particle size distribution of the electrically active components and the glass frit matrix. The exact description of this novel process will be more clearly understood with the help of following examples. The disclosed industrial process does not require any depression at the corners of the tiles. The desired static charge conductivity is achieved through attaining sufficient volume electrical conductivity through the cross section of the antistatic glazed surface available orthogonal to the ceramic tile at the edges by carefully achieving the particle size distribution of the electrically semi-conducting mixed oxide compound.

Figure 1 illustrates a schematic process flow chart showing the manufacturing steps for preparing the antistatic active compounds at elevated temperature.
Figure 2 illustrates schematic process flow chart of the process of industrially producing the antistatic conductive and dissipative active materials at room temperature to achieve a pale turquoise bule color of resultant ceramic anti-static tiles.
Figure 3 Schematic process flow chart of the process of manufacturing the antistatic ceramic tiles incorporating antistatic glaze material.
Figure 4 illustrates a schematic of the laying of the antistatic tiles with conducting wire placed in the gaps between tiles laid with semiconducting grout filling the gaps.
Figure 5 illustrates a schematic of the laying of the antistatic tiles with a thorough trough along the edge of the tile with conducting wire placed in the gaps between tiles laid with semiconducting grout filling the gaps till the surface.
Table 1 contains the various oxide compositions used for preparing the antistatic active materials and various glaze compositions along with other related important process parameters for manufacturing the antistatic tiles referred in the detailed embodiment of the innovation described here.

Table 1

Semi-conducting active material and < Glaze Compositions
Oxides Composition % Unit 1 2 3 4 5 6 7
Sn02 % 80 70 65 70 70 76 77
Sb203 % 20 30 30 25 20 19 20
ZnO % 4 4.5 5 5 2
CuO % 0.5 0.5 0.5
Y-Zr02 % 0.5
Bi203 % 5
La203 %
W03 % 0.5
Fe203 %
Total % 100 100 100 100 100 100 100
Particle size after attrition M- - - 5-15 5-15 5-15 5-15 5-15
Calcining temperature C 650 - 650 950 650 - 650
Particle size after calcining, M- 1 45-60 45-60 45-60 45-60 45-60

Raw materials for Antistatic covering Addition
%
Active material % 40 45 40 45 50 40 45
ZnO % 5 5 5 5 5 5
Glossy Glaze Compound % 52 47 42
Satin Matt Glaze Compound % 42 32 47 42
Glossy Glaze Frit %
Matt Glaze Frit %
Dolomite % 2
wollastonite % 3
Calite %
Soda Feldspar %
China Clay % 8 8 8 8 8 8 8
Total 100 100 100 100 100 100 100
Tile Firing Temperature C 1150 1160 1150 1180 1190 1195 1195
Surface Electrical Resistance Q/sq 10A1 10A11 10A6 10A4 10A4 10A5 10A5
Stainfree (ISO 15045/14) Yes/No No No No Class 5 Class 5 Class 5 Class 5
Dustfree Yes/No No No No Yes Yes Yes Yes

Table 1. contd.

Semi-conducting active material and < Glaze Compositions
Oxides Composition % Unit 8 9 10 11 12 13 14
Sn02 % 75 80 70 70 80 68 68
Sb203 % 16.5 15 25 30 20 28 28
ZnO % 4.5 4.5 4.5 4 4
CuO % 0.5 0.5
Y-Zr02 % 0.5
Bi203 %
La203 % 3
W03 %
Fe203 % 0.5
Total % 100 100 100 100 100 100 100
Particle size after attrition M- 5-15 5-15 - 5-15 5-15 5-15 5-15
Calcining temperature C 950 650 1150 1150 ~ 650 650
Particle size after calcining, M- 45-60 45-60 45-60 45-60 45-60 45-60

Raw materials for Antistatic covering Addition
%
Active material % 50 45 40 43 45 35 40
ZnO % 5 5 2 7 7.5 5 7
Glossy Glaze Compound % 21 24 50
Satin Matt Glaze Compound % 37 21 24
Glossy Glaze Frit % 11 13 13
Matt Glaze Frit % 7.5 9 7.5
Dolomite % 2 2 2
wollastonite % 3 3 7 5
Calite % 4 4 4
Soda Feldspar % 15 15 13
China Clay % 8 8 7 5 10 8.5
Total 100 100 100 100 100 100 100
Tile Firing Temperature C 1180 1160 1175 1185 1170 1185 1180
Surface Electrical Resistance Q/sq 10A5 10A5 10A7 10A5 10A5 10A6 10A5
Stainfree (ISO 15045/14) Yes/No Class Class 5 Class 3 Class 5 Class 5 Class 5 Class 4
Dustfree Yes/No Yes Yes Yes Yes Yes Yes Yes
The detailed procedures of manufacturing the antistatic ceramic tiles will be better comprehended following steps mentioned in the following examples read together 5 with the steps in figures and composition table referred above.

Example 1
In one of the embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are taken in a composition ratio of 80:20 and calcined at a temperature of 650C. The resulting calcined product was ground to particle size range of 95% less that 1 micron and collected properly. A selected transparent glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed and milled with 40% active material. The glaze thus obtained was applied on the ceramic large format tile which was base-glazed before suitably. The tile was vitrified at temperature above 1150C and was found to have surface electrical resistance in the range of 10A9 ohm/square.
Example 2
In another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are taken in a composition ratio of 70:30 and ground to particle size range of 95%) within 45 micron to 60 micron collected properly. A selected transparent glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed and milled with 45% active material along with 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was base-glazed suitably. The tile was vitrified at temperature above 1160C and was found to have surface electrical resistance of more than 10A11 ohm/square.
Example 3

In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, copper oxide and yttria stabilized zirconia and taken in a composition ratio of 65:30:4:0.5:0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% with in 45 micron to 60 micron and collected properly. A previously selected transparent glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed and milled with 40% active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was base-glazed before suitably. The tile was vitrified at temperature above 1150C and was found to have surface electrical resistance in the range of 10A6 ohm/square.
Example 4
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, and copper oxide and taken in a composition ratio of 70 : 25 : 4.5 : 0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 950C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected transparent glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed and milled with 45% active material and 5% zinc oxide as mill addition. The glaze

thus obtained was applied suitably on the ceramic large format tile which was base-glazed suitably. The tile was vitrified at temperature above 1180C and was found to have surface electrical resistance in the range of 10A4 ohm/square.
Example 5
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, and bismuth oxide and taken in a composition ratio of 70 : 20 : 5 : 5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected satin matt glaze composition from a list of commonly used high temperature satin glaze suitable for floor tile application was mixed and milled with 50% active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1190C and was found to have surface electrical resistance in the range of 10A4 ohm/square.
Example 6
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, and bismuth oxide and taken in a composition ratio of 76 : 19 : 5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and

dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was collected properly. A previously selected satin matt glaze composition from a list of commonly used high temperature satin glaze suitable for floor tile application was mixed and milled with 40% active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1195C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 7
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, copper oxide and tungsten oxide and taken in a composition ratio of 77 : 20 : 2: 0.5 : 0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected satin matt glaze composition from a list of commonly used high temperature satin glaze suitable for floor tile application was mixed and milled with 45% active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1195C and was found to have surface electrical resistance in the range of 10A5 ohm/square. Example 8

In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide, yttria-stabilized zirconium oxide, lanthanum oxide and iron oxide and taken in a composition ratio of 75 : 16.5 : 4.5: 0.5 : 3: 0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 950C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected satin matt glaze composition from a list of commonly used high temperature satin glaze suitable for floor tile application was mixed and milled with 50%) active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1180C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 9
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide and copper oxide in a composition ratio of 80 : 15 : 4.5: 0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected transparent glossy glaze and a satin matt glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed at 50:50 ratio and milled with 45% active material

and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1160C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 10
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed with other industrial grade oxides such as zinc oxide and copper oxide in a composition ratio of 70 : 25 : 4.5: 0.5 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 1150C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected transparent glossy glaze and a satin matt glaze composition from a list of commonly used high temperature glaze suitable for floor tile application was mixed at 50:50 ratio and milled with 43% active material and 5% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1175C and was found to have surface electrical resistance in the range of 10A7 ohm/square.
Example 11
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed in a composition ratio of 70 : 30 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and

dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 1150C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. A previously selected transparent glossy glaze is milled with 43% active material and 7% zinc oxide as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1185C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 12
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide are mixed in a composition ratio of 80 : 20 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The active material thus prepared was mixed with a previously selected glaze frits and other selected ceramic raw materials with a mixing ratio of 45% active material and 7.5% zinc oxide, 11% said glossy glaze frit, 7.5% matt glaze frit, 2% dolomite, 3% wollastonite, 4% calcite, 15%) soda feldspar, and 5% china clay as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1170C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 13

In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide and zinc oxide are mixed in a composition ratio of 68 : 28 : 4 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. The active material thus prepared was mixed with a previously selected glaze frits and other selected ceramic raw materials with a mixing ratio of 35% active material and 5% zinc oxide, 13% said glossy glaze frit, 9% matt glaze frit, 2% dolomite, 7% wollastonite, 4% calcite, 15% soda feldspar, and 10% china clay as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1185C and was found to have surface electrical resistance in the range of 10A6 ohm/square.
Example 14
In yet another embodiment of the present invention, industrial grade tin oxide, antimony pentoxide and zinc oxide are mixed in a composition ratio of 68 : 28 : 4 and wet milled in an alumina lined drum mill in presence of water (2:1 ratio) for 1/2 hour to achieve a particle size in the range of 95% with in 5 micron to 15 micron, and washed and dried subsequently in an oven at 150C to 220C for 1 hour. The resultant inter-mixed oxide powder was calcined at a temperature of 650C. The resulting sintered product was ground to particle size range of 95% within 45 micron to 60 micron and collected properly. The active material thus prepared was mixed with a previously selected glaze frits and other selected ceramic raw materials with a mixing ratio of 40% active material and 7% zinc oxide, 13% said glossy glaze frit, 7.5% matt glaze frit, 2% dolomite, 5% wollastonite, 4% calcite, 13% soda feldspar, and 8.5%

china clay as mill addition. The glaze thus obtained was applied suitably on the ceramic large format tile which was coated with a base-glaze suitably. The tile was vitrified at temperature above 1180C and was found to have surface electrical resistance in the range of 10A5 ohm/square.
Example 15
In yet another example of the present invention, an antistatic semicondusting cement based grout is prepared by dry mixing cementitious grout readily available from the market ( generally white cement based) and the antistatic active material prepared as in example 10 mentioned above in a ratio from 70:30 to 65:35 in a pan mixture. The antistatic ceramic tiles prepared in any of the example 2 to 14 mentioned are laid on standard floor using standard procedure. The semi-conducting cementitious grout prepared earlier was mixed with sufficient quantity of water and made into a consistent slurry. An array of copper wire of 18 gauge was laid and junctions are soldered for proper connectivity as explained in the figure 4, and cross-sectional reference detail P. The grout is filled in the gaps between the tile as illustrated in figure 4. After a curing time of 2 hours, once sufficient rigidity is achieved in the grouted area, the laid tiles were inspected for any general grout faults and left for overnight setting and drying. The antistatic conductivity was measured on two different tiles separated by multiple tiles and grout filled gaps between tiles. The surface electrical resistivity was measured using suitable surface probes and was observed to be in the range of 10A5 ohm/sq to 10A6 ohm/sq. The same surface electrical resistivity was also measured at different intervals of 5, 10, 15, and 20 days. The measured value of the surface electrical resistivity was observed to be in the range of 10A5 ohm/sq to 10A6 ohm/sq.
Example 16

In yet another example of the present invention, an antistatic semiconducting grout is prepared by mixing air setting acrylic resin based acrylic grout readily available from the market and the antistatic active material prepared as in examples mentioned above in a ratio of 60:40 in a suitable mixer. A specially designed antistatic ceramic tiles were prepared with a thorough trough, all along the edge of the tile realizing from a specially designed mold at the pressing-forming stage. This tile was glazed following the schematic procedure illustrated in figure 3 as explained in any of the example 2 to 14 mentioned. These are laid on standard floor using standard procedure using cement base. The semi-conducting acrylic resin based grout material prepared earlier was mixed thoroughly with sufficient quantity organic hardener in the ratio of 2:1 and made into a consistent slurry and kept ready. An array of copper wire of 18 gauge was laid and junctions are soldered for proper connectivity as explained in the figure 5, and cross-sectional reference detail Q. The acrylic grout is filled in the gaps between the tile as illustrated in figure 5. After a curing time of 1/2 hour, once sufficient rigidity is achieved in the resin-grouted area, the laid tiles were inspected for any general grout faults and left for overnight setting and drying. The antistatic conductivity was measured on two different tiles separated by multiple tiles and grout filled gaps between tiles. The surface electrical resistivity was measured using suitable surface probes and was observed to be in the range of 10A5 ohm/sq to 10A6 ohm/sq. The same surface electrical resistivity was also measured at different intervals of 5, 10, 15, and 20 days. The measured value of the surface electrical resistivity was observed to be in the range of 10A5 ohm/sq to 10A6 ohm/sq.
Example 17
In yet another example of the present invention, an antistatic tile was further processed to manufacture a glass-fibre reinforced ceramic tile to increase the unifirmly distributed load (UDL) bearing capacity and point load (PL) bearing

capacity of the resultant tile. In this process, antistatic ceramic tiles, of size 600mm x 600mm, suitably prepared in any of the above-described embodiments, was laid upside down on a work bench. A commercially available air-setting isophthalic resin adhesive was prepared by adding a suitable hardener catalyst, such as MEKP (Methyl Ethyl Ketone Peroxide) in sufficient quantity. The resultant resin adhesive mix is applied through a custom made spray process or using a paint brush on the backside of the tile. Then a glass fibre mat, typically of 450 GSM was laid on it and again resin adhesive was applied on it. One such application process can result in 0.8mm overall thickness build-up below the tile.
The same process was repeated multiple time to achieve the desired thicknesses of 3mm to 5mm, in order to achieve the desired mechanical strength. In a typical application, a resultant product thus achieved was measured to have thickness of glass-fibre reinforcement of 4mm and cured for minimum 1 hour for optimum hardenning reactions to complete. The product was then shaved off by commonly available handheld abrasive grinder and finished from all the four sides for any extra burr. Below the tile thus manufactured, optionally a mild steel metal sheet of suitable thickness of 0.5mm to 1.5mm with strength improving in-built dome structure can also be fixed further. A fire and humidity resistant paint may also be applied over it. A suitable PVC tape was fixed all along the four edges to save the edges from any inadvertant breakage. The resultant glass fibre reinforced tile was tested for UDL and PL in an universal testing machine (UTS) and achieved a strength of 1600kg/m2 and 750kg respectively. The tests, as described in this embodiment, were repeated and found resultant tiles to have UDL of 1550kg/m2 to 1850kg/m2 and point load of 650kg to 800kg on a nominal size format of 600mm x 600mm.
Though the final resultant UDL and PL will depend on the quality of the initial ceramic tiles, more specially, its vitrification( % glassy phase), porosity( % Water Absorption) and Modulus Of Rupture (MOR) as measured in a 3-point bending machine, the glass fibre reinforcing process described in this embodiment will make the ceramic tiles suitable for a raised ascess floor applications, wherein a floor is

expected to be supported by stringers and vertical metal supports for height greater than typically 300mm to even 1200mm to allow a passage of human for maintenance work and duct lines for utility.

We claim:

1. A method of manufacturing a stain-free antistatic ceramic tile comprising of
i. preparing a semi-conducting active solid-state metal oxide mix compound
a. comprising of antimony oxide (15% to 30%), zirconium oxide
(0.5%-l%), zinc oxide(2% to 5%), tin oxide (65% to 80%),
bismuth oxide (2%-5%), and tungsten oxide (0.5%-2%),
b. wet mixing and micro milling for 30-60 mins to achieve a particle
size of 99% passing through 45 u, washing by water and then by
alcohol and drying at 150C-200C,
c. pre-calcining the electrically semi-conducting metal oxide
compound in the range of 650C to 950C,
d. grinding and maintaining a particle size of 95% electrically semi
conducting compound in the range of 45u to 60u,
ii. preparing electrically semi-conducting glaze slip by
a. batching and milling together ceramic raw materials (30%-70%)
and electrically conducting metal oxides (30%-70%)
b. maintaining the 92-95% of the resulting anti-static glaze material
in the size range of 15u to 45u on dry basis,
c. maintaining the glaze slip density at 1.85 g/cc to 1.95 g/cc, and slip
fluidity at 60 sec to 100 sec in B-4 Ford Cup
iii. forming ceramic tile of standard flat top surface of any size at a specific
pressure greater than 210 kg/cm2 and drying in a suitable vertical or
horizontal dryer, iv. applying base glaze of slip density at 1.85 g/cc to 1.95 g/cc, and slip
fluidity at 60s to 100s in B-4 Ford Cup on the flat top tile surface for
primary covering. v. applying thin layer of 0.5mm to 0.95mm the said semi-conducting glaze
slip through a combination of airless spray, curtain fall, and double disc
spray process,

vi. drying the said tile at 200C for few minutes, and firing the same at temperatures in the range of 1150C to 1250C, as suitable for ceramic tile body, vii. rectifying the ceramic tile thus prepared in order to achieve perfectly orthogonal sides.
2. The method, as claimed in claim 1, wherein the said electrically semi-conducting active material is prepared using a mixed oxide composition comprising of 650% to 80% tin oxide, 15% to 30% antimony pentoxide, and 1% to 5% zinc oxide, l%-5% bismuth oxide, 0.5%-2% tungsten oxide.
3. The method, as claimed in claim 1, wherein the said electrically semi-conducting oxide compound is solid-state sintered at a temperature of 650C to 950C.
4. The method, as claimed in claim 2, wherein the said electrically semi-conducting oxide compound is mixed at crystal level through a room temperature attition mixing process in the temperature range of 15C to 45C, without any external heat source, to achieve a multi-component mixed solid oxide active component, wherein the process can potentially be used for co-firing the active oxide along with glaze raw materials, thus removing one calcination step altogether from the manufacturing process.
5. The method, as claimed in claim 1, wherein the said glaze composition contains 35% to 50% semi-conducting active materials thus prepared, 2% to 7.5% zinc oxide, 21% to 50% glossy glaze compound, 21% to 50% satin glaze compound, 11% to 13% glossy glaze frit in place of glossy glaze compound, 7.5% to 9% matt glaze frit in place of satin matt glaze compound, 2% to 5% Dolomite, 3% to 7% wollastonite, 4% to 5% calcite, 13% to 15% soda feldspar, and 5% to 10% china clay.

6. The method, as claimed in claim 1, wherein the said resulting glaze composition contains 2%-7.5% zinc
7. A method of producing an anti-static semi conducting grout, that contains 30% to 35%) of semi-conducting anti-static active material which can be mixed with 70%> to 65%o of white cementitious material to be further mixed with sufficient water to prepare a workable slurry to be used as an anti-static grout for jointing the tiles.
8. A method of producing an anti-static semi conducting acrylic resin based grout, that contains 30%> to 40%> of semi-conducting anti-static active material prepared following the process steps explained in claim 1, which can be mixed with 70%> to 60% of acrylic resin material to be further mixed with acrylic hardener in 2:1 ratio to prepare a workable slurry to be used as an anti-static grout for jointing the tiles.
9. A method of producing an anti-static semi-conducting tile with glass fibre reinforcement using 450 GSM wooven glass fibre mats in multiple layer for 3mm to 5mm multi-layer reinforcement thickness which is hardenned with isophthalic resin and catalyst to increase the mechanical strength measured in uniformly distributed load and point load bearing capacity test for potential ceramic tile applications in raised access floorings as typically required in data centers and electrical panel rooms.

Documents

Application Documents

# Name Date
1 202011049309-STATEMENT OF UNDERTAKING (FORM 3) [11-11-2020(online)].pdf 2020-11-11
2 202011049309-PROVISIONAL SPECIFICATION [11-11-2020(online)].pdf 2020-11-11
3 202011049309-FORM 1 [11-11-2020(online)].pdf 2020-11-11
4 202011049309-DECLARATION OF INVENTORSHIP (FORM 5) [11-11-2020(online)].pdf 2020-11-11
5 202011049309-Proof of Right [10-02-2021(online)].pdf 2021-02-10
6 202011049309-FORM-26 [10-02-2021(online)].pdf 2021-02-10
7 202011049309-ENDORSEMENT BY INVENTORS [24-10-2021(online)].pdf 2021-10-24
8 202011049309-DRAWING [24-10-2021(online)].pdf 2021-10-24
9 202011049309-COMPLETE SPECIFICATION [24-10-2021(online)].pdf 2021-10-24
10 202011049309-FORM 18 [08-04-2022(online)].pdf 2022-04-08
11 202011049309-Others-100822.pdf 2022-08-26
12 202011049309-GPA-100822.pdf 2022-08-26
13 202011049309-Correspondence-100822.pdf 2022-08-26
14 202011049309-FER.pdf 2022-11-25
15 202011049309-OTHERS [25-05-2023(online)].pdf 2023-05-25
16 202011049309-FER_SER_REPLY [25-05-2023(online)].pdf 2023-05-25
17 202011049309-DRAWING [25-05-2023(online)].pdf 2023-05-25
18 202011049309-CLAIMS [25-05-2023(online)].pdf 2023-05-25
19 202011049309-US(14)-HearingNotice-(HearingDate-05-03-2024).pdf 2024-02-20
20 202011049309-Correspondence to notify the Controller [02-03-2024(online)].pdf 2024-03-02
21 202011049309-Written submissions and relevant documents [19-03-2024(online)].pdf 2024-03-19
22 202011049309-Annexure [19-03-2024(online)].pdf 2024-03-19
23 202011049309-Response to office action [16-12-2024(online)].pdf 2024-12-16
24 202011049309-PatentCertificate16-12-2024.pdf 2024-12-16
25 202011049309-IntimationOfGrant16-12-2024.pdf 2024-12-16
26 202011049309-Annexure [16-12-2024(online)].pdf 2024-12-16

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