Abstract: A novel regulator system within the electronic circuitry of the vehicle. The disclosed regulator system turns OFF the electronic circuitry of the vehicle when any event is not performed for a predetermined time. Also, the system wakes up automatically or is restarted when the power is reconnected in the circuitry. Also, the regulator system provides the required voltage to the electronic circuitry of the vehicle. Further, the regulator provides additional advantages of a low leakage current and higher transient protection rating with a lower bill of materials cost.
Field of the invention
[0001 ]The present invention relates to Regulator system. More specifically the present invention relates to a Low Dropout Regulator system having power saving and automatic wake up feature.
Background
[0002] Industrial or automotive applications comprises circuitry having microcontrollers, processors, and associated sensors. The circuitry is usually powered by Low Dropout (LDO) regulators which bring down the voltage level compatible with the microcontroller and the associated circuitry. When the circuitry is not in use, even then the circuitry and specifically the LDO drains some current. The drain current becomes significant in battery powered systems as the drain current may discharge the battery when the circuitry is not in use. Further, such LDO also requires independent transient protection circuitry to protect the overall circuit.
[0003] To overcome these problems, a new LDO was designed with additional pin i.e enable as shown in figure 1. The LDO having enable pin is connected in the electronic circuitry for minimizing the battery drain current. In particular, when the enable pin is activated, the power supply available on pin 1 (Vin) will be regulated by LDO and the output voltage can be taken at pin 8 (Vout). During this time, a current is also flowing from Pin 1 to pin 3 of the LDO which will be required for the functioning of internal circuitry of LDO. However, when the device is not in use or in sleep mode, the enable pin is deactivated and there will be no output voltage present on Pin 8 (Vout). Accordingly, no current will flow through the Pin 1 (Vin) to pin 3 (GND) to cause the drainage of battery. In this way, the drain current will be avoided. However, this circuit will not be
able to meet the second requirement i.e requirement of separate transient protection circuit. Further, the cost of the LDO is very high.
[0004] Thus, there is a need for a regulator circuit which can provide the desired regulated power supply without battery drainage and at the same time overcome the requirement of additional transient protection circuit. Further, the regulator should be cheaper and easy to manufacture.
Summary of the invention
[0005] Before the present apparatus, circuitry is described, it is to be understood that this disclosure is not limited to the particular systems, and methodologies described, as there can be multiple possible embodiments of the present disclosure which are not expressly illustrated in the present disclosure. It is also to be understood that the terminology used in the description is for the purpose of describing the particular versions or embodiments only and is not intended to limit the scope of the present disclosure.
[0006] In an aspect, the present invention describes a regulator for providing a reference voltage to a control unit, comprising: a first switch; a second switch connected to the first switch and to the control unit, the second switch providing a reference voltage at its output upon activation; a third switch connected to the first switch, second switch and to the control unit; and a trigger circuit connected to the first switch; wherein: the trigger circuit provides an initial trigger signal to activate the first switch, the activation of the first switch causes the activation of the second switch allowing the reference voltage being simultaneously provided to the control unit and to the third switch for activating the control unit and the third switch; the activation of the third switch continues the activation of the first and second switches till the occurrence of an event;
and the control unit provides a disable signal to deactivate the third switch, in response to occurrence of the event.
[0007] In another aspect of the circuitry, as disclosed, the first and second switches are connected to a power switch, wherein the activation of the power switch allows battery power to be connected to the first and second switches.
[0008] In yet another aspect of the circuitry, as disclosed, the trigger circuit comprises a capacitor, the capacitor providing the initial trigger signal to activate the first switch in response to the activation of the power switch.
[0009] In still another aspect of the circuitry, as disclosed, the capacitor starts charging in response to the activation of the power switch and starts discharging in response to the deactivation of the third switch.
[00010] In another aspect of the circuitry, as disclosed, a reference voltage source connected to the second switch.
[00011] In yet another aspect of the circuitry, as disclosed, the reference voltage source is a Zener diode.
[00012] In still another aspect of the circuitry, as disclosed, the first, second and third switches are selected from bipolar junction transistors (BJTs), field effect transistors (FETs) and metal oxide field effect transistors (MOSFETs).
[00013] In another aspect of the circuitry, as disclosed, the first switch is PNP bipolar junction transistor and second and third switches are NPN bipolar junction transistors.
[00014] In yet another aspect of the circuitry, as disclosed, the event is a lapse of a predetermined time for which one or more components connected to the control unit are in sleep mode.
[00015] In an aspect, the present invention describes an ignition control system of a vehicle comprising the regulator as described in above paragraphs.
[00016] In the above paragraphs, the most important features of the invention have been outlined, in order that the detailed description thereof that follows may be better understood and in order that the present contribution to the art may be better understood and in order that the present contribution to the art may be better appreciated. There are, of course, additional features of the invention that will be described hereinafter and which will form the subject of the claims appended hereto. Those skilled in the art will appreciate that the conception upon which this invention is based may readily be utilized as a basis for the designing of other structures for carrying out the several purposes of the invention. It is important therefore that the claims be regarded as including such equivalent constructions as do not depart from the spirit and scope of the invention.
BRIEF DESCRIPTION OF DRAWINGS
[00017] Further aspects and advantages of the present invention will be readily understood from the following detailed description with reference to the accompanying drawings, where like reference numerals refer to identical or functionally similar elements throughout the separate views. The figures together with the detailed description below, are incorporated in and form part of the specification, and serve to further illustrate the aspects and explain
various principles and advantages, in accordance with the present invention wherein:
[00018] FIG. 1 exemplarily illustrates a prior art LDO regulator connected to an
5 electronic circuitry;
[00019] FIG. 2 exemplarily illustrates a schematic of a novel regulator system in accordance with the present invention;
10 [00020] FIG. 3 exemplarily illustrates another schematic of a novel regulator
system in accordance with the present invention;
[00021] FIG. 4 exemplarily illustrates the performance parameters of the novel
LDO regulator system as compared to the prior art.
15
[00022] Skilled artisans will appreciate that elements in the drawings are
illustrated for simplicity and have not necessarily been drawn to scale. For
example, the dimensions of some of the elements in the drawings may be
exaggerated relative to other elements to help to improve understanding of the
20 aspects of the present invention.
DETAILED DESCRIPTION OF DRAWINGS
[00023] The present invention will be described herein below with reference to
25 the accompanying drawings. In the following description, well known functions
or constructions are not described in detail since they would obscure the description with unnecessary detail.
[00024] In the present document, the word "exemplary" is used herein to
30 mean "serving as an example, instance, or illustration." Any embodiment
or implementation of the present subject matter described herein as
6
"exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
[00025] While the disclosure is susceptible to various modifications and
5 alternative forms, specific embodiment thereof has been shown by way of
example in the drawings and will be described in detail below. It should
be understood, however that it is not intended to limit the disclosure to the
particular forms disclosed, but on the contrary, the disclosure is to cover
all modifications, equivalents, and alternatives falling within the scope of
10 the disclosure.
[00026] The terms “comprises”, “comprising”, “include(s)”, or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, arrangement, unit, system or method that comprises a list of
15 components or steps does not include only those components or steps but
may include other components or steps not expressly listed or inherent to such setup or arrangement or unit or system or method. In other words, one or more elements in a circuitry, a system or apparatus or unit or arrangement proceeded by “comprises… a” does not, without more
20 constraints, preclude the existence of other elements or additional elements
in the system or apparatus or unit or arrangement.
[00027] The present disclosure presents a novel regulator to provide a regulated
power supply with self-awake feature. The regulator will shut-off the power
25 supply in sleep mode and self-awake itself once the battery is again introduced
in the circuit.
[00028] Figure 2 illustrates the regulator circuitry comprising a plurality of switches, a plurality of resistors (R1-R4), a plurality of diodes. In an
7
exemplary embodiment the switches can be transistors, MOSFETSs , FET
or any other circuit which can work as a switch. In a preferred embodiment,
the regulator uses different type of transistors for performing the action of
switch. The regulator circuit is connected to a power supply which has to
5 be regulated before providing to the connected Load. In an exemplary
embodiment, there are three transistors Q1-Q3 present in the regulator whereas the transistors Q1 and Q3 are working in npn configuration and transistor Q2 is working in a pnp configuration. As soon as the enable signal is activated, the transistor Q3 will be in on state and provide a base
10 current to transistor Q2. Transistor Q2 is a pnp transistor therefore it will
be requiring either 0 or negative voltage on its base for activation. As soon as the transistor Q2 is triggered through Q3 , it further triggers the base of the transistor Q1. There is a reference voltage provided at the base of the transistor Q1. In a preferred embodiment, the reference voltage is provided
15 through a Zener diode which is also known as voltage regulator. The
transistor Q1 which is working in emitter follower configuration will follow the voltage present at the base and provide the same voltage at emitter of the transistor Q1. The output voltage received at the emitter end of Q1 is dependent on the reference voltage and is used for powering the
20 load connected in the electronic circuit.
[00029] When the enable signal is deactivated, this will make the transistor
Q3 off or transistor Q3 will act as an open switch. As the transistor Q3 is
acting like an open switch therefore the transistor Q2 will also work as
25 open switch. To make the Q2 work as open switch, a resistor R2 is
connected between the base and emitter of the transistor Q2 so that even external noise or any other signal may not be able to trigger the base of transistor Q2. By placing the resistor R2, the base and emitter of the transistor will become equipotential. The role of R2 is to ensure
8
equipotential between base and emitter of transistor Q2 to avoid
unnecessary triggering. Further, as transistor Q2 is off therefore there will
be no trigger signal passed to the transistor Q1 and the transistor Q1 will
also act as open switch which ensures that no power is available to the load
5 connected to the regulator circuitry in sleep mode or till the time the enable
is deactivated.
[00030] Figure 3 illustrates regulator circuit for providing reference voltage to a control unit according to another embodiment of the present
10 disclosure. In this embodiment, the regulator comprises a plurality of
switches, a plurality of resistors (R1-R8), a reference voltage and a trigger circuit. In particular, first switch is connected to second switch which is further connected to the control unit and to a third switch. In an exemplary embodiment the switches can be transistors, MOSFETSs , FET or any
15 other circuit which can work as a switch. In a preferred embodiment the
first switch Q2 is a npn transistor, second Q1 and third Q3 switches are pnp transistor. The regulator circuit is connected to a power supply which has to be regulated before providing to the control unit. In a preferred embodiment, the control unit is a microprocessor or a microcontroller of
20 the main unit. A trigger circuit is also connected to the transistor Q2. The
trigger circuit is used to provide an initial trigger signal for activation of transistor Q2. The trigger circuit can be designed by using various logic gates or any of the electrical component which is capable to activate the transistor Q2. In a preferred embodiment the trigger circuit is a capacitor.
25 As soon as the power switch is activated, the capacitor C2 will provide an
external spike through R5 resistor and triggers the base of transistor Q2. Transistor Q2 is a pnp transistor therefore it will be requiring either 0 or negative voltage on its base for activation. Upon activation of transistor Q2 by the trigger signal coming through capacitor C2, the transistor Q2
9
simultaneously triggers the base of the transistor Q1. There is a reference
voltage provided at the base of the transistor Q1. In a preferred
embodiment, the reference voltage is provided through a Zener diode
which is also known as voltage regulator. The transistor Q1 which is
5 working in emitter follower configuration will follow the reference voltage
provided at its base and pass the same voltage at emitter of the transistor Q1. The output voltage received at the emitter end of Q1 is dependent on the reference voltage and is used for powering the control unit and the transistor Q3 connected to it. The transistor Q3 will get supply through a
10 feedback circuit of resistor R4 and R8 for triggering its base. Once the Q3
is ON, the role of capacitor will be performed by Q3 (as discussed in figure 2). After activation of Q3, now instead of capacitor the Q3 will be responsible of triggering the base of the transistor Q2 which in turn after activation triggers the base of transistor Q1 and the reference voltage will
15 be provided to the control unit. The Control unit will provide an enable
signal to the transistor Q3 as well till the time power is ON.
[00031] The transistor Q3 will be activated only until there is no occurrence of event or till the time transistors Q1 and Q2 is activated. Once, the control
20 unit detects that there is an event occurs then it sends a command to the
enable signal to deactivate the transistor Q3 and enable the sleep mode so that the battery would not be drained unnecessarily. The event can be lapsing of predetermined time, some fault appearing at any connected circuitry or any programming which the user wants. In a preferred
25 embodiment, the event is lapsing of predetermined time for which no
activity has been detected at input of regulator circuit. For achieving this, a pulse is sent to the enable signal for active low state. Once the enable is deactivated, the transistor Q3 will be off . As the transistor Q3 is off and if at time the capacitor is charged, the transistor Q2 will also work as off
10
switch and as discussed in above paragraphs, if the transistor Q2 is off then
it will not be able to trigger the base of transistor Q1 and ultimately the
transistor Q1 will be off. The transistor Q1 once goes in to off state will
not be able to provide the required voltage to the control unit and ultimately
5 the regulator circuit will go in to sleep mode and battery current will be
saved from drainage.
[00032] When the power switch is off, then the earlier charged capacitor will be discharged through the path of R5, R3 and R6 in a fraction of time.
10 In an exemplary embodiment, the discharge time of capacitor C2 is of
100ms. Next time when the user turns on the power on switch, then the capacitor provides a triggering pulse to the Q2 and accordingly the transistor Q1 and Q3 will turn on to provide the power supply to the control unit. In this way, the capacitor will make the regulator circuit as working
15 with self-awake feature.
[00033] In an exemplary embodiment, this self-awake feature is used in the automobiles and the regulator is a LDO regulator. The power from the battery of the vehicle (not shown) supplies power to the LDO regulator
20 system when the user turns the key to the “ON” or “IGN” position where
supply voltage provided by the battery. As soon as the power from the battery is supplied to the vehicle, C2 is initially discharged and momentarily results in the voltage at junction J1 as zero. The fall in the voltage at junction J1 provides the bias to the base of the transistor Q2
25 which turns ON the transistor Q2. Turning ON of the transistor Q2
provides bias to the base of the transistor Q1 from the collector of transistor of Q2 through R2. The base of the transistor of Q1 is further connected to the ground via a Zener diode D1 connected in reverse bias which provides the voltage reference of the output voltage appearing in the emitter of the
11
transistor Q1. In other words, the bias voltage at junction J2 is provided
such that transistor Q1 goes into active region, thereby providing the
desired voltage of +Vcc at the emitter of the transistor Q1 where the
desired voltage depends on the reverse breakdown voltage of the Zener
5 diode D1. The voltage appearing at the emitter of Q1 is fed back to the
transistor Q3 via the voltage divider formed by R4 and R8 which biases
the transistor Q3 and turns the transistor Q3 ON, thereby providing an
alternate route for current to flow through R3 and R5 as eventually the
capacitor C2 charges fully and stops conducting current any further. Thus,
10 the feedback from the emitter of Q1 to the base of Q3 forms a latch and
thus transistors Q3-Q1 keeps conducting.
[00034] The control unit U1 is thus powered ON by the desired voltage +Vcc appearing at the emitter of the transistor Q1, where the capacitor C1
15 filters the ripple, noise and transient currents appearing at the emitter of
transistor Q1. Upon powering ON the control unit U1control unit measures the amount of time elapsed since it was turned on. In other words, the control unit is powered ON by the mechanism described above when the user turns the key to the “ON” or “IGN” position and the control unit U1
20 begins measuring the elapsed time till the user starts the engine of the
vehicle. If the user fails to start the engine within the predetermined time, the control unit pulls the pin P(x,y) to the ground and thereby removing the bias to the base of transistor Q3, which turns the transistor Q3 OFF. The turning OFF of the transistor Q3 results in removal of the bias to the base
25 of the transistor Q2 and thereby turning the transistor Q2 OFF. The turning
OFF of the transistor Q2 removes the bias provided to the base of transistor of Q1 and thereby turning OFF the transistor Q1. The turning OFF of transistor Q1 results in disconnection of the control unit and the associated circuitry from the power source i.e. the battery of the vehicle. Thereby, the
12
draining of the battery of the vehicle is prevented.
[00035] Thus, the regulator circuitry provides the required voltage to the
control unit U1 and the control unit U1 turns itself OFF by turning OFF
5 Q3-Q1, when the control unit U1 determines that the user has not started
the engine of the vehicle within the predetermined time. This prevents any leakage current and thereby prevents the battery of the vehicle from discharging.
10 [00036] It must be noted that in this condition the key is in the “ON” or
“IGN” position, however the LDO regulator system is turned OFF. Now, when the user wishes to wake the LDO regulator system up, the user then turns back the key of the vehicle to “OFF” or “LOCK” position, thereby disconnecting the battery from the LDO regulator system. Upon
15 disconnection the capacitor C2 discharges through resistors R5, R3 and R6
in a short time thereby putting the LDO regulator system in the initial
condition.
[00037] Now that the capacitor C2 is discharged, when the user turns the
key to the “ON” or “IGN” position after briefly turning back the key to the
20 “OFF” or “LOCK” position. The sequence of turning ON and latching of
transistors Q1-Q3, as described above, turns the control unit U1 on. Thereby enabling auto wake-up of the electronic circuitry without any manual external signal supplied to the circuitry.
25 [00038] In an embodiment, the LDO regulator system as disclosed above may
be used in industrial automation system, where in case of any short-circuit or fault the industrial automation system may switch itself OFF to prevent damage and may be automatically restarted once the fault condition or short-circuit disappears.
13
[00039] In an embodiment, the control unit is a microcontroller, or a processor connected to the regulator (LDO) circuit.
5 [00040] In another embodiment, the voltage received from the battery of the
vehicle is +12 V DC and the operating voltage or the output voltage of the LDO regulator system or +Vcc is 5V DC.
[00041] In yet another embodiment, the load-dump transient protection of the
10 LDO regulator system is inherent due to high VCBO rating of the transistor Q1.
In a preferable embodiment the VCBO rating of the transistor is up to 200 Volts.
[00042] FIG. 4 exemplarily illustrates the additional advantages of the regulator system over the prior art devices/systems. It can be observed that the leakage
15 current when the regulator system is reduced to 4.15µA as compared to 5µA. It
can be also observed that the regulator system of the invention has better load and line regulation and higher input voltage rating and load dump protection and hence the regulator system can work in wider range of voltages and also provides better transient protection.
20
[00043] Further, the cost of manufacture of regulator system would be much less
than the cost of prior art LDO regulators and even at this low cost the regulator
system of the present invention provides the above mentioned novel features
and advantages as compared to prior art LDO regulators.
25
[00044] The disclosed invention is thus attained in an economical, practical, and
facile manner. It is to be understood that various further modifications and
additional configurations will be apparent to those skilled in the art. It is
intended that the specific embodiments, configurations and calculations herein
14
disclosed are illustrative and should not be interpreted as limitations on the scope of the invention.
We Claim;
A regulator for providing a reference voltage to a control unit, comprising:
a first switch;
a second switch connected to the first switch and to the control unit, the second switch providing a reference voltage at its output upon activation;
a third switch connected to the first switch, second switch and to the control unit; and
a trigger circuit connected to the first switch;
wherein:
the trigger circuit provides an initial trigger signal to activate the first switch, the activation of the first switch causes the activation of the second switch allowing the reference voltage being simultaneously provided to the control unit and to the third switch for activating the control unit and the third switch;
the activation of the third switch continues the activation of the first and second switches till the occurrence of an event; and
the control unit provides a disable signal to deactivate the third switch, in response to occurrence of the event.
2. The regulator of claim 1, wherein the first and second switches are
connected to a power switch, wherein the activation of the power switch allows battery power to be connected to the first and second switches.
3. The regulator of claim 2, wherein the trigger circuit comprises a capacitor, the capacitor providing the initial trigger signal to activate the first switch in response to the activation of the power switch.
4. The regulator of claim 3, wherein the capacitor starts charging in response to the activation of the power switch and starts discharging in response to the deactivation of the third switch.
5. The regulator of claim 1, further comprising a reference voltage source connected to the second switch.
6. The regulator of claim 4, wherein the reference voltage source is a Zener diode.
7. The regulator of claim 1, wherein the first, second and third switches are selected from bipolar junction transistors (BJTs), field effect transistors (FETs) and metal oxide field effect transistors (MOSFETs).
8. The regulator of claim 6, wherein the first switch is PNP bipolar junction transistor and second and third switches are NPN bipolar junction transistors.
9. The regulator of claim 1, wherein the event is a lapse of a predetermined time for which one or more components connected to the control unit are in sleep mode.
10. An ignition control system of a vehicle comprising the regulator of claims 1-8.
| # | Name | Date |
|---|---|---|
| 1 | 201711038422-STATEMENT OF UNDERTAKING (FORM 3) [30-10-2017(online)].pdf | 2017-10-30 |
| 2 | 201711038422-PROVISIONAL SPECIFICATION [30-10-2017(online)].pdf | 2017-10-30 |
| 3 | 201711038422-POWER OF AUTHORITY [30-10-2017(online)].pdf | 2017-10-30 |
| 4 | 201711038422-FORM 1 [30-10-2017(online)].pdf | 2017-10-30 |
| 5 | 201711038422-DRAWINGS [30-10-2017(online)].pdf | 2017-10-30 |
| 6 | 201711038422-DECLARATION OF INVENTORSHIP (FORM 5) [30-10-2017(online)].pdf | 2017-10-30 |
| 7 | abstract.jpg | 2018-02-15 |
| 8 | 201711038422-DRAWING [29-10-2018(online)].pdf | 2018-10-29 |
| 9 | 201711038422-CORRESPONDENCE-OTHERS [29-10-2018(online)].pdf | 2018-10-29 |
| 10 | 201711038422-COMPLETE SPECIFICATION [29-10-2018(online)].pdf | 2018-10-29 |
| 11 | 201711038422-FORM 18 [05-02-2020(online)].pdf | 2020-02-05 |
| 12 | 201711038422-Proof of Right [05-01-2021(online)].pdf | 2021-01-05 |
| 13 | 201711038422-FER.pdf | 2021-11-05 |
| 14 | 201711038422-PETITION UNDER RULE 137 [19-01-2022(online)].pdf | 2022-01-19 |
| 15 | 201711038422-OTHERS [20-01-2022(online)].pdf | 2022-01-20 |
| 16 | 201711038422-FER_SER_REPLY [20-01-2022(online)].pdf | 2022-01-20 |
| 17 | 201711038422-COMPLETE SPECIFICATION [20-01-2022(online)].pdf | 2022-01-20 |
| 18 | 201711038422-CLAIMS [20-01-2022(online)].pdf | 2022-01-20 |
| 19 | 201711038422-Response to office action [21-04-2022(online)].pdf | 2022-04-21 |
| 20 | 201711038422-PatentCertificate14-11-2023.pdf | 2023-11-14 |
| 21 | 201711038422-IntimationOfGrant14-11-2023.pdf | 2023-11-14 |
| 1 | SEARCHE_25-06-2021.pdf |