FIELD OF THE INVENTION

[0001] The present invention relates to a use of system-in-package (SiP) structure to develop a semiconductor single chip device for smart energy metering application.

BACKGROUND OF THE INVENTION

[0002] Today's energy meter is smart. They are smart by integrating control and communication over basic energy instrumentation. The control and communication channels are from or to Head End System (HES). Conventional energy meters are placed in harsh environments and hence protection from EMI/EMC, RFI and frequency jamming is critical. The functionality of semiconductor product in Smart Energy Metering continues to increase and mirror that is the developments in packaging processes.

[0003] Preferably, an ideal package structure for the Smart Energy Metering device involves integration of semiconductor IPs forming System-on-Chip (SoC) based design. The development time for SoC based design for Smart Energy Metering application is long due to complexity, licenses agreements, testing and associated communication product certification.

[0004] Currently available devices do not address the problems associated with assembling the different chips on the printed circuit board. The use of discrete components for instrumentation, control and communication increases higher usage of passive components resulting higher BOM cost. Also the solution may not match the inoperability specification perfectly. Designing power supply for the discrete components is a skilled art and special attention has to be given to EMI/EMC issue.

[0005] The present invention addresses all above issue and build a robust and reliable solution for Smart Energy meters. The proposed architecture integrates instrumentation, control and communication on a single chip using 'System in Package' (SiP) structure.

[0006] The architecture proposed in present invention emphasises on scalability and reusability by integrating the components on a single chip; thus reducing the cost and time to market.

[0007] The present invention seeks to overcome the disadvantages associated with System-on-Chip (SoC) based design or use of discrete component based design by providing an economical and more convenient alternative. In this regard, the present invention substantially fulfills this need. In this respect, System-in-Package (SiP) structure based semiconductor single chip device according to the present invention substantially departs from the conventional concepts and designs of the prior art, and in doing so provides scalable and reusable architecture primarily developed for the purpose of smart energy metering applications.

SUMMARY OF THE INVENTION

[0008] In view of the foregoing disadvantages inherent in the known types of System-on-Chip (SoC) based design or use of discrete component based design for smart energy metering application now present in the prior art, the present invention provides an improved scalable and reusable architecture, and overcomes the above-mentioned disadvantages and drawbacks of the prior art. As such, the general purpose of the present invention, which will be described subsequently in greater detail, is to provide a new and improved a semiconductor single chip device which has all the advantages of the prior art mentioned heretofore and many novel features that result in shorter development time, highly scalable and reusable architecture which is not anticipated, rendered obvious, suggested, or even implied by the prior art, either alone or in any combination thereof.

[0009] The present application describes several illustrative embodiments for a single chip smart energy meter, Two System-in-Package (SiP) based architectures are summarized here.

[0010] The architectures are based on dual substrate package, with distributed instrumentation, control and communication.

[0011] The communication technology that is adopted for smart metering ranges from wireless, wired to cellular communication. The proposed architecture is illustrated using cellular communication like GSM/GPRS and wireless communication like Low Power Radio Frequency (LPRF) but scope is not only limited to it.

[0012] In accordance with one embodiment of the present invention, instrumentation, control and LPRF communication resides on lower substrate while GSM/GPRS module lies on upper substrate.

[0013] In accordance with second embodiment of the present invention, the upper substrate contains multiple chips which together provide the functionality of GSM/GPRS communication. A Baseband Processor, GSM/GPRS Transreceiver and a Power Amplifier are placed on upper substrate.

[0014] Both the embodiments propose use of packages (PKG) or Known-Good-Die (KGD) in a system-in-package structure.

[0015] The present invention proposes re-usability in a system-in-package structure for smart energy metering by use of common hardware modules like Flash device and use of same lower substrate for variants of architecture and instrumentation needs.

[0016] With dual substrate package use on SiP, a semiconductor single chip device becomes highly scalable and re-usable as the main component resides on the lower substrate. The present invention proposes but not limited to:
1. Reuse of common hardware devices in a System-in-Package structure for smart energy metering.
2. Reuse of lower substrate for variants of System-in-Package structure for smart energy metering.
3. Reuse of lower substrate for variants of System-in-Package structure for smart energy, water and gas metering.

BRIEF DESCRIPTION OF DRAWINGS

[0017] The invention will be better understood and objects other than those set forth above will become apparent when consideration is given to the following detailed description thereof. Such description makes reference to the annexed drawings wherein:

[0018] Fig. 1 is a perspective diagram illustrating the modules present in a configurable system-in-package structure for a semiconductor single chip device for smart energy metering application.

[0019] Fig. 2 is a perspective diagram illustrating lower and upper substrate with communication module in a system-in-package structure for a semiconductor single chip device for smart energy metering application according to the first embodiment of the present invention.

[0020] Fig. 3 represents the chip dimensions for each chips used in smart metering applications.

[0021] Fig. 4 is a perspective diagram illustrating lower and upper substrate with multiple chips representing communication system in a system-in-package structure for a semiconductor single chip device for smart energy metering application according to the second embodiment of the present invention.

[0022] Fig. 5 is a cross-sectional view illustrating the configurable system-in-package structure for a semiconductor single chip device for smart energy metering application according to the both embodiment of the present invention.

[0023] Fig. 6 is a perspective diagram illustrating to use common lower substrate in a system-in-package structure for smart energy, water and gas metering. The instrumentation technology is positioned on the upper substrate.

DETAILED DESCRIPTION OF THE DRAWINGS

[0024] Smart energy meter are equipped with communication and control functionalities. They can communicate with the HES using LAN, WAN, cellular technology, optical and wired technologies. Apart from it, they may receive specific instruction from HES and execute it, for example, a simple power shutdown operation for 30 minutes. To achieve real time control and efficient programmability, microprocessor based architecture is proposed in this invention. The communication technologies can be adopted based on geography requirements, regulations and available infrastructure. The present invention uses GSM/GPRS and LPRF (864MHz-867MHz) for illustrating system-in-package structure. For measuring the electrical quantities consumed by the utilizer, the present invention uses meterology engine compromised of minimum 2 or more ADCs for illustrating system-in-package structure.

[0025] Please refer Fig. 1. Fig. 1 represents a functional view of multiple functional chips placed on lower and upper substrate of a system-in-package structure 110. The architecture present in this invention is highly reconfigurable as the lower substrate 112 remains same for wide range of communication. The system controller 122 and Flash memory 118 is on lower substrate along with meterology engine 124 and LPRF communication 116. The Flash memory serves 2 purposes; it is used as a software code storage device and other as a meter data logging unit. The use of non-volatile SRAM (NVSRAM) is also recommended in present invention for robustness and higher data retention. The communication technology 120 resides on the upper substrate 114. The upper substrate may contain processor for baseband processing or it can be a serial interface based module without processor. The processor in the lower and upper substrate shares a common Flash memory using a low voltage 4-bit FET Multiplexer/Demultiplexer 126. The control signals of the low voltage 4-bit FET Multiplexer/Demultiplexer can be controlled using the main controller unit on the lower substrate; thus enabling the configurability in system-in-package structure. The serial interface to Flash must be hooked at the output of low voltage 4-bit FET Multiplexer/Demultiplexer device and one set of low voltage 4-bit FET Multiplexer/Demultiplexer inputs must be visible for upper substrate connection.

[0026] Please refer Fig. 2 and Fig. 3. Fig. 2 represents the one of the SiP based architecture for Smart Energy Metering. The first embodiment is presented in Fig. 2 and it is a SiP solution using Package (PKG) in Package Technology or Package on Package Technology. This architecture integrates chip packages (PKG) on the dual substrate packages. The complete SiP 210 dimension for smart metering application could range from 22x33mm with +- 20% tolerance. As shown in Fig. 2, the lower substrate 112 in a system-in-package consists of carrier substrate, at least single chip positioned on the surface of carrier substrate, wire bonds and plurality of solder balls. The chips can be of flip chip type. In proposed invention, chips with controller 122, meterology engine 124, Flash memory 118 and LPRF communication 116 are positioned on the surface of carrier substrate along with necessary passive components within the moulding area of a system-in-package structure. A typical chip dimension for controller lies from 7x7mm to 9x9mm. The individual chip dimension for meterology and LPRF module is around 5x5mm. Fig. 3 represents the chip dimensions for each solution. These dimensions are for illustration and subject to vary based on the chip selection. The system controller chip is placed on the left corner of the carrier substrate and LPRF/Meterology chips are placed below the controller. The Flash memory is positioned side to side to controller and located at right corner of the carrier substrate. The Flash memory is connected through a low voltage 4-bit FET Multiplexer/Demultiplexer 126. This placement creates a 410mm2 area for positioning passive components at lower substrate. The communication module 212 for GSM/GPRS is positioned at the centre on the upper substrate 114 giving enough space for passive components to get placed on the side of the module. The upper chip is connected to other chips and substrate via bump. Since chips are formed into one package, wiring technique and addition of heat spreader is important. The dots 216 represent the placement direction of dual substrates.

[0027] Please refer Fig. 4. Fig. 4 represents the second SiP based architecture for Smart Energy Metering. The second embodiment is presented in Fig. 4 and it is a SiP solution using Die (Known Good Die - KGD) and Package integration. This architecture integrates Die and packages on the dual substrate packages. For higher reusability, the lower substrate remains same in both the architectures. This architecture proposes use of KGD for micro-processor, base band processing unit 410, GSM/GPRS transreceiver 412 and a power amplifier 414. The upper substrate is now consists of multiple dies. The dies for micro-processor, base band processing unit, GSM/GPRS transreceiver and a power amplifier are positioned on upper substrate. The micro-processor is placed on the right corner of the upper substrate and on the top of Flash memory positioned on the lower substrate. This placement reduces the wire routing length. A RF antenna routine guideline is considered by placing the power amplifier of LPRF and GSM/GPRS diagonally opposite. The complete SiP dimension for smart metering could range from 22x33mm with +- 20% tolerance. Integration of KGD would make the device size still smaller and hence reduce cost.

[0028] Please refer Fig. 5. Fig. 5 is a cross-sectional view illustrating the configurable system-in-package structure for smart energy metering application according to the both embodiment of the present invention. An LPRF and GSM/GPRS modules are referred as communication modules in this invention. It presents a stacked architecture and uses known good die for the chips selected on the upper substrate for smart metering. A Flash device is shared by both substrates enabling configurability and re-usability. As the communication protocol has dependency on multiple external factors, the proposed invention uses a common lower substrate enabling reduced cost and time-to-market. The device is having wire bonds 512 and plurality of solder balls 510. The proposed system-in-package structure for smart metering operates on a single power supply meeting the absolute maximum rating of selected chips. The power supply considerations are out of scope in this invention. Based on the communication mode selected, either of the communication modules need to program in deep sleep mode enabling low energy consumption.

[0029] Please refer Fig. 6. Fig. 6 is a perspective diagram illustrating to use common lower substrate in a system-in-package structure for smart energy, water and gas metering. The instrumentation technology 610 is positioned on the upper substrate. The lower substrate in a system-in-package structure contains microcontroller, flash device and wireless communication technology. The flash device is not shared by the upper substrate. The instrumentation technology like analog front end (AFE) for measuring energy, water and gas is positioned on the upper substrate. The invention uses a common lower substrate for measuring the energy, water and gas consumption; thus enabling high re-usability.

[0030] Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be constructed as limited only by the metes and bound of the appended claims.

What is claimed is:

1. A semiconductor single chip device for smart energy metering application using an system-in-package (SiP) structure wherein said system-in-package (SiP) structure comprising: at least two substrate package architecture and
a chip, addressing the functionality of instrumentation, control, multiplexer/demultiplexer, meter data logger and communication, disposed in the moulding area; said chip is available either as a package (PKG) or Known-Good-Di (KGD).

2. A method of manufacturing semiconductor single chip device for smart energy metering application comprising the steps of:
placing instrumentation, control, communication and data logger chip on the lower substrate in a system-in-package structure; placing of communication chip on the upper substrate in a system-in-package structure; the said communication chip enabling at least one of the wired or wireless to cellular communication and placing of Multiplexer/Demultiplexer device adjacent to data logger chip on the lower substrate in a system-in-package structure.

3. The semiconductor single chip device of claim 1 comprising an inbuilt Flash in the system controller unit; said inbuilt flash further used as a data logger unit.

4. The method of claim 2 further comprising the steps of placing of control, communication and data logger chip on the lower substrate in a system-in-package structure for smart energy, water and gas metering application.

5. The chip dimension for a semiconductor single chip device using system-in-package (SiP) structure comprising of chips specified in claim 1 ranges from 26.4x17.6mm to 39.6x26.4mm based on package (PKG) or Known-Good-Die (KGD) integration.

6. The device of claim 1 is configurable using at least one of the wired or wireless interfaces from outside environment.

7. The device of claim 1 is exchanging data between lower substrate and upper substrate using at least one of the serial interfaces like Universal Asynchronous Receive Transmit (UART), Inter-Integrated Circuit (I2C), Serial Peripheral Interface (SPI) and the like.

8. The device of claim 1 further comprising of heat spreader.

9. The communication chip of claim 2 comprises at least one of the LPRF, GSM/GPRS and the like protocols.

10. The device of claim 1 comprising RF 10 pads wherein said RF 10 pads are placed diagonally opposite to each other when at least two wireless or cellular communication technologies are used.