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A Switched Capacitor Seven Level Inverter With Self Voltage Balancing Ability

Abstract: This invention presents a groundbreaking seven-level inverter, primarily powered by a single DC source, making it a prime candidate for renewable energy applications such as solar and wind systems. Key to its functionality is the adept integration of floating capacitors within a switched-capacitor scheme. This unique configuration endows the inverter with an innate sensor less capacitor voltage balancing ability, simplifying control mechanisms and negating the occurrence of unintended capacitor over-voltage situations. Employing a phase disposition pulse-width modulation (PD-PWM) approach, the inverter can seamlessly control its output. Additionally, its architecture is marked by a reduced count of semiconductor devices, offering both efficiency and simplicity. The proposed design can expertly generate a gamut of voltage levels, establishing itself as a pivotal advancement in multilevel inverters.

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Patent Information

Application #
Filing Date
06 September 2023
Publication Number
40/2023
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application

Applicants

Andhra University
Visakhapatnam, Andhra Pradesh, India. Pin Code: 530003

Inventors

1. Ms.Lakshmi Prasanna
Research Scholar, Department of Electrical Engineering, Andhra University College of Engineering, Andhra University, Visakhapatnam, Andhra Pradesh, India. Pin Code: 530003
2. Dr.T.R.Jyothsna
Professor, Department of Electrical Engineering, Andhra University College of Engineering, Andhra University, Visakhapatnam, Andhra Pradesh, India. Pin Code: 530003

Specification

Description:he present invention pertains generally to the domain of power electronics and, more specifically, to a novel seven-level inverter design. The primary focus of this invention is the utilization of switched capacitors to create a multilevel inverter topology, optimized for renewable energy sources such as solar and wind applications.
The inventive aspects further extend to a sensor less capacitor voltage balancing method, which enhances system reliability and reduces the complexity of control mechanisms. The integration of a phase disposition pulse-width modulation (PD-PWM) for operational control and the unique combination of semiconductor devices in the proposed circuitry also form part of this inventive domain.
Background of the invention:
The evolution of power electronics has been marked by the continuous pursuit of enhancing efficiency, scalability, and adaptability, particularly in the context of renewable energy applications. Historically, inverters played a crucial role in converting direct current (DC), commonly harvested from renewable sources like solar panels and wind turbines, into a usable alternating current (AC) for domestic and industrial applications. However, conventional two-level inverters, which merely switch between two voltage levels, were found to have limitations in efficiency and performance, especially in high-power applications. This led to the exploration of multilevel inverters, devices that produce an output voltage from several levels of DC voltages.
Multilevel inverters emerged as a preferable alternative due to their capacity to produce higher quality output waveforms, reduced harmonic distortion, and better electromagnetic compatibility. Yet, as these inverters increased in complexity, particularly when increasing the number of levels, they were often accompanied by intricate control mechanisms and a heightened number of semiconductor devices. These characteristics, in turn, escalated costs and introduced potential points of failure.
A significant challenge in multilevel inverters has been the maintenance of voltage levels across various capacitors. Unequal voltage distribution could lead to inefficient operations or even damage the system. Traditional methods to balance these voltages demanded complex sensor-based feedback systems which not only increased the cost but also augmented the intricacy of the control architecture.
In the backdrop of these challenges, the industry's focus shifted to devising topologies that simplified control mechanisms, reduced component count, and inherently balanced capacitor voltages. Switched-capacitor based multilevel inverters emerged as a promising solution in this space. These inverters ingeniously leveraged capacitors in a switching sequence to generate multiple voltage levels, effectively reducing the dependency on multiple distinct DC sources. Furthermore, the integration of capacitors in a switched scheme inherently addressed the voltage balancing issue, presenting a paradigm shift in multilevel inverter design.
Simultaneously, there was a push to optimize modulation techniques for these inverters. Pulse Width Modulation (PWM), a technique that modulates the width of the pulses in a pulse train in direct proportion to a small control signal, was identified as an effective control method. Among the several PWM techniques, the phase disposition PWM (PD-PWM) emerged as a favorable approach due to its symmetrical nature and potential to further reduce harmonic content.
The invention combines the operational benefits of switched-capacitor techniques and PD-PWM control methods to create a seven-level inverter that is not only efficient but also simpler and more reliable than its predecessors. By using just a single DC source and leveraging a unique arrangement of capacitors and semiconductor switches, the design significantly lowers the component count. This is a notable achievement as it directly impacts the overall cost and complexity of the system, making it more accessible for a variety of applications.
Moreover, the invention introduces a sensorless capacitor voltage balancing mechanism that eliminates the need for additional control loops and sensors, which are usually required for maintaining equal voltage across the capacitors in traditional multilevel inverters. This advancement is of paramount importance because it not only simplifies the control architecture but also improves the system's reliability by minimizing points of failure. This is particularly critical for renewable energy systems, where reliability and operational efficiency are essential for effective utilization of intermittent energy sources like solar and wind.
What sets the invention further apart is its inherent capability to prevent unintentional excessive voltage across the capacitors. Traditional designs often require intricate protection circuits to manage this issue, adding another layer of complexity and potential failure points. However, the proposed seven-level inverter naturally avoids this problem, thereby enhancing the overall safety and reliability of the system.
Lastly, by integrating the PD-PWM method for operational control, the invention provides superior performance in terms of output waveform quality and harmonic distortion. This makes it highly suitable for high-power applications where the quality of the output voltage is critical. The PD-PWM technique not only complements the switched-capacitor architecture but also offers a harmonious interplay between the two, yielding a highly efficient and reliable inverter system.
In summary, the present invention stands as a remarkable contribution to the field of power electronics and multilevel inverters, incorporating groundbreaking solutions to longstanding challenges. It serves as a pioneering platform that has the potential to revolutionize not just renewable energy applications but also broader domains that demand high-efficiency, high-reliability power conversion systems. Given its manifold advantages, the invention is positioned to become a cornerstone in the next wave of advancements in power electronics, shaping the future landscape of energy systems. Some patent prior art related to proposed invention mentioned below.
Title: Multi-Level Inverter Using Dual DC Sources
Summary: This patent introduces a multilevel inverter design using two distinct DC sources. While it provides multiple voltage levels, the requirement of dual sources increases complexity and costs. This is in contrast to the proposed invention which uses a single DC source.
Title: Capacitor Balancing Mechanism for Multi-Level Inverters
Summary: The invention provides a method for balancing the voltage across capacitors in multilevel inverters using sensors. While effective, the method introduces additional components and potential failure points. The proposed invention's sensorless approach offers a simplified solution.
Title: Pulse Width Modulation Technique for Five-Level Inverters
Summary: This patent introduces a specific PWM technique optimized for five-level inverters. It highlights the potential of PWM in improving output waveform quality, but is limited to five levels, unlike the proposed seven-level inverter.
Title: Safety Circuits for Preventing Excessive Capacitor Voltage in Inverters
Summary: The invention discusses various circuits to protect multilevel inverters from unintentional excessive voltage on capacitors. While useful, the proposed invention’s inherent design prevents such voltage issues without additional circuits.
Title: Three-Level Inverter with Switched-Capacitor Configuration
Summary: This patent lays foundational work on using switched-capacitors in inverters but is limited to a three-level configuration. The proposed invention expands on this concept to achieve seven levels.
Title: Integrating Diodes with IGBTs for Optimized Inverter Performance
Summary: A design principle for multilevel inverters, this patent focuses on the integration of diodes with IGBTs to enhance performance. It bears similarity to the proposed invention but doesn't delve into seven-level configuration or PD-PWM control.
Title: Phase Disposition Pulse Width Modulation for Renewable Energy Converters
Summary: This patent presents the benefits of PD-PWM in renewable energy systems, emphasizing harmonic reduction. It aligns with the control methodology in the proposed invention but lacks the unique seven-level, switched-capacitor configuration.
Title: Sensor-Based Multilevel Inverter for Wind Energy Applications
Summary: This invention introduces a multilevel inverter tailored for wind energy, but relies heavily on sensors for operation and control. The proposed invention offers a sensorless solution, reducing complexity and potential points of failure.
Summary of the proposed invention:
The proposed invention introduces a novel seven-level inverter designed optimally for renewable energy applications, such as solar and wind energy systems. Powered by a single DC source, this unique inverter configuration leverages the capabilities of floating capacitors and utilizes a switched-capacitor approach to generate the desired output.
One of its hallmark features is its intrinsic sensor less capacitor voltage balancing capability, which effectively diminishes control challenges, thereby ensuring a reliable tri-polar staircase pattern output without unintentional capacitor over-voltage scenarios.
This design not only simplifies the inverter's architecture but also reduces the number of required semiconductor devices. The operation of this inverter is seamlessly controlled using a phase disposition pulse-width modulation (PD-PWM) technique. In essence, the proposed inverter embodies efficiency, reliability, and simplicity, making it a significant advancement in the realm of multilevel inverters.
Brief description of the proposed invention:
The proposed invention showcases an avant-garde advancement in the field of power electronics, specifically targeting the realm of multilevel inverters. This novel seven-level inverter is an epitome of engineering precision that has been specifically conceptualized and designed with renewable energy applications, like solar and wind energy systems, in mind. Operating off a singular DC source, this inverter marks a departure from traditionally complex systems that often rely on multiple DC sources, effectively presenting a more streamlined and efficient approach to energy conversion.
A core innovation of this invention lies in its adept utilization of floating capacitors. These capacitors, when combined within the framework of a switched-capacitor scheme, play a pivotal role in crafting the inverter's unique capability. This integration is pivotal as it endows the inverter with a sensorless capacitor voltage balancing capability. Historically, balancing the voltage across capacitors in multilevel inverters has been a challenge, often requiring intricate control mechanisms and additional components. However, with the proposed design, this issue is addressed head-on and resolved with an elegant simplicity. By eliminating the need for external sensors or complicated feedback systems, the inverter offers a more robust, reliable, and cost-effective solution.
A noteworthy element of this invention is its exceptional focus on ensuring that the operational environment remains free from unintentional capacitor excessive voltage. Such scenarios, often encountered in conventional designs, can be detrimental, causing system failures or even damage. By intrinsically designing the inverter to naturally avoid such pitfalls, the system's overall reliability and safety quotient are significantly enhanced.
To further refine the operational excellence of this inverter, the inventors incorporated the phase disposition pulse-width modulation (PD-PWM) technique. PWM, a revered control methodology in power electronics, has the ability to sculpt and modulate the output waveform with impeccable precision. By choosing the PD-PWM variant, the invention ensures that the output waveform is not just of high quality but also reduced in harmonic distortion. This precision control, when juxtaposed with the intrinsic design of the seven-level inverter, ensures that the system can cater to high-power applications with unparalleled efficiency and reliability.
Moreover, in the vast landscape of multilevel inverters, component count and system complexity often go hand in hand. However, the proposed invention shatters this norm. Despite its advanced capabilities, the inverter requires fewer semiconductor devices. This reduction is not just a testament to efficient design but also translates to tangible benefits like reduced costs, easier maintenance, and enhanced system longevity.
The intricate choreography of the seven-level inverter's operation is manifested through a well-defined set of operating modes. These modes delineate the specific configurations and operations of the switches and capacitors, ensuring that the inverter can produce the required output voltage levels with precision.
Mode I: Here, the inverter aims to produce a +3Vdc output voltage level. To accomplish this, the DC voltage source and capacitor C2 are discharged by making switches S2, S5, and S7 conductive. Throughout this mode, capacitor C1 remains unaffected, and the integrated diode remains in a reverse-biased state, ensuring no current flows through it.
Mode II: Transitioning to a +2Vdc output voltage level, switches S2, S4, and S7 come into play. They establish a conductive path that connects the DC voltage source and capacitor C1 directly to the load. Concurrently, capacitor C2 is set on a charging trajectory, drawing power from both the DC voltage source and capacitor C1, facilitated by the conduction of switches S4 and S6.
Mode III: For generating a +1Vdc voltage level, the diode, alongside switches S2 and S7, takes the lead. Their combined conductivity results in the desired output. Simultaneously, switch S3 facilitates the charging of capacitor C1. Throughout this mode, capacitor C2 remains unaffected.
Mode IV & V: Both these modes are designed to produce a zero voltage across the load. In Mode IV, switches S2, S3, and S8 are activated, producing the desired zero voltage. Capacitor C1 gets charged to the Vdc level through the diode's forward biasing and the conduction of switch S3. Mode V replicates the zero voltage output but with a subtle switch in the active components. Here, switches S1 and S7 come into play, but the charging mechanism for capacitor C1 remains consistent with Mode IV.
Mode VI: Delving into the negative voltage territory, this mode produces a -1Vdc voltage level. The DC source connects to the load via the combined conductivity of the diode and switches S1 and S8. Mirroring the activities of Mode V, capacitor C1 charges up to the Vdc voltage level, while capacitor C2 remains passive.
Mode VII: To generate a -2Vdc voltage level, the inverter configures the discharge of capacitor C1 towards the load, facilitated by switches S1, S4, and S8. In parallel, capacitor C2 charges up, reaching a voltage level of 2Vdc. This charging mechanism is orchestrated by the combined efforts of capacitor C1, the DC source, and switches S4 and S6.
Mode VIII: The final mode, aiming for a -3Vdc output level, involves the combined operation of switches S1, S5, and S8. They connect both the DC source and capacitor C2 to the load. Notably, during this mode, capacitor C1 remains dormant, with no active role in shaping the output.
Each mode, meticulously orchestrated, emphasizes the interplay between the switches and capacitors, ensuring that the seven-level inverter can transition smoothly across a wide spectrum of voltage levels. This systematic operation, in tandem with the intrinsic design and control methodologies, ensures that the proposed inverter can cater to a myriad of applications with unmatched precision and efficiency.
, Claims:1. A seven-level inverter powered by a singular DC source, wherein said inverter utilizes floating capacitors (FC) integrated within a switched-capacitor framework.
2. The inverter of claim 1, wherein it exhibits an intrinsic sensorless capacitor voltage balancing capability that minimizes control challenges and prevents unintentional capacitor over-voltage scenarios.
3. The inverter of claim 1 or 2, wherein it operates based on a phase disposition pulse-width modulation (PD-PWM) control technique to modulate and control its output.
4. The inverter of claim 1, wherein the number of semiconductor devices is fewer than traditional seven-level inverters, thereby providing a streamlined configuration.
5. The inverter of any preceding claims, wherein the floating capacitors (FC) are utilized in such a manner that they either provide or absorb energy, contributing to the voltage levels.
6. The inverter of any preceding claims, wherein specific switch combinations, when operational simultaneously, can lead to a malfunctioning DC voltage source condition and thus are designed to operate in complementary mode.
7. The inverter of any preceding claims, wherein it can generate multiple voltage levels ranging from +3Vdc to -3Vdc by configuring switches and capacitors in predefined modes.
8. The inverter of claim 7, wherein each mode dictates a unique configuration of switches and capacitors to produce the specific output voltage level.
9. The inverter of any preceding claims, optimized for renewable energy applications, specifically solar and wind systems, due to its efficient design and minimized component count.
10. The inverter of any preceding claims, wherein the capacitors, particularly C1 and C2, have peak voltage ratings of Vdc and 2Vdc respectively, and play critical roles in generating the desired output voltage levels.

Documents

Application Documents

# Name Date
1 202341059799-STATEMENT OF UNDERTAKING (FORM 3) [06-09-2023(online)].pdf 2023-09-06
2 202341059799-REQUEST FOR EARLY PUBLICATION(FORM-9) [06-09-2023(online)].pdf 2023-09-06
3 202341059799-FORM-9 [06-09-2023(online)].pdf 2023-09-06
4 202341059799-FORM 1 [06-09-2023(online)].pdf 2023-09-06
5 202341059799-DRAWINGS [06-09-2023(online)].pdf 2023-09-06
6 202341059799-DECLARATION OF INVENTORSHIP (FORM 5) [06-09-2023(online)].pdf 2023-09-06
7 202341059799-COMPLETE SPECIFICATION [06-09-2023(online)].pdf 2023-09-06