Claims:1. A system to detect and indicate series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said system comprising:
at least one analog processing module configured to receive at least one current signal as input, detect maximum peak amplitude for every positive and negative half cycle of said current signal and thereby generate at least one output;
at least one ARC detection module configure to:
receive said output from said analog processing module as first input and at least one zero cross detector (ZCD) pulse from at least one ZCD module as second input;
measure said maximum peak amplitude for every positive and negative half cycle depending upon said ZCD pulse;
determining variation in successive peak for every positive and negative half cycle and thereby detecting said series arc fault events if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold.

2. The system as claimed in claim 1, wherein said analog processing module comprises: at least one inverting amplifier, at least one negative peak detector, and at least one positive peak detector.

3. The system as claimed in claim 2, wherein said negative peak detector and said positive peak detector configured to measure said maximum peak amplitude for every negative and positive half cycle respectively.

4. The system as claimed in claim 1, wherein said ARC detection module configured to measure maximum peak amplitude for every negative half cycle during the rising edge of said ZCD pulse and measure maximum peak amplitude for every positive half cycle during the falling edge of said ZCD pulse.

5. The system as claimed in claim 1, wherein said current signal is a high frequency current signal of frequency range from 5 kHz-25kHz,
6. The system as claimed in claim 1, wherein upon detection of said series arc fault events, at least one trip signal is provided to at least one electrical switch through a trip mechanism to protect an electrical circuit from damage caused by said series arc fault.

7. An ARC detection module to detect and indicate series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said ARC detection module comprising:
first receiving means to receive one or more values corresponding to maximum peak amplitude of at least current signal for every positive and negative half cycle through at least one analog-to-digital convertor means;
second receiving means to receive at least one zero cross detector (ZCD) pulse from at least one ZCD module;
measuring means configured to measure said values corresponding to maximum peak amplitude for every positive and negative half cycle depending upon said ZCD pulse;
at least one comparing means configured to compare each said values with its successive values to determine variation, wherein if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold, said series arc fault events is detected and thereby at least one trip signal is issued.

8. The ARC detection module as claimed in claim 7, further comprises at least one storing means configured to store said measured values corresponding to said maximum peak amplitude for every positive and negative half cycle for subsequent comparison.

9. The ARC detection module as claimed in claim 8, wherein said storing means is a type of positive half cycle buffer and a negative half cycle buffer of a predefined size.

10. A method for to detecting and indicating series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said method comprising:
receiving, by means of at least one analog processing module, at least one current signal as an input signal;
measuring, by means of at least one peak detector in said analog processing module, maximum peak amplitude of said current signal for every positive and negative half cycle respectively;
receiving, by means of at least one ARC detection module, said maximum peak amplitude of said current signal for every positive and negative half cycle as first input and at least one zero cross detector (ZCD) pulse from at least one ZCD module as second input; and thereby
measuring, by means of said ARC detection module, one or more values corresponding to said maximum peak amplitude of said current signal for every positive and negative half cycle respectively depending upon said ZCD pulse;
comparing, by means of a comparing means, said values with its successive values for determining variation, wherein if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold, said series arc fault events is detected and thereby at least one trip signal is issued.

11. The method as claimed in claim 10, wherein during the rising edge of said ZCD pulse, said ARC detection module configured to measure values corresponding to said maximum peak amplitude for every positive half cycle, and during the falling edge of said ZCD pulse, said ARC detection module measure values corresponding to maximum peak amplitude for every negative half cycle.

12. The method as claimed in claim 10, further comprises the steps of storing, by means of a positive and negative buffer of a predefined size in said ARC detection module, said measured values corresponding to said maximum peak amplitude for subsequent comparison.

13. The method as claimed in claim 10, wherein if said variation exceeds a preset first threshold value, a flag variable value is incremented.

14. The method as claimed in claim 10-13, further comprises:
analyzing values in said positive and negative buffer completely; and thereby
comparing said flag variable value with said second threshold value,
wherein, if said flag variable value exceeds said second threshold value, said series arc fault events is detected.
, Description:TECHNICAL FIELD

[001] The present subject matter described herein, in general, relates to arc fault circuit interrupters or arc fault detection devices, and more particularly, to a method for series arc detection by analyzing high frequency noise induced in the power line due to arcing.

BACKGROUND

[002] An electric arc is a condition of luminous and hot discharge of electricity in air, gas existing between two conductors. While series arcing is a condition in which the fault occurs in series with the load. This fault can be due to lose contact, physical damage to the cable etc. Device such as Arc Fault detection device or Arc Fault Circuit Interrupter is intended for arc fault detection.

[003] The current is limited by the load impedance and impedance offered by the arc and the condition goes undetected as the conventional circuit breakers cannot detect it as overload or as short circuit. Series arcs if not interrupted can lead to overheating of the cable and can subsequently lead to an electrical fire. Thus to mitigate this threat there is a need for a method to reliably detect a series arc and interrupt the circuit in which this condition has developed.

[004] Reference is made to the prior art document US 6972572 B2, discloses an arc fault detector which detect series and parallel arcing by Arc detector circuit. The arc detector circuit includes a Peak detector with delay and a microcontroller with edge timing logic. The derivative (di/dt) signal of the current is fed to the Arc detector circuit which then gives the trip signal when arcing is present.

[005] Reference is made to US 20140104731 A1 that involves Arc detection based on four signals having different characteristics. The first signal is the low pass filtered output representing the fundamental component of line current, second & third signal represent the positive and negative peaks of derivative of current for any step change as a function of time. Peak detector circuit with RC n/w delay uses derivative (di/dt) as the input signal and the fourth signal is the integrated band pass filtered output representing the high frequencies present in the current signal.

[006] Reference is made to US 20080204950 A1, discloses Arc fault circuit interrupter and series arc fault detection method using plural high frequency bands. The series arc detection which involves extracting non-overlapping range of frequencies from AC line current through band pass filters. Peak detector circuit is used which detects corresponding peak current values for filtered frequency bands. The arc detection algorithm gives trip signal responsive to peak current values exceeding their respective thresholds for predetermined time.

[007] Reference is made to US 6433978 B1 discloses Arc fault detector with circuit interrupter. It detects both AC line frequencies and high frequencies associated with current signal. The signals are filtered by a second stage filter and then rectified. The two rectified signals are each split to produce peak by a Peak detector circuit and average levels for the fundamental and high frequency signals. Excessively high peaks in either the AC line frequency or high frequency current component instantly causes the relay mechanism of the AFCI to trip.

[008] Reference is made to US 7633729 B2 that discloses a method of detecting and indicating a presence of alternating current (AC) series arc fault events in current supplied by an AC electrical power source to an electrical load. The method comprises the steps of: measuring positive and negative current through the load over a first sample cycle of the AC power to establish first measured positive and first measured negative current levels; determining the absolute value of the first measured positive and first measured negative current levels to establish a first absolute positive current level and a first absolute negative current level; adding the first absolute positive current level and the first absolute negative current level to establish a first sum current level; measuring positive and negative current through the load over a second sample cycle staggered from the first sample cycle to establish second measured positive and second measured negative current levels; determining the absolute value of the second measured positive and second measured negative current levels to establish a second absolute positive current level and a second absolute negative current level; adding the second absolute positive current level and the second absolute negative current level to establish a second sum current level; subtracting the second sum current level from the first sum current level to establish a current difference level; and indicating a series arc fault event if the current difference level exceeds a predetermined threshold level. However, the variation in high frequency current peak for successive half cycles of the signal was not know from the prior art document.

[009] However, the drawbacks of the existing method for detection series arcing is as follows:
- The variation in current level due to arcing is significantly lower than the variation in HF noise.
- Inrush current can also lead to such variation that may result in nuisance trip.

[0010] Thus, in view of the existing arc venting mechanism for protecting electrical switchgear systems from arc fault explosion, there exist a dire need to provide an improved, cost-effective, and efficient apparatus for ventilation of arc gases and/or particles produced in an electrical switchgear system, so that no damaging effect is produced in the electrical switchgear system.

SUMMARY OF THE INVENTION

[0011] The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the present invention. It is not intended to identify the key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concept of the invention in a simplified form as a prelude to a more detailed description of the invention presented later.

[0012] A primary object of the present invention is to provide a system, method and device to reliably detect a series arc and interrupt an electrical circuit in case series arcing fault has occurred.

[0013] Another object of the present invention is to provide an arc detection mechanism which focusses on cycle to cycle comparison of maximum peaks of high frequency components present in the AC line current.

[0014] Yet another object of the present invention is to provide a series arc detection technique with the ability to detect low current series arc faults and with the ability to differentiate arc fault condition from intentional switching.

[0015] Accordingly to one aspect the present invention provides a system to detect and indicate series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said system comprising: at least one analog processing module configured to receive at least one current as input, detect maximum peak amplitude for every positive and negative half cycle of said current signal and thereby generate at least one output; at least one ARC detection module configure to:
receive said output from said analog processing module as first input and at least one ZCD pulse from at least one zero cross detector module as second input; measure said maximum peak amplitude for every positive and negative half cycle depending upon said ZCD pulse;
determining variation in successive peak for every positive and negative half cycle and thereby detecting said series arc fault events if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold.

[0016] In second aspect, the present invention provides an ARC detection module to detect and indicate series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said ARC detection module comprising:
first receiving means to receive one or more values corresponding to maximum peak amplitude of at least current signal for every positive and negative half cycle through at least one analog-to-digital convertor means;
second receiving means to receive at least one zero cross detector (ZCD) pulse from at least one ZCD module;
measuring means configured to measure said values corresponding to maximum peak amplitude for every positive and negative half cycle depending upon said ZCD pulse;
at least one comparing means configured to compare each value with successive values to determine variation in said measured values corresponding to said maximum peak amplitude, wherein if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold, said series arc fault events is detected and thereby at least one trip signal is issued.

[0017] In third aspect, the present invention provides a method for detecting and indicating series arc fault events in current supplied by at least one electrical power source to at least one electrical load in the power line, said method comprising:
• receiving, by means of at least one analog processing module, at least one current signal as an input signal;
• measuring, by means of at least one peak detector in said analog processing module, maximum peak amplitude of said current signal for every positive and negative half cycle respectively;
• receiving, by means of at least one ARC detection module, said maximum peak amplitude of said current signal for every positive and negative half cycle as first input and at least one zero cross detector (ZCD) pulse from at least one ZCD module as second input; and thereby
• measuring, by means of said ARC detection module, one or more values corresponding to said maximum peak amplitude of said current signal for every positive and negative half cycle respectively depending upon said ZCD pulse;
• comparing, by means of a comparing means, said values with its successive values for determining variation, wherein if said variation exceeds a first threshold for a predefined number of cycles depending upon a second threshold, said series arc fault events is detected and thereby at least one trip signal is issued.

[0018] Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

The above and other aspects, features, and advantages of certain exemplary embodiments of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings in which:

[0019] Figure 1 illustrates the high frequency noise during arcing and healthy current respectively, in accordance with an embodiment of the present subject matter.
[0020] Figure 2 shows the series arc detection and protection system according to an embodiment of this invention.
[0021] Figure 3 shows the process flow diagram for series arc detection according to an embodiment of this invention.

[0022] Persons skilled in the art will appreciate that elements in the figures are illustrated for simplicity and clarity and may have not been drawn to scale. For example, the dimensions of some of the elements in the figure may be exaggerated relative to other elements to help to improve understanding of various exemplary embodiments of the present disclosure. Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

[0023] The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary.

[0024] Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.

[0025] The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.

[0026] It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise.

[0027] By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic was intended to provide.

[0028] Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments and/or in combination with or instead of the features of the other embodiments.

[0029] It should be emphasized that the term “comprises/comprising” when used in this specification is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

[0030] It is also to be understood that the term “module” is used in the specification to indicate an apparatus, unit, component and the like, which is the incorporation of circuitry necessary for detecting arc faults into a circuit interrupting device. The term “means” when used in the specification is taken to specify the mode by which a result is achieved.

[0031] Reference is made to figure 1 which illustrates the high frequency noise during arcing (I) and healthy current (II) respectively, in accordance with an embodiment of the present subject matter. Arcing generates a high frequency noise during current conduction. The spectrum of this noise can range from few hertz to about 1GHz. The high frequency noise is only present during the conduction of current while the arc is sustained, and the noise disappears as soon as the arc is extinguished as shown in figure 1.

[0032] In one implementation, there are two independent circuit module of a peak detector that measures the maximum amplitude of high frequency noise separated from the current signal through high frequency current transformer or high pass/band pass filter in positive and negative half cycles separately. The measured positive and negative cycles are compared with at least one reference signal. The reference signal can be one or more preceding cycles. It is evident from figure 1 that the peaks of high frequency noise during arcing are highly intermittent while they are relatively stable during normal current conduction.

[0033] In one implementation, the method of detection of series arc relies on the randomness of peak of high frequency noise during arcing. When the electric circuit is free from any fault, the load will maintain a pattern such that the measures like high frequency noise peaks and even current peaks do not have a cycle to cycle variation. This regularity in the current waveform maintained by the load is disrupted when a series arc occurs in the system. The challenge is to discriminate between normal arcing (during switching operations, arcing at motor brush etc.) from an arc fault condition. The situation is further complicated because of the increased presence of modern power electronic loads which produces non-linear current waveforms which can be mistaken for arc fault current waveforms.

[0034] Reference is made to figure 2 shows the series arc detection and protection system according to the implementation of this invention. The source and load is connected via power line 7 through a circuit breaker 2. A high frequency current sensor/current sensor 3 having a high bandwidth senses the load current flowing through the power line 7. The signal is fed to an analog processing circuit module 4 which detects the maximum peak for each positive and negative half cycles of high frequency current and thus produces an output optimum for the control unit 5 to analyze the wave pattern. The control unit 5 is a microcontroller based system and contains peripherals like ADCs and timers. The arc detection algorithm is executed by the microcontroller in real time and upon detection of arc fault the trip signal is issued through the trip mechanism 8 to the circuit breaker 2 to isolate the circuit. The analog processing module (4) comprises: at least one inverting amplifier, at least one negative peak detector, and at least one positive peak detector. The negative peak detector configured to measure said maximum peak amplitude for every negative half cycle while the positive peak detector configured to measure positive half cycle.

[0035] In the event of series arc, high frequency components as well as transients may be present in load current that can be separated through high frequency CT or high pass/band pass filter. A normal DSP system will have to operate at a sampling frequency much higher than the system frequency to properly acquire the waveform. An analog processing stage that can detect the maximum peak amplitude of the sensed high frequency current at the end of each half cycle will greatly reduce the processing requirements of the digital stage. Also the analog processing stage can account for the current spikes and transients that can occur in the arcing state thus reducing loss of information due to digitization.

[0036] Reference is made to figure 3 that shows the process flow diagram for series arc detection according to an implementation of this invention.

[0037] In one implementation a method for such an analogue processing of data is provided. The high frequency current signal is fed to the analog circuit module which measures the maximum peak for every positive and negative half cycles depending upon the ZCD pulse from the controller unit. The line voltage is fed to a zero cross detector module. The microcontroller receives the zero cross detector output and based on the type of edge (rising or falling) the corresponding peak detector value can be sampled. Once the Analog-to-digital convertor (ADC) conversion is complete, the capacitor that holds the peak detector value has to be discharged. The circuit has one half cycle time of the current signal to discharge the capacitor. This is the specific advantage of using two independent circuits for positive and negative half cycles.

[0038] In one implementation, as shown in figure 3, the outputs from peak detector of the analog stage are connected to the ADC of the microcontroller. The ZCD output is also fed to the microcontroller. On a non-inverting logic the falling edge of the ZCD indicates the end of a positive half cycle, which means the output of the positive peak detector, is ready to be read. For the negative half cycle the same logic follows. The read values are stored in a positive half cycle buffer and negative half cycle buffer of predefined size. Once the buffer is filled, each data sample is compared with its successive data sample. If the value (difference) exceeds the set threshold, a flag variable is incremented. The flag variable is a direct indication of the number of disturbances in a limited period. Once the entire buffer is analyzed in this fashion the flag variable value can be compared with a second threshold value (i.e., a trip threshold). If the flag variable value is greater than the threshold, the condition can be considered as a persistent series arc condition and a trip signal can be issued.

[0039] According to the implementation, the ARC detection module configured to measure maximum peak amplitude for every negative half cycle during the rising edge of said ZCD pulse and measure maximum peak amplitude for every positive half cycle during the falling edge of said ZCD pulse.

[0040] As per standard IEC62606 and UL1699, Arc fault detection may occur within specified time for arc currents ranging from 2.5A upto 63A. Thus, threshold selection in this invention is based on the rated AC line current flowing through the system by continuously sensing the current from CT. Also, the sensitivity to series arc detection may improve by observing the width of the signal which becomes active when no event indication is available from the zero cross detector for period greater than the reference period.

[0041] Some of the important features of the present invention, considered to be noteworthy are mentioned below:
1. The present invention relates to a novel method for series arc detection by analyzing high frequency noise induced in the power line due to arcing.

2. The present invention refers to the arc detection mechanism which involves current as the input signal and then captures the maximum peak amplitude of high frequency component of current in every positive and negative half respectively. Trip signal is issued upon the maximum peaks exceeding the set thresholds in either of the half cycles.

3. The present invention focuses on cycle to cycle comparison of maximum peaks of high frequency components present in the AC line current. The frequency range can typically range from 5 kHz- 25 kHz.

4. The present invention aims at computing variation in peak amplitude of high frequency current component for successive positive and negative half cycle and detecting series arc when the variation exceeds the first threshold for predefined number of cycles depending upon second threshold.

5. The present invention involves maximum peak computation for each half cycles i.e., for positive and negative cycles. Variation in successive positive and negative peaks exceeding the threshold for predefined number of cycles will result in series arc detection.
6. The present invention provide at least one trip signal to at least one electrical switch upon detection of said series arc fault events through a trip mechanism to protect an electrical circuit from damage caused by series arc fault.

[0042] Although a system, apparatus and method to detect and indicate series arc fault events have been described in language specific to structural features and/or methods, it is to be understood that the embodiments disclosed in the above section are not necessarily limited to the specific features or methods or devices described. Rather, the specific features are disclosed as examples of implementations of the system, apparatus and method to detect and indicate series arc fault events.