F O R M 2

THE PATENTS ACT, 1970
(39 of 1970)
&
The Patents Rules, 2003
COMPLETE SPECIFICATION
(See section 10; rule 13)

1. Title of the invention : A SYSTEM AND A METHOD FOR BLOCKING THE BREAKER PROTECTION UNDER BREAKER FAILURE CONDITION

2. Applicant(s):

(a) NAME : LARSEN & TOUBRO LIMITED

(b) NATIONALITY : An Indian Company.

(c) ADDRESS : L & T House, Ballard Estate, Mumbai 400 001, State of Maharashtra, India

3. PREAMBLE TO THE DESCRIPTION

The following specification particularly describes the invention and the manner in which it is to be performed:

FIELD OF THE INVENTION

The present invention relates to embedded systems of the relay. More particularly, the invention is concerned about a system and a method for blocking the breaker protection under breaker failure condition.

BACKGROUND OF THE INVENTION

In the prior art, only AREVA MiCOM P14x has blocked over current concept. The disadvantages of the existing technology are that it is complicated and hence chances of malfunctioning with respect to interlocks with other functions are very high. It is not robust with respect to the way of detection

Thus, there is a need to overcome the drawbacks of the prior art. Therefore, the inventors have developed a system and a method for provide blocking the breaker protection under breaker failure condition.

OBJECTS OF THE INVENTION

An object of the present invention is to overcome the problems/disadvantages of the prior art.

Another object of the present invention is to provide a system for blocking the breaker protection under breaker failure condition

Yet, another object of the present invention is to provide a method for blocking the breaker protection under breaker failure condition

These and advantages of the present invention will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings.

SUMMARY OF THE INVENTION

According to one aspect of the present invention there is provided a system for blocking the breaker protection under breaker failure condition, said system comprising:
means for receiving plurality of phase currents;
an analog/digital (A/D) convertor means adapted to convert said phase currents into digital forms;
a numerical relay means comprising a data acquisition and metering unit and a CPU controller means wherein said data acquisition and metering unit adapted for receiving said digital forms; said CPU controller means being received said digital forms from said data acquisition and metering unit;
a protection unit being adapted for receiving said digital forms;
said protection unit being installed in said CPU controller means;
wherein said CPU controller means adapted to process the protection unit based on plurality of predetermined conditions; and
means for generating an output of the relay means.

According to another aspect of the present invention there is provided a method for blocking the breaker protection under breaker failure condition, said method comprising:
receiving plurality of phase currents;
converting said phase currents into digital form by means of an A/D converter means;
sending said digital forms to a data acquisition and metering unit of a numerical relay means;
sending said digital forms from said data acquisition and metering unit to a CPU controller means;
embedding said CPU controller means inside said numerical relay means;
installing said protection unit in said CPU controller means;
wherein processing the protection unit in the CPU controller means based on plurality of predetermined conditions; and
generating an output of the relay means.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

Other features as well as the advantages of the invention will be clear from the following description.
In the appended drawings:

Fig 1 illustrates a schematic representation of blocking the breaker protection under breaker failure condition.

Fig 2 illustrates a flow chart of the present invention.

DETAILED DESCRIPTION OF THE ACCOMPANYING DRAWINGS

In the following detailed description, reference is made to the accompanying drawings that form a part thereof, and illustrate the best mode presently contemplated for carrying out the invention. Further functioning of the mechanism has been discussed below to describe the way the mechanism operates. However, such description should not be considered as any limitation of scope of the present unit. The structure thus conceived is susceptible of numerous modifications and variations, all the details may furthermore be replaced with elements having technical equivalence. In practice the materials and dimensions may be any according to the requirements, which will still be comprised within its true spirit.

According to the invention there is provided a system and a method for blocking the breaker protection under breaker failure condition. In a power system, protection relay plays an important role for proper and uninterrupted functioning of the healthy section of the system. The main objective of the protection relay is detection and tripping/blocking of the breaker, depending upon the application, in order to isolate the faulty section of the system from the healthy part. The figure 1 depicts the flow of the inputs /commands to the corresponding hardware of the numerical relay. There are numerous components in terms of embedded systems (hardware) in the numerical relay of which Data acquisition & metering and CPU controller are the two main sub sections of the relay. Initially the current transformer secondary inputs i.e. phase currents which are analog inputs are fed to the Analog/Digital (A/D) converter located inside the relay. The A/D converter captures the current analog samples per cycle and converts into digitized form. 64 samples / cycle are captured by the A/D converter. These digitized samples from A/D converter go into the Data acquisition and metering section of the numerical relay and further to the protection algorithm logic. The protection algorithm logic is installed in the CPU controller, in a coded form, which is embedded inside the relay. Through Data acquisition and metering section, the current inputs advance to CPU controller where the protection algorithm logic is processed. After the procession of the logic, the digital output of the relay (hardware) gets the signal to block the over current elements of the relay and no trip command is issued to the breaker for over current element fault.

The Blocked Overcurrent logic is used to block the operation of phase, ground and sensitive ground elements under certain predefined set of conditions as described in the logic as shown in figure 2. The output of the logic is provided as an operand in the Flex Logic. When the operand goes high, it is programmed via Flex Logic to inhibit or block the operation of the over current elements.

The use of this logic is under the Breaker failure conditions. An over current element has picked up. Under these conditions if there is a Breaker failure and an alarm is initiated, the trip command should not be issued to the Breaker for the over current fault.

There should be a setting on the PC HMI through which we can enable/disable if the customer wants over current element blocking when there is Breaker failure.

The essential features of the present invention lies in the way of detection and the process flow/logic embedded in the CPU controller means. The process flow is incorporated in the embedded chip in the CPU controller and further the process flow is executed via the hardwired signal.

Inputs:-
a) Phase over current elements pickup (all 4 stages)
b) Ground over current elements pickup (all 4 stages)
c) Sensitive ground over current elements pickup (all 4 stages)

Outputs:-
Blocking for Overcurrent elements for interlocking within the firmware logic or raising the operand bit high in the CPU register map.

The methodology and techniques described with respect to the exemplary embodiments can be performed using a machine or other computing device within which a set of instructions, when executed, may cause the machine to perform any one or more of the methodologies discussed above. In some embodiments, the machine operates as a standalone device. In some embodiments, the machine may be connected (e.g., using a network) to other machines. In a networked deployment, the machine may operate in the capacity of a server or a client user machine in a server-client user network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The machine may comprise a server computer, a client user computer, a personal computer (PC), a tablet PC, a laptop computer, a desktop computer, a control system, a network router, switch or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while a single machine is illustrated, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein.

The machine may include a processor (e.g., a central processing unit (CPU), a graphics processing unit (GPU, or both), a main memory and a static memory, which communicate with each other via a bus. The machine may further include a video display unit (e.g., a liquid crystal display (LCD), a flat panel, a solid state display, or a cathode ray tube (CRT)). The machine may include an input device (e.g., a keyboard) or touch-sensitive screen, a cursor control device (e.g., a mouse), a disk drive unit, a signal generation device (e.g., a speaker or remote control) and a network interface device.

The disk drive unit may include a machine-readable medium on which is stored one or more sets of instructions (e.g., software) embodying any one or more of the methodologies or functions described herein, including those methods illustrated above. The instructions may also reside, completely or at least partially, within the main memory, the static memory, and/or within the processor during execution thereof by the machine. The main memory and the processor also may constitute machine-readable media.

Dedicated hardware implementations including, but not limited to, application specific integrated circuits, programmable logic arrays and other hardware devices can likewise be constructed to implement the methods described herein. Applications that may include the apparatus and systems of various embodiments broadly include a variety of electronic and computer systems. Some embodiments implement functions in two or more specific interconnected hardware modules or devices with related control and data signals communicated between and through the modules, or as portions of an application-specific integrated circuit. Thus, the example system is applicable to software, firmware, and hardware implementations.

In accordance with various embodiments of the present disclosure, the methods described herein are intended for operation as software programs running on a computer processor. Furthermore, software implementations can include, but not limited to, distributed processing or component/object distributed processing, parallel processing, or virtual machine processing can also be constructed to implement the methods described herein.

The present disclosure contemplates a machine readable medium containing instructions, or that which receives and executes instructions from a propagated signal so that a device connected to a network environment can send or receive voice, video or data, and to communicate over the network using the instructions. The instructions may further be transmitted or received over a network via the network interface device.

While the machine-readable medium can be a single medium, the term "machine-readable medium" should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term "machine-readable medium" shall also be taken to include any medium that is capable of storing, encoding or carrying a set of instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present disclosure.

The term "machine-readable medium" shall accordingly be taken to include, but not be limited to: tangible media; solid-state memories such as a memory card or other package that houses one or more read-only (non-volatile) memories, random access memories, or other re-writable (volatile) memories; magneto-optical or optical medium such as a disk or tape; non-transitory mediums or other self-contained information archive or set of archives is considered a distribution medium equivalent to a tangible storage medium. Accordingly, the disclosure is considered to include any one or more of a machine-readable medium or a distribution medium, as listed herein and including art-recognized equivalents and successor media, in which the software implementations herein are stored.

The illustrations of arrangements described herein are intended to provide a general understanding of the structure of various embodiments, and they are not intended to serve as a complete description of all the elements and features of apparatus and systems that might make use of the structures described herein. Many other arrangements will be apparent to those of skill in the art upon reviewing the above description. Other arrangements may be utilized and derived therefrom, such that structural and logical substitutions and changes may be made without departing from the scope of this disclosure. Figures are also merely representational and may not be drawn to scale. Certain proportions thereof may be exaggerated, while others may be minimized. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

Thus, although specific arrangements have been illustrated and described herein, it should be appreciated that any arrangement calculated to achieve the same purpose may be substituted for the specific arrangement shown. This disclosure is intended to cover any and all adaptations or variations of various embodiments and arrangements of the invention. Combinations of the above arrangements, and other arrangements not specifically described herein, will be apparent to those of skill in the art upon reviewing the above description. Therefore, it is intended that the disclosure not be limited to the particular arrangement(s) disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments and arrangements falling within the scope of the appended claims.

ADVANTAGES OF THE INVENTION

1. It is much simpler and hence chances of malfunctioning w.r.t interlocks with other functions are very less.
2. The design is more robust with respect to the way of detection.

Abbreviations used:
CPU: Central processing unit
PC: Personal computer
HMI: Human machine interface
A/D: Analog to digital
O/C: Overcurrent

WE CLAIM

1. A system for blocking the breaker protection under breaker failure condition, said system comprising:
means for receiving plurality of phase currents;
an analog/digital (A/D) convertor means adapted to convert said phase currents into digital
forms;
a numerical relay means comprising a data acquisition and metering unit and a CPU controller means wherein said data acquisition and metering unit adapted for receiving said digital forms; said CPU controller means being received said digital forms from said data acquisition and metering unit;
a protection unit being adapted for receiving said digital forms;
said protection unit being installed in said CPU controller means;
wherein said CPU controller means adapted to process a blocking operand for the corresponding Overcurrent element, based on plurality of predetermined condition of Breaker failure alarm is high and the blocking Overcurrent logic is enabled through controller (ON/OFF) and pick up of any Overcurrent element among Phase Overcurrent, Ground Overcurrent and/or Sensitive Ground Overcurrent is raised in system through current and voltage value from the Data Acquisition & metering and protection settings.

2. The system as claimed in claim 1, wherein said A/D converter means being operatively located inside said relay means.

3. The system as claimed in claim 1, wherein said A/D converter means being adapted for capturing plurality of phase currents around 64 samples/cycle.

4. The system as claimed in claim 1, wherein said plurality of predetermined conditions comprising:
a) blocking overcurrent (O/C) logic being enabled;
b) breaker failure alarm being high; and
c) the phase O/C elements being above pickup;
d) the Ground O/C element being above pickup;
e) the Sensitive Ground O/C element being above pickup; or
f) sum of said elements being high; and
g) making a blocking operand high for the corresponding O/C element.

5. A method for blocking the breaker protection under breaker failure condition, said method comprising:
receiving plurality of phase currents;
converting said phase currents into digital form by means of an A/D converter means;
sending said digital forms to a data acquisition and metering unit of a numerical relay means;
sending said digital forms from said data acquisition and metering unit to a CPU controller means;
embedding said CPU controller means inside said numerical relay means;
installing said protection unit in said CPU controller means;
wherein processing the protection unit in the CPU controller means based on plurality of predetermined conditions; and
generating an output of the relay means.

6. The method as claimed in claim 5, wherein said plurality of phase currents being captured about 64 samples/cycle by said A/D converter means.

7. The method as claimed in claim 5, wherein said set of predetermined conditions comprising:
a) blocking overcurrent (O/C) logic being enabled;
b) breaker failure alarm being high; and
c) phase O/C elements being above pickup;
d) ground O/C element being above pickup;
e) sensitive ground O/C element being above pickup; or
f) sum of said elements being high; and
g) making a blocking operand high for the corresponding O/C element

8. A system for blocking the breaker protection under breaker failure condition as herein substantially described and illustrated with the accompanying drawings.

9. A method for blocking the breaker protection under breaker failure condition as herein substantially described and illustrated with the accompanying drawings.