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A System And A Method Of Depositing Amorphous Silicon Layers On Silicon Wafers

Abstract: A novel system and a method of depositing amorphous layers on silicon wafers by plasma enhanced chemical vapor deposition (PEVCD) process in a vacuum chamber (9) for fabrication of passivated interface heterojunction solar cells (PIHJ) comprising Perforated stainless steel sheet (1), Silicon wafer substrate (3), Wafer substrate carrier (2), Heater plate (4), Shower head (6), RF power (7), Gas inlet to cathode (8), Characterized by reduction of plasma damage and uniformity of deposited layers.

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Patent Information

Application #
Filing Date
15 March 2017
Publication Number
38/2018
Publication Type
INA
Invention Field
CHEMICAL
Status
Email
lsdavar@vsnl.com
Parent Application
Patent Number
Legal Status
Grant Date
2020-07-14
Renewal Date

Applicants

BHARAT HEAVY ELECTRICALS LIMITED
with one of its Regional offices at REGIONAL OPERATIONS DIVISION (ROD), PLOT NO : 9/1, DJ Block 3rd Floor, Karunamoyee, Salt Lake Registered Office at BHEL HOUSE, SIRI FORT, NEW DELHI- 110049, INDIA

Inventors

1. Vinayan Bhardwaj
Bharat Heavy Electricals Limited, ASSCP, Gurgaon, Haryana, India 122003
2. Nitin Gupta
Bharat Heavy Electricals Limited, ASSCP, Gurgaon, Haryana, India 122003
3. Dr. Anil Kumar Saxena
Bharat Heavy Electricals Limited, ASSCP, Gurgaon, Haryana, India 122003

Specification

FIELD OF INVENTION
The invention relates to Plasma Enhanced Chemical Vapor Deposition (PECVD) process
of amorphous silicon layers on crystalline silicon wafers for fabrication of silicon
heterojunction solar cells.
BACKGROUND OF THE INVENTION & PRIOR ARTS
Plasma Enhanced Chemical Vapor Deposition (PECVD) is a process by which thin films
of various materials can be deposited on substrates at lower temperature (100oC-
350oC). In PECVD processes, deposition is achieved by introducing reactant gases
between parallel electrodes—a grounded electrode and a RF-energized electrode. The
grounded electrode typically holds the substrate. The capacitive coupling between the
electrodes excites the reactant gases into a plasma, which induces a chemical reaction
and results in reaction products being deposited on the substrate. The substrate which
is placed on the grounded electrode, is typically heated to 150°C to 350°C, depending
on the specific film requirements. The lower deposition temperatures are critical in
many applications like silicon heterojunction solar cells where higher temperatures can
damage the devices being fabricated.
The films typically deposited using PECVD are silicon nitride (SixNy), silicon dioxide
(SiO2), silicon oxy-nitride (SiOxNy), silicon carbide (SiC), and amorphous silicon (a-Si).
For fabrication of heterojunction solar cells silane (SiH4), the silicon source gas, is

combined with hydrogen gas to form undoped a-Si layer. For doped a-Si layers
deposition, dopant gases i.e. diborane for p type layer and phosphine for n type layer
need to be added with SiH4 and hydrogen.
In PECVD process electrically active defects are likely to be generated near the surface
of the silicon substrate due to bombardment by highly energetic particles during the
deposition process. Ions bombardment of the growing film may cause a generation of
pinholes and the appearance of charge in the film. To prevent plasma damage, remote
plasma is used but that has a limitation of less uniform film deposition.
In this invention, a grounded perforated sheet is placed between the RF charged
electrode and grounded electrode (substrate holder). Due to this high energy ion will be
attracted to perforated grounded sheet and only radicals will reach the substrate. This
will result in reduction in plasma damage and better uniformity of deposited layers.
During patent search no patent related to current invention is found.
OBJECTS OF THE INVENTION
The object of the invention is to develop a system and a method to reduce plasma
damage in the process of deposition of amorphous silicon (a-Si) layers on silicon wafers
Further the object of the invention is to develop a method to bring in uniform
deposition of amorphous silicon layers on the silicon wafers.

SUMMARY OF THE INVENTION
For fabrication of heterojunction solar cells layers of a-Si, doped a-Si layers and ITO
layers needs to deposited on silicon wafers. While ITO layers are mostly deposited by
sputtering technique, amorphous silicon (a-Si) thin films are generally deposited by
plasma enhanced chemical vapour deposition (PECVD).
In PECVD processes, deposition is achieved by introducing reactant gases between
parallel electrodes—a grounded electrode and an RF-energized electrode. The
capacitive coupling between the electrodes excites the reactant gases into a plasma,
which induces a chemical reaction and the resulting product or reactions deposited on
the substrate. The most common ionization technique for thin film deposition is an
electrical discharge between two electrodes wherein positive ions are accelerated
towards the surface, leading to ion bombardment.
In this invention a grounded perforated sheet is placed between the RF charged
electrode and grounded electrode (substrate holder). Ions are attracted to perforated
ground sheet and only radicals are allowed to reach the substrate. This results in
reduction of plasma damage and better uniformity of layers.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
Figure 1 shows the system of depositing layers in vacuum chamber with allied
components.

Figure 2 shows the perforated stain less steel sheet controlling the deposition of
layers.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT OF THE
INVENTION
Amorphous silicon layers are deposited on silicon wafers by PECVD process in vacuum
chamber for fabrication of Passivated Interface Heterojunction Solar cells (PIHJ) solar
cells. The schematic of perforated ground sheet arrangement is shown in fig.1.The
substrate i.e. silicon wafer (3) is placed on the wafer carrier (2) and wafer carrier is put
in the vacuum chamber for deposition. The substrate is heated before deposition either
in preceding chamber or in the process chamber itself by positioning over the heater
plate (4). The gas is fed into the system through shower head electrode (6).
The gas is injected and required plasma power is applied to RF electrode so that plasma
is generated between shower head and carrier. Once Silane (SiH4) is injected in the
reactor and the power is applied to the RF electrode, electrons are accelerated by the
electric field and gain enough energy to dissociate SiH4. The primary reactions between
electrons and silane can be of different types like dissociation, ionization, attachment,
etc. Radicals are the main product of the reaction, followed by ions. Within each group
of species SiH3 is the most abundant and desirable. The silicon radicals (SiH3, SiH2,
SiH, Si) react on the substrate in different amounts depending on the process
conditions. All ions will be accelerated towards the substrate with energy of the order of

the plasma potential. Energy of impinging ions is a crucial parameter which affects the
optical and electronic properties of a-Si layers. Bombardment by highly energetic
particles during the deposition process, plasma bombardment of the growing dielectric
film may cause generation of pinholes and the appearance of charge in the deposited
film. Ions are accelerated towards the surface, leading to ion bombardment.
In this invention stainless steel perforated sheet (1) is designed and fabricated. The
perforated sheet is designed such that deposition should take place uniformly with
reduced plasma damage. Holes are uniformly distributed over the sheet. The design is
as per drawing in fig.2. The sheet is placed beneath the shower head electrode and is
grounded by attaching to ground shield of shower head electrode. During deposition,
ions are attracted to grounded perforated sheet and only radicals are allowed to reach
the substrate by passing through the holes in the sheet. This results in reduction of
plasma damage and better uniformity of deposited layers.
During plasma processing, devices fabricated on silicon wafers are usually directly
exposed to plasma. In the plasma ambient ions and electrons are generated in the
discharge. A steady state voltage appears on the electrode due to charge collection and
the resulting electrical stress can damage the deposited film.

WE CLAIM
1. A novel system and a method of depositing amorphous silicon layers on silicon
wafers by plasma enhanced chemical vapor deposition (PEVCD) process in a vacuum
chamber (9) for fabrication of passivated interface heterojunction (PIHJ) solar cells
comprising :-
a) Perforated stainless steel sheet (1)
b) Silicon wafer substrate (3)
c) Wafer substrate carrier (2)
d) Heater plate (4)
e) Shower head (6)
f) RF power (7)
g) Gas inlet to cathode (8)
Characterized by reduction of plasma damage and uniformity of deposited layers.
2. The system as claimed in claim 1, wherein a perforated stainless steel sheet (1)
designed and fabricated such that the perforated holes are uniformly distributed
over the sheet, disposed beneath the shower head electrode (6) and grounded (5).
3. The system as claimed in claim 1, wherein silicon wafer substrate (3) , placed on the
wafer carrier (2), disposed beneath the perforated steel (1) in between electrodes
for deposition of layers.

4. The system as claimed in claim 1, wherein heater plate (4) disposed under the
carrier heater(3) for heating the substrate
5. The system as claimed in claim 1, wherein the showerhead electrode (6) through
which the gas is fed by gas inlet passage (8) to cathode for ionization.
6. The system as claimed in claim 1, wherein the RF power (7) is applied to the
electrode for generation of plasma between shower head and carrier.
7. A method of depositing amorphous silicon layers on silicon wafers (3) by plasma
enhanced chemical vapor deposition (PECVD) process by placing grounded
perforated sheet (1) between the RF charged electrode and grounded electrode
(substrate holder) characterized by allowing only the radicals to reach the substrate
and reducing plasma damage and having better uniformity of layers.

Documents

Application Documents

# Name Date
1 Power of Attorney [15-03-2017(online)].pdf 2017-03-15
2 Form 3 [15-03-2017(online)].pdf 2017-03-15
3 Form 20 [15-03-2017(online)].pdf 2017-03-15
4 Form 1 [15-03-2017(online)].pdf 2017-03-15
5 Drawing [15-03-2017(online)].pdf 2017-03-15
6 Description(Complete) [15-03-2017(online)].pdf_61.pdf 2017-03-15
7 Description(Complete) [15-03-2017(online)].pdf 2017-03-15
8 Other Patent Document [25-03-2017(online)].pdf 2017-03-25
9 Form 18 [04-04-2017(online)].pdf 2017-04-04
10 201731008860-FER.pdf 2019-04-02
11 201731008860-FER_SER_REPLY [01-10-2019(online)].pdf 2019-10-01
12 201731008860-CORRESPONDENCE [01-10-2019(online)].pdf 2019-10-01
13 201731008860-CLAIMS [01-10-2019(online)].pdf 2019-10-01
14 201731008860-PatentCertificate14-07-2020.pdf 2020-07-14
15 201731008860-IntimationOfGrant14-07-2020.pdf 2020-07-14
16 201731008860-RELEVANT DOCUMENTS [29-09-2021(online)].pdf 2021-09-29

Search Strategy

1 201731008860searchstrategy_02-04-2019.pdf

ERegister / Renewals

3rd: 01 Oct 2020

From 15/03/2019 - To 15/03/2020

4th: 01 Oct 2020

From 15/03/2020 - To 15/03/2021

5th: 08 Mar 2021

From 15/03/2021 - To 15/03/2022