Description:FORM – 2

THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003

COMPLETE SPECIFICATION
(SEE SECTION 10, RULE 13)

A SYSTEM AND A METHOD OF REALIZING COMPACT LOW POWER MULTI-BAND SIGNAL GENERATOR WITH LOW SPURIOUS IN NORMAL AND AGILE MODE

BHARAT ELECTRONICS LIMITED

WITH ADDRESS:
OUTER RING ROAD, NAGAVARA, BANGALORE 560045, INDIA

THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE INVENTION AND THE MANNER IN WHICH IT IS TO BE PERFORMED.
TECHNICAL FIELD
[0001] The present invention relates generally to a system and a method for generating multi-band signals, more particularly to generating multi-band signals with low spurious in normal and agile mode in compact size.
BACKGROUND

[0002] US7158760B1 titled “frequency synthesizer with selectable preconfigured synthesizer characteristics” describes a system and method for configuring a frequency synthesizer in a transceiver. The synthesizer has registers that are programmed with parameters needed to generate the desired Intermediate Frequency (IF). The parameter generator implements as a lookup table (LUT). The combination of TCXO frequency, cellular mode and region determines a selection bit sequence. A selection bit sequence is loaded into selection bit sequence register and used by a selector to select the corresponding set of configuration parameters. The selection bit sequence is stored in non-volatile memory. When the synthesizer powers on, it uses the selection bit sequence to do either a lookup or a computation to generate the configuration parameters.
[0003] US9954705B2 titled “phase noise improvement techniques for wideband fractional-n-synthesizers” describes a method to improve phase noise for wide band synthesizer. It explains about that for the stable operation of PLL loop bandwidth, selection of reference frequency is important. It also explains the contribution of oscillator circuit noise on loop bandwidth of frequency synthesizer. When the value of the first integer divider is increased, the programmed current to the charge pump is decreased proportionately. This ensures that the frequency synthesizer operates at an optimum bandwidth for the best performance.
[0004] US20160105191A1 titled “frequency synthesizer” describes a method to realize a synthesizer with improved frequency resolution and spectral purity. It includes a frequency oscillator, whose output is connected with a frequency multiplier, frequency converter, frequency divider, whose output is connected with a frequency phase detector input.
[0005] US20170366193A1 titled “programmable frequency divider, PLL synthesizer and radar device” describes a method which includes programmable frequency divider, pulse counter and a swallow counter. The programmable frequency divider includes a control signal delay circuit , disposed between an output terminal of the swallow counter and a control terminal of the modulus frequency divider , configured to delay a signal from the swallow counter , and generate a control signal for controlling the modulus frequency divider. It determine when optimum timing initial values are not set, the compensation operation moves to re-configuration on the basis of a lookup table(LUT) of temperatures and optimum timing initial values.
[0006] US7792510B2 titled “multi-band frequency synthesizer” describes the field of multiband frequency synthesizer architectures, which can advantageously be applied to wireless multi-mode transceivers in a cellular telecommunication system. It includes dual-loop architecture. Dual-band synthesizer utilizes a multiplicity of phase-locked loops with narrowband voltage-controlled oscillators that operate at different centre frequencies.
[0007] US7701299 titled “low phase noise PLL synthesizer” describes that phase noise is a manifestation of instability of the output frequency of a PLL synthesizer and is observed as random frequency fluctuations around the desired output frequency. It is a limiting factor in the sensitivity of radio frequency receivers. The level of phase noise near the desired carrier frequency depends on phase noise in the reference signal and on the PLL synthesizer circuit design. It includes dual loop, one loop is used for initial tuning, while another provides low phase noise performance by removing all frequency dividers from the loop.
[0008] US7324789 titled “PLL frequency synthesizer architecture for low phase noise and reference spurs” describes a frequency synthesizer for use in a transceiver is provided that is capable of generating a relatively high reference frequency with fine frequency resolution and low in-band phase noise. A Digital-to-Analog Converter (DAC) converts the digital reference signal to an analog reference signal, and a low pass filter filters the analog reference signal to produce a filtered analog reference signal.
[0009] A paper titled “Design and Realization of an S-Band High Performance Frequency Synthesizer for Radar System” describes a method to realize S-Band synthesizer using DDS (Direct Digital Synthesizer), multiple switchable filter bank and PLL (Phase Locked Loop). It includes FPGA control circuits to realize fast sweep mode. It includes modulation on the DDS waveform to meet radar requirement.
[0010] There is still a need of a technical solution which solves the above defined problems and provides a system and a method of realizing compact low power multi-band signal generator with low spurious in normal and agile mode.

SUMMARY
[0011] This summary is provided to introduce concepts related to generally to a system and a method for generating multi-band signals. The invention more specifically involves a method for generating multi-band signals with low spurious in normal and agile mode in compact size.
[0012] In an embodiment of the present invention, a system to realize compact low power multi-band signal generator in a normal mode and an agile mode is disclosed. The system comprises a controller coupled with a multi-band frequency generator. It further includes a reference clock interfaced through a system interface. This reference clock generates one or more multi-band signals. Further, the system includes a multi-band frequency generator that generates one or more first set of signals of a fixed frequency configurable based in multi-band operation. The multi-band frequency generator further generates one or more second set signals of variable wide band frequency with low in-band spurious. Further, the multi-band frequency generator generates one or more third set signals of variable Intermediate Frequency with high hopping rate across the band.
[0013] In an embodiment of the present invention, a method for realizing compact low power multi-band signal generator in a normal mode and an agile mode is disclosed. The method comprises generating one or more multi-band signals by a reference clock. This reference clock is interfaced through a system interface. The method further includes generating one or more first set of signals of a fixed frequency configurable based in multi-band operation by a multi-band frequency generator. This multi-band frequency generator is coupled with a controller. The method further includes generating one or more second set signals of variable wide band frequency with low in-band spurious by the multi-band frequency generator. Further, the method includes generating one or more third set signals of variable Intermediate Frequency with high hopping rate across the band by the multi-band frequency generator.

BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
[0014] The detailed description is described with reference to the accompanying figures.
[0015] Figure 1 illustrates a block diagram depicting a system to realize compact multi-band signals generation with low spurious in normal and agile mode, in accordance with an exemplary embodiment of the present invention.
[0016] Figure 2 illustrates a block diagram for estimation of Frequency Tuning Word (FTW) of Direct Digital Synthesizer (DDS) from the frequency control using the lookup table method, in accordance with an exemplary embodiment of the present invention.
[0017] Figure 3 illustrates a flowchart of a method of realizing compact multi-band signals generation with low spurious in normal and agile mode, in accordance with an exemplary embodiment of the present invention.
[0018] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative methods embodying the principles of the present invention. Similarly, it will be appreciated that any flow charts, flow diagrams, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

DETAILED DESCRIPTION
[0019] The various embodiments of the present invention describe about a system and a method for generating multi-band signals with low spurious in normal and agile mode in compact size.
[0020] In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, some of which are described below, may be incorporated into a number of systems.
[0021] However, the systems and methods are not limited to the specific embodiments described herein. Further, structures and devices shown in the figures are illustrative of exemplary embodiments of the presently invention and are meant to avoid obscuring of the present invention.
[0022] Furthermore, connections between components and/or modules within the figures are not intended to be limited to direct connections. Rather, these components and modules may be modified, re-formatted or otherwise changed by intermediary components and modules.
[0023] The appearances of the phrase “in an embodiment” in various places in the specification are not necessarily all referring to the same embodiment.
[0024] It should be noted that the description merely illustrates the principles of the present invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described herein, embody the principles of the present invention. Furthermore, all examples recited herein are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the invention and the concepts contributed by the inventor to furthering the art and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
[0025] In an embodiment of the present invention, a system and a method for generating multi-band signals with low spurious in normal and agile mode in compact size is disclosed.
[0026] In another embodiment of the present invention,a method of generating multi-band signals with low spurious in normal and agile mode in compact size is disclosed. The multi-band signal generator has the capability to generate multiple signals in different bands which comprises fixed local oscillator, variable local oscillator, and variable intermediate frequency with higher order of accuracy from a common reference clock. The multi band signal generator is configured to generate frequency hopping across band of operation. The higher order of phase frequency detection and resolution is used to generate signals with low in-band spurious. A fixed local oscillator can be configured to operate at different frequencies in multi band system.
[0027] In another embodiment of the present invention,a method to realize compact low power multi-band signal generator with low spurious in normal and agile mode is disclosed. It generates a variable wide band frequency using Phase locked loop, simplifying filter band architecture, variable intermediate frequency with fast hopping rate and higher level of frequency accuracy and fixed frequency configurable in multi-band operation. Usage of higher order reference frequency for Phase Frequency Detector results in low in-band spurious. Fast selection of operating frequency and mode of operation is updated on the fly. Computational time and memory of programmable device reduction is achieved using a compressed look up table to calculate frequency tuning words.
[0028] Figure 1 illustrates a block diagram depicting a system to realize compact multi-band signals generation with low spurious in normal and agile mode, in accordance with an exemplary embodiment of the present invention.The system includes a controller (101) and a multi-band frequency generator (102). One or more multi-band signals are generated from a common reference clock (105) which is interfaced through a system interface (104). The one or more multi-band signals includes a fixed frequency (113), a variable wide band frequency (114) which is generated using a one or more Phase Locked Loop (PLL) (110, 111) respectively and a variable Intermediate Frequency (IF) (115) using a Direct Digital Synthesizer (DDS) (112). The higher order of a Phase Frequency Detector (PFD) for PLL is achieved through a frequency multiplier (109).
[0029] In another embodiment of the present invention, the controller (101) includes a clock (106) for a programmable device (107). The clock (106) is configured to programme the PLL and the DDS through an interface (103). The configuration data for the PLL is stored in a plurality of PLL registers(108) and the DDS frequency tuning word (FTW) is stored in a compressed look up table (LUT)(200).
[0030] In another embodiment of the present invention, the multi-band frequency generator (102) generates the fixed frequency which is used in one or more up-convertors and down-convertors in an agile mode. Depending on the operation band, the operating frequency of the fixed frequency is selected. To operate in multi-band system, the PLL is configured as per the requirement.
[0031] In another embodiment of the present invention, the variable wide band frequency generation serves two purposes depending on the mode of the operation. When agility is essential in system, the variable wide band frequency generation is configured to generate fixed spot frequency which is used in the Up/Down convertors as well as reference frequency for the DDS. In normal mode of operation, it is used to generate wide band frequency.
[0032] In another embodiment of the present invention, the variable Intermediate Frequency (IF) is generated by the DDS depending on the system requirement in the agile mode. The multi-band signals generated are used for up-conversion for transmission. The accuracy of the generated radar signal depends on the accuracy of the variable Intermediate Frequency only. In the agility mode, the frequency hopping speed is limited by the calculation and writing of the FTW to the DDS.
[0033] Figure 2 illustrates a block diagram for estimation of Frequency Tuning Word (FTW) of Direct Digital Synthesizer (DDS) from the frequency control using the lookup table method, in accordance with an exemplary embodiment of the present invention.Based on the frequency control, the extraction of MHz and KHz offset (201) is done within the programmable device as a block 200. The separate LUT for MHz (202) and LUT for KHz (203) is pre-calculated and stored within the programmable device. The FTW for MHz(204) is estimated from the LUT for MHz and FTW for KHz(205) is estimated from the LUT for KHz and added using FTW Sum(206) to get FTW(207). The calculation of fine resolution FTW using equation takes additional computational time which affects the hopping performance. The calculation of fine resolution FTW using single LUT takes additional memory of the programmable device. To reduce the memory and the computational time, compressed LUT method is implemented.
[0034] Figure 3 illustrates a flowchart of a method of realizing compact multi-band signals generation with low spurious in normal and agile mode, in accordance with an exemplary embodiment of the present invention. It is the objective of the present invention to provide a method to realize a compact low power multi-band signals generation with low spurious in normal and agile mode. The complexity of multi-band signal generation circuitry depends on specifications like frequency hopping time, in band spurious, power consumption and adaptability to configure different frequency. Multi-band signal can be generated in normal mode as well as agile mode.
[0035] In agile mode of operation, to eliminate ambiguity, the frequency hopping technique across the operational band is used. The time to analyze the frequency requirement and the time to configure the frequency generators contributes to the stability of the frequency during hopping. Further, utilizing the LUT to configure and higher reference clock to DDS, optimizes frequency hopping requirement.
[0036] In another embodiment of the present invention, the variable wide band frequency generated by the multi-band signal generation uses wide band PLLs with voltage controlled oscillator (VCO) inbuilt. The frequency resolution and the in-band spurious depend on the slew rate of reference clock, the PFD and the selection of mode of division. Usage of higher PFD reduces requirement of higher slew rate, reducing the in-band spurs. Usage of fractional mode of operation over integral mode, improves frequency resolution as well as PFD spurs. In normal mode of operation, this method eliminates the frequency translation as well as the filter circuitry.
[0037] In another embodiment of the present invention, the multi-band signal generator has additional fixed frequency generator whose frequency is configured based on the geographical location as well requirement in agile mode of the operation.
[0038] In another embodiment of the present invention, the method of realizing compact low power multi-band signal generator with low spurious in normal and agile mode discloses below advantages:
[0039] Reduction in computational time for achieving frequency hopping using compressed Look Up table (LUT) in agile mode.
[0040] Usage of higher phase frequency detection to reduce sharp band limited Radio frequency filters in normal mode.
[0041] Reduction in filter chain reduces gain stage requirement, reducing overall power consumption.
[0042] Adaptable frequency generation in multi-band operations.
[0043] The foregoing description of the invention has been set merely to illustrate the invention and is not intended to be limiting. Since modifications of the disclosed embodiments incorporating the spirit and substance of the invention may occur to person skilled in the art, the invention should be construed to include everything within the scope of the invention.
, Claims:
1. A system to realize compact low power multi-band signal generator with low spurious in a normal mode and an agile mode, said system comprising:
a controller (101) coupled with a multi-band frequency generator (102);
a reference clock (105) interfaced through a system interface (104), said reference clock (105)is configured to generate one or more multi-band signals;
one or more Phase Locked Loop (PLL) (110) of a multi-band frequency generator (102) configured to generate one or more first set of signals of a fixed frequency (113) configurable based in multi-band operation, generated using one or more Phase Locked Loop (PLL) (110);
one or more Phase Locked Loop (PLL) (111) of the multi-band frequency generator (102) configured to generate one or more second set signals of variable wide band frequency (114) with low in-band spurious;
a Direct Digital Synthesizer (DDS) (112) of the multi-band frequency generator (102) configured to generate one or more third set signals of variable Intermediate Frequency (115) with high hopping rate across the band.

2. The system as claimed in claim 1, said system further comprises an interface (103), wherein the generated first set of signals, the second set of signals and the third set of signals are configured through the interface (103) in the normal mode or the agile mode.

3. The system as claimed in claim 1, wherein the controller (101) configures the one or more Phase locked Loop (110, 111) using a plurality of PLL registers (108) and the Direct Digital Synthesizer (DDS) (112) using a pre-calculated compressed lookup table (200) to configure Frequency Tuning Word (FTW).

4. The system as claimed in claim 1, wherein the in-band spurious of variable wide band frequency (114) in normal mode is improved by using a higher order of a frequency reference for a Phase Frequency Detector through a frequency multiplier (109).

5. The system as claimed in claim 1, wherein the multi-band frequency generator (102) of the fixed frequency (113) is configurable to any frequency in band of operation.

6. The system as claimed in claim 1, wherein the controller (101) includes a clock (106) for a programmable device (107), said clock (106) is used to programme one or more PLL and the DDS through the interface (103).

7. A method for realizing compact low power multi-band signal generator with low spurious in a normal mode and an agile mode, said method comprising:
generating, by a reference clock (105), one or more multi-band signals, said reference clock(105)is interfaced through a system interface (104);
generating, by one or more Phase Locked Loop (PLL) (110) of a multi-band frequency generator (102), one or more first set of signals of a fixed frequency (113) configurable based in multi-band operation, said multi-band frequency generator (102) is coupled with a controller (101);
generating, by one or more Phase Locked Loop (PLL) (111) of the multi-band frequency generator (102), one or more second set signals of variable wide band frequency (114) with low in-band spurious;
generating, by a Direct Digital Synthesizer (DDS) (112) of the multi-band frequency generator (102),one or more third set signals of variable Intermediate Frequency (115) with high hopping rate across the band.

8. The method as claimed in claim 7, said method further comprises configuring, by an interface (103), the generated first set of signals, the second set of signals and the third set of signals in the normal mode or the agile mode.

9. The method as claimed in claim 7, wherein the controller (101) configures the one or more Phase locked Loop (110, 111) using a plurality of PLL registers (108) and the Direct Digital Synthesizer (DDS) (112) using a pre-calculated compressed lookup table (200) to configure Frequency Tuning Word (FTW) .

10. The method as claimed in claim 7, wherein thein-band spurious of variable wide band frequency (114) in normal mode is improved by using a higher order of a frequency reference for a Phase Frequency Detector through a frequency multiplier (109).

11. The method as claimed in claim 7, wherein the multi-band frequency generator (102) of the fixed frequency (113) is configurable to any frequency in band of operation.

12. The method as claimed in claim 7, wherein the controller (101) includes a clock (106) for a programmable device (107), said method further comprises programming, by the clock (106), the one or more PLL and the DDS through the interface (103).