DESC:TECHNICAL FIELD
[0001] The present disclosure relates generally to power amplifiers and more particularly, to a system and method for digital predistortion for RF power Amplifiers.
BACKGROUND
[0002] A radio frequency power amplifier (RF power amplifier) is well known in the art which is a type of electronic amplifier that converts a low-power radio-frequency signal into a higher power signal. Typically, RF power amplifiers drive the antenna of a transmitter.
[0003] In the conventional mobile communication system using RF signals for communication, a high power transmit amplifier is used to transmit these RF signals. In the high power transmit amplifier, the efficiency of the amplifier, rather than noise, is taken into greater consideration. Accordingly, to achieve high efficiency, a high-power amplifier (HPA) operates in the vicinity of its nonlinear operating point. In this case, the output of the amplifier includes an inter modulation distortion (IMD) component that appears as a spurious signal, not only in its in-band, but also in other frequency bands which leads to spectral regrowth. In-band distortions increase the error vector magnitude (EVM) of the signal which degrades the quality of the signal. Out of band distortions acts like interferer to the adjacent channel.
[0004] Various methods exist to correct the non-linearities created by the high power amplifier. One of the analog techniques is a feed-forward scheme. In Feedforward technique, the distortion is subtracted out at the output of the power amplifier. This method needs analog combining network and extra RF power amplifier that must operate at output power levels of PA under use, thereby increasing the hardware size and system cost.
[0005] One of the prior art provides a look-up table based solution that compares the feed-back signal outputted from the power amplifier with a first signal outputted from the predistorter and adaptive updation of the look-up table is done using the compared result. In this prior art, a method to store the correction values is used which requires a lot of memory and it involves complex computations to find the correction values.
[0006] Another prior art provides the conventional Least Mean Square (LMS) algorithm that has been used for identification of the system parameters. Even though LMS is of very low complexity and high stability, it has very low convergence speed when applied to the DPD scheme.
[0007] Therefore, there is a need in the art with a system and method for digital predistortion for RF power Amplifiers and to solve the above mentioned limitations.
SUMMARY OF THE INVENTION
[0008] An aspect of the present invention is to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below.
[0009] Accordingly, in one aspect of the present invention relates to a system for digital predistortion for RF power Amplifiers, the system comprising: a digital baseband signal generator (101) configured to generate a plurality of digital transmit waveform signals, a digital to analog converter (103) configured to receive at least one digital transmit waveform signal from the digital baseband signal generator (101) and convert at least one digital transmit waveform signal into analog transmit waveform signal and provide the analog transmit waveform signal to an analog transmitter circuitry (104, 105, 108,107) for amplification, an attenuator (109) configured to receive the amplified analog transmit waveform signal from the analog transmitter circuitry (104, 105, 108,107) and reduce the power level of the amplified analog transmit waveform signal, a splitter (110) configured to receive attenuated analog waveform signal from the attenuator (109) and split the attenuated analog waveform signal into a first and a second analog waveform signal, wherein the first analog waveform signal is provided to an analog receiver circuitry (108,111,112), an analog to digital converter (113) configured to receive the first analog waveform signal from the analog receiver circuitry (108,111,112) and convert the received analog waveform signal into digital receive waveform signal, a data synchronization unit (115) configured to receive and store the atleast one digital transmit waveform signal, and further configured to receive the digital receive waveform signal and determine synchronization offset value for time alignment between the stored digital transmit waveform signal and the digital receive waveform signal and generate time aligned digital waveform signals, a power normalization unit (116) configured to calculate gain compensation and phase alignment between stored digital transmit waveform signal and digital receive waveform signal and generate gain compensated and phase aligned digital waveform signal and a digital predistortion estimation unit (117) configured to receive the time aligned digital waveform signal, gain compensated and phase aligned digital waveform signal and estimate polynomial coefficient values for digital predistortion from the received time aligned digital waveform signal, gain compensated and phase aligned digital waveform signal.
[0010] In another aspect, the present invention relates to a method for digital predistortion for RF power Amplifiers (500), the method comprising: generating, by a digital baseband signal generator (101), a plurality of digital transmit waveform signals (510), converting, by a digital to analog converter (103), atleast one digital transmit waveform signal into analog transmit waveform signal and providing the analog transmit waveform signal to an analog transmitter circuitry (104, 105, 107, 108) (520), amplifying, by a power amplifier (PA) (107), the analog transmit waveform signal received from the analog transmitter circuitry, wherein the power amplifier (PA) (107) adds one or more nonlinear characteristics to an amplified analog transmit waveform signal (530), reducing, by an attenuator (109), the power level of the amplified analog transmit waveform signal (540), splitting by a splitter (110), the attenuated analog waveform signal into a first and a second analog waveform signal, wherein providing the first analog waveform signal to an analog receiver circuitry (108,111,112), and providing the second analog waveform signal to a spectrum analyzer (114) to observe the non-linear effects of the signals (550), receiving by an analog to digital converter (113), the first analog waveform signal from the analog receiver circuitry (108,111,112) and converting the received analog waveform signal into digital receive waveform signal (560), determining, by a data synchronization unit (115), a synchronization offset value for time alignment between a stored digital transmit waveform signal and the digital receive waveform signal, and generating a time aligned digital waveform signals (570), calculating, by a power normalization unit (116), a gain compensation and phase alignment between the stored digital transmit waveform signal and digital receive waveform signal and generating a gain compensated and phase aligned digital waveform signals (580) and estimating, by a digital predistortion estimation unit (117), polynomial coefficient values for digital predistortion, wherein the polynomial coefficient values are estimated by receiving the time aligned digital waveform signal values from data synchronization unit (115), gain compensated and phase aligned digital waveform signal values from power normalization unit (116) (590).
[0011] Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.
BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
[0012] The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and modules.
[0013] Figure 1 shows a hardware setup that implements the digital predistortion for RF power Amplifiers according to an exemplary implementation of the present invention.
[0014] Figure 2 shows an indirect learning architecture for the digital predistortion according to an exemplary implementation of the present invention.
[0015] Figure 3 shows a schematic flow chart of a digital predistortion processing method according to an exemplary implementation of the present invention.
[0016] Figure 4 shows an example function of digital predistortion according to an exemplary implementation of the present invention.
[0017] Figure 5 shows a method for digital predistortion for RF power Amplifiers according to an exemplary implementation of the present invention.
[0018] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative methods embodying the principles of the present disclosure. Similarly, it will be appreciated that any flow charts, flow diagrams, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.
DETAILED DESCRIPTION OF THE INVENTION
[0019] The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.
[0020] The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.
[0021] It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces.
[0022] By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic is intended to provide.
[0023] Figures discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way that would limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged communications system. The terms used to describe various embodiments are exemplary. It should be understood that these are provided to merely aid the understanding of the description, and that their use and definitions in no way limit the scope of the invention. Terms first, second, and the like are used to differentiate between objects having the same terminology and are in no way intended to represent a chronological order, unless where explicitly stated otherwise. A set is defined as a non-empty set including at least one element.
[0024] In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the present disclosure. It will be apparent, however, to one skilled in the art that the present disclosure may be practiced without these details. One skilled in the art will recognize that embodiments of the present disclosure, some of which are described below, may be incorporated into a number of systems.
[0025] However, the systems and methods are not limited to the specific embodiments described herein. Further, system and methods shown in the figures are illustrative of exemplary embodiments of the presently disclosure and are meant to avoid obscuring of the presently disclosure.
[0026] The various embodiments of the present invention describe about system and method for digital predistortion which corrects the non-linearity of the wideband power amplifier. The digital predistortion solution helps in compensating the non-linear characteristic caused by wideband power amplifier.
[0027] The present invention relates to a system and method for digital predistortion which corrects the non-linearity of the wideband power amplifier.
[0028] In one embodiment, a digital predistortion is a solution provided for compensating non-linearity caused by a wideband power amplifier. The digital predistortion solution includes a digital predistorter, connected to the power amplifier via a digital-to-analog converter. The predistorter is constructed as the pre-inverse of the nonlinear power amplifier. The construction of digital predistorter involves generating a digital transmit signal, receiving a digital receive signal through receiver circuit (Feedback circuit), storing, determining synchronization offset value to time align received and transmitted digital samples, calculation of small signal gain to normalize the power levels of received digital samples, estimating memory polynomial coefficients to construct the digital predistorter. The predistorter distorts the transmitted digital samples to mitigate the non-linearity of the power amplifier.
[0029] In one embodiment, the present invention provides a system and method which include signal processing aspects such as-
a) Digital to analog conversion for signal generation, passing the signal through Power Amplifier (Device under test), tapping the signal, passing it through an analog to digital converter and storing samples
b) Predistortion construction
c) Finding a synchronization offset value for time alignment of the transmit signal samples and tapped received signal samples
d) Calculation of small signal gain for power normalization of the received digital samples
e) Estimation of coefficients for the construction of predistortion with less number of digital samples to reduce the time to estimate, filter the transmitted digital samples with the constructed predistorter to compensate the non-linearity of the wideband power amplifier
[0030] In one embodiment, transmitted digital samples are derived from different types of waveforms (E.g. - QAM, OFDM, QPSK...). These samples are transmitted to the digital to analog converter with a specific sampling rate. The analog signal is given to the preamplifier to provide sufficient gain. The power amplified analog signal is received through receiver circuitry which includes the analog to digital converter.
[0031] In one embodiment, the received digital samples are stored in a memory. The length of the received digital samples is minimum three times the length of the transmitted digital samples to ensure that the received digital samples contains one complete frame. The time alignment of the digital transmitted signal and received signal is done using cross correlation and peak detection methods. Identification of the gain compression point in the gain curve is done for the identification of the received digital samples which are in the linear region of the power amplifier. Small signal gain is calculated based on the received digital samples which are in linear region of the gain curve.
[0032] In one embodiment, the inverse power amplifier model is constructed with the help of time aligned and power normalized received digital samples. Identification of the inverse power amplifier model coefficients is done by using indirect learning architecture and least square solution methods. The power levels of the digital transmitted samples are adjusted to the power levels of the constructed predistorter to mitigate the nonlinear effects of the power amplifier. Normalized mean square error value is calculated to measure the accuracy of the estimated coefficients of the predistorter. Transmitted digital samples are filtered with constructed predistorter to compensate the non-linearity of the power amplifier.
[0033] In one embodiment, the system and method can be implemented in FPGA, Processor, or in combinations of them. In this system, the samples are stored in memory and transmission and reception of the digital samples are implemented in FPGA. Alignment, power normalization and identification of inverse power amplifier coefficients are done in Processor. Filtering of the digital transmitted samples with predistorter is done in the FPGA.
[0034] In the conventional mobile communication system using RF signals for communication, a high power transmit amplifier is used to transmit these RF signals. In the high power transmit amplifier 402, the efficiency of the amplifier, rather than noise, is taken into greater consideration. Accordingly, to achieve high efficiency, a high-power amplifier (HPA) operates in the vicinity of its nonlinear operating point. In this case, the output of the amplifier includes an inter modulation distortion (IMD) component that appears as a spurious signal, not only in its in-band, but also in other frequency bands which leads to spectral regrowth 404.
[0035] In order to remove the spurious component, a feed-forward scheme may be used. In Feedforward technique, the distortion is subtracted out at the output of power amplifier. This method needs analog combining network and extra RF power amplifier that must operate at output power levels of PA under use, thereby increasing the hardware size and system cost. The present invention provides Digital Predistortion. It significantly reduces the size and cost compared to other methods.
[0036] Digital Predistortion employs a predistorter 405 in the baseband which predistorts the input signal. After predistortion, the digital samples will have IMD product which are with opposite phase of power amplifier IMD products 406. After predistortion, the signal is converted into analog form with the help of digital to analog converter. After analog conversion, the signal will be up converted to carrier frequency, and fed to the RF power amplifier. The predistorter is constructed as the pre-inverse of the nonlinear power amplifier. Ideally, the cascade of the two results gives a linear gain to the original input signal.
[0037] The nonlinear characteristics of the nonlinear amplifier can be classified into categories such as amplitude modulation-to-amplitude modulation (AM/AM) characteristic, in which the amplitude of an output signal changes depending on the amplitude of an input signal, and amplitude modulation-to-phase modulation (AM/PM) characteristic, in which the phase of an output signal changes depending on the amplitude of an input signal.
[0038] Figure 1 shows a hardware setup that implements the digital predistortion for RF power Amplifiers according to an exemplary implementation of the present invention.
[0039] The figure shows the hardware setup, that converts the digital transmit samples into analog form, passes the signal through Power Amplifier(Device under test), taps the signal, receives this analog signal through receiver circuitry and analog to digital converter and performs the time alignment, power normalization and predistorter construction.
[0040] This architecture includes the various implementation details required for digital predistortion. The setup includes a digital baseband signal generator 101, digital predistorter 102, digital to analog converter 103, analog transmitter circuitry 104,105,107,108, pre amplifier 106, power amplifier (PA) 107, attenuator 109, analog receiver circuitry 108,111,112, analog to digital converter 113, a DPD coefficients estimation unit 117, data synchronization unit 115, power normalization unit 116.
[0041] The digital baseband signal generator 101 can generate different transmit digital waveform samples. These transmit digital waveform samples are derived from different baseband modulation schemes like QAM, QPSK and OFDM. These transmit digital waveform samples are interpolated with various interpolation factors to completely capture IMD components in the receiver circuit. These transmit digital waveform samples are send to digital to analog converter 103 through an embedded design with different sampling rates. The transmit digital waveform samples are digitally captured and stored to time align received digital samples with transmit digital samples.
[0042] Digital to analog converter 103 converts the digital signal into an analog signal. The analog transmitter circuitry receives an analog signal from the digital to analog converter 103. The analog transmitter circuitry includes transmit filter 104, mixer 105 and a local oscillator (LO) 108 that is tuned to a carrier frequency, to up-convert a baseband analog signal. The preamplifier 106 amplifies a signal from the analog transmitter circuitry and gives it to power amplifier 107 to produce an amplified signal. The analog receiver circuitry receives the signal via an attenuator 109 which reduces the power level of the amplified analog signal. The attenuated signal is given via a splitter 110 to split the received analog signal into more than one path and divide the power among the paths. One path output analog signal is given to spectrum analyzer 114 to observe the nonlinear effects, and another path output signal is given to the analog receiver circuitry. The analog receiver circuitry includes a mixer 111, which is driven by a local oscillator 108, that is tuned to a carrier frequency, to down-convert a signal into a baseband analog signal. An analog to digital converter 113 converts an analog signal from the analog receiver circuitry into a digital signal. These digital samples are taken into memory through an embedded design.
[0043] In one embodiment, the present invention relates to a system for digital predistortion for RF power Amplifiers, the system comprising: a digital baseband signal generator 101 configured to generate a plurality of digital transmit waveform signals/samples, a digital to analog converter 103 configured to receive atleast one digital transmit waveform signal/sample from the digital baseband signal generator 101 and convert atleast one digital transmit waveform signal/sample into analog transmit waveform signal and provide the analog transmit waveform signal/sample to an analog transmitter circuitry 104, 105, 107, 108 for amplification, an attenuator 109 configured to receive the amplified analog transmit waveform signal/sample from the analog transmitter circuitry and reduce the power level of the amplified analog transmit waveform signal/sample, a splitter 110 configured to receive attenuated analog waveform signal from the attenuator 109 and split the attenuated analog waveform signal into a first and a second analog waveform signal, wherein the first analog waveform signal is provided to an analog receiver circuitry 108,111,112, an analog to digital converter 113 configured to receive the first analog waveform signal from the analog receiver circuitry 108,111,112 and convert the received analog waveform signal into digital receive waveform signal/sample, a data synchronization unit 115 configured to receive and store atleast one digital transmit waveform signal/sample, and further configured to receive the digital receive waveform signal/sample and determine synchronization offset value for time alignment between the stored digital transmit waveform signal/sample and the digital receive waveform signal/sample and generate time aligned digital waveform signals/sample, a power normalization unit 116 configured to calculate gain compensation and phase alignment between stored digital transmit waveform signal and digital receive waveform signal and generate gain compensated and phase aligned digital waveform signal and a digital predistortion estimation unit 117 configured to receive the time aligned, gain compensated and phase aligned digital waveform signal and estimate polynomial coefficient values for digital predistortion from the received time aligned, gain compensated and phase aligned digital waveform signal.
[0044] The analog transmitter circuitry comprises a power amplifier (PA) 107 configured to receive the analog transmit waveform signal/sample from the a digital to analog converter 103 and amplify the analog transmit waveform signal/sample, wherein the power amplifier (PA) 107 adds one or more nonlinear characteristics to amplified analog transmit waveform signal. The second analog waveform signal is provided to a spectrum analyzer 114 to observe the non-linear effects of the power Amplifier.
[0045] The data synchronization unit 115 cross correlates the digital transmit waveform signal and digital receive waveform signal and employs a peak detection technique to compensate the delay incurred. The digital predistortion estimation unit 204 uses indirect learning architecture and least square solution to estimate memory polynomial coefficient values. The analog transmitter circuitry comprises a transmit filter 104 and a mixer 105, wherein a local oscillator 108 is configured to provide a carrier frequency to the mixer to up-convert the analog transmit waveform signal, wherein a bandwidth of the transmit filter is at least twice that of the digital transmit waveform signal.
[0046] A predistorter unit 102 configured to filter digital transmit waveform signals to compensate for the non-linearity of the power amplifier using the estimated polynomial coefficient values. A power level adjustment unit configured to adjust the power levels of the digital transmit waveform signal to the power levels of the predistorter unit to mitigate the nonlinear effects of the power amplifier. An inverse system modelling unit which uses a polynomial model for behavioral modelling of the power amplifier, by taking digital receive waveform signals as input and digital transmit signals as output for the inverse system modelling.
[0047] The estimated polynomial coefficient values are stored in the predistortion unit to compensate for the one or more nonlinear characteristics of the power amplifier. The predistortion unit 102 forms an inverse function of power amplifier, where a signal passing through the predistortion unit followed by the power amplifier 107 yields minimal distortion, as the predistortion unit and the non-linear behaviour of the power amplifier effectively cancel each other.

[0048] Figure 2 shows an indirect learning architecture for the digital predistortion according to an exemplary implementation of the present invention.
[0049] The figure shows the indirect learning architecture, which is used in estimating memory polynomial coefficient values to design predistorter which acts as inverse of the power amplifier. In the predistorter construction, the received digital samples are taken as input and transmitted digital samples as output in indirect learning architecture.
[0050] The digital predistortion mostly uses memoryless models for the predistortion 201 construction. In order to fully exploit the potential of the digital predistortion, memory effects must be taken into account. The causes of these effects include transport delay between the transmitter path and receiver path and rapid thermal time constants of the active devices, as well as components in the biasing circuit. The memory effects become more important as the bandwidth increases. Memory polynomial model is used to construct the predistorter 201.The predistorter 201 adopts this memory polynomial model and the output can be written as

where K is the non-linearity order and M is the memory order.
[0051] The value of K depends on out of band emissions and memory order depends on the power amplifier operating speed or video bandwidth or signal bandwidth. Indirect learning architecture is used to get the coefficients of the memory polynomial equation to construct the predistorter. Once the required number of digital received samples are captured, received digital samples are aligned with the transmitted digital samples.
[0052] After alignment, received digital samples are normalized with the small signal gain. This small signal gain (G) 203 is calculated based on samples which are in linear region of the gain curve. Predistorter 201 is an inverse system to the power amplifier 202, so to construct it, received digital samples are considered as input and transmitted digital samples as output. Ideally, one expects y(n)=Gx(n) which makes Z(n)=?(n) and error term becomes zero. Given y(n) and z(n), the task is to find the coefficients of the memory polynomial which will be copied into the predistorter. For the estimation of memory polynomial coefficients 204, eq (1) becomes

[0053] Since z(n) has linear coefficients (akm) and has nonlinear terms, z(n) can be seen as multiplication of coefficients matrix and nonlinear terms matrix. Equation (2) can be rewritten in matrix form as
Z=Ra (3)
[0054] The dimensions are as follows - z is an Nx1 matrix and R is a NxK*M matrix and a is a K*Mx1 matrix. The least square solution for (3) is â=(RHR)-1RHz, where (.)H denotes complex conjugate transpose. The inverse of the complex matrix is derived using singular value decomposition method in the processor. The accuracy and stability of the solution are directly related to the numerical condition of the matrix RHR.
[0055] Figure 3 shows a schematic flow chart of the digital predistortion processing method according to an exemplary implementation of the present invention.
[0056] The figure shows schematic flow chart of digital predistortion which involves generation of transmit signal, receiving and storing of digital samples, identification of synchronization offset value, calculation of small signal gain, estimating predistorter coefficients and pre-distorting transmit digital samples to compensate non-linearity of the power amplifier.
[0057] The figure shows the complete flow of the digital predistortion that includes digital predistortion estimation and compensation. These operations are performed in embedded processor. At 301, the processor i.e. Baseband signal Generator generates digital transmit signal, for example, a 16-QAM signal with required oversampling factor. In addition to this signal generation the processor sets various parameters in analog transmit path like sampling rate of DAC, bandwidth of transmitter filter, carrier frequency in the mixer etc.
[0058] At 302, the processor receives the digital samples through analog receiver circuit. In addition to digital signal reception, the processor sets the various parameters in analog receiver path like sampling rate of the ADC, bandwidth of receiver filter, carrier frequency in the mixer to down convert the analog signal.
[0059] At 303, the processor captures and stores the signal samples in double data rate memory. The signal samples include transmit samples based on the digital transmit signal and receive samples based on the digital receive signal. Signal samples, such as transmit samples and receive samples, are complex numbers.
[0060] At 304, the processor i.e. data synchronization unit (115) determines a synchronization offset value to align digital transmit samples with digital receive samples. Determining a synchronization offset value can include the matching of a known transmit pattern to at least a portion of the received data. The synchronization offset value is determined by using correlation of the transmit and received samples and peak detection methods.
[0061] At 305, the processor i.e. power normalization unit (116) calculates the small signal gain to normalize the power of the digital receive signal with respect to the digital transmit signal. Such normalization can cause the received signal to have the same power as the transmit signal. Small signal gain calculation involves identification of the gain compression point at which the slope in the gain curve deviates from a constant slope. Samples which are below the gain compression point will be considered for small signal gain calculation.
[0062] At 306, the processor i.e. DPD Coefficients Estimation unit (117) estimates predistorter coefficients using information comprising of the transmit samples and receive samples. Estimating predistorter coefficients include using a memory polynomial based nonlinear predistorter model. The predistortion coefficients values are complex numbers. Using least square solution and indirect learning architecture, the predistorter coefficients can be estimated.
[0063] At 307, the processor constructs the predistorter with estimated predistorter coefficients to compensate for one or more nonlinear characteristics of the power amplifier.
[0064] At 308, the processor filters the digital transmit samples through a predistortion block characterized by estimated coefficients. The predistortion block forms an inverse function of the power amplifier. A signal passing through a predistortion block followed by a power amplifier yields minimal or no distortion, because the predistortion block and the non-linear behavior of the power amplifier effectively cancel each other.
[0065] Figure 4 shows an example function of digital predistortion according to an exemplary implementation of the present invention.
[0066] The figure shows an example where the behaviour of ideal and real power amplifier are shown and the nonlinear effects of real power amplifier is corrected with the help of digital predistorter.
[0067] Figure 5 shows a method for digital predistortion for RF power Amplifiers according to an exemplary implementation of the present invention.
[0068] The figure shows a method for digital predistortion for RF power Amplifiers. In one embodiment, the method (500) comprising: generating, by a digital baseband signal generator (101), a plurality of digital transmit waveform signals (510), converting, by a digital to analog converter (103), atleast one digital transmit waveform signal into analog transmit waveform signal and providing the analog transmit waveform signal to an analog transmitter circuitry (104, 105, 107, 108) (520), amplifying, by a power amplifier (PA) (107), the analog transmit waveform signal received from the analog transmitter circuitry, wherein the power amplifier (PA) (107) adds one or more nonlinear characteristics to an amplified analog transmit waveform signal (530), reducing, by an attenuator (109), the power level of the amplified analog transmit waveform signal (540), splitting by a splitter (110), the attenuated analog waveform signal into a first and a second analog waveform signal, wherein providing the first analog waveform signal to an analog receiver circuitry (108,111,112), and providing the second analog waveform signal to a spectrum analyzer (114) to observe the non-linear effects of the signals (550), receiving by an analog to digital converter (113), the first analog waveform signal from the analog receiver circuitry (108,111,112) and converting the received analog waveform signal into digital receive waveform signal (560), determining, by a data synchronization unit (115), a synchronization offset value for time alignment between a stored digital transmit waveform signal and the digital receive waveform signal, and generating a time aligned digital waveform signals (570), calculating, by a power normalization unit (116), a gain compensation and phase alignment between the stored digital transmit waveform signal and digital receive waveform signal and generating a gain compensated and phase aligned digital waveform signals (580) and estimating, by a digital predistortion estimation unit (117), polynomial coefficient values for digital predistortion, wherein the polynomial coefficient values are estimated by receiving the time aligned digital waveform signal values from data synchronization unit (115), gain compensated and phase aligned digital waveform signal values from power normalization unit (116) (590).
[0069] The step of calculating the power normalization comprises: calculating a gain curve by dividing the digital receive waveform signal with corresponding digital transmit waveform signal, identifying a gain compression point from the slope of the gain curve, separating digital receive waveform signal which are in constant region of gain curve and calculating small signal gain from separated digital receive waveform signal and corresponding digital transmit waveform signal for gain compensation and phase alignment.
[0070] The method steps further include setting various parameters in an analog transmit path such as sampling rate of DAC, bandwidth of transmitter filter, carrier frequency in the mixer. The method steps further include receiving the digital waveform signal through analog receiver circuitry and setting various parameters in an analog receiver path such as sampling rate of the ADC, bandwidth of receiver filter, carrier frequency in the mixer to down convert the analog signal. The method steps further include estimating polynomial coefficient values using singular value decomposition method for inversion of a complex matrix.
[0071] The method steps further include constructing a predistorter unit (102) with estimated polynomial coefficient values to compensate for the one or more nonlinear characteristics of the power amplifier. Filtering, by a predistorter unit (102), the digital transmitted waveform signals to compensate for the non-linearity of the power amplifier using the estimated polynomial coefficient values. The method steps further include passing a signal through a predistortion unit (102) followed by the power amplifier yields minimal distortion, as the predistortion unit and the non-linear behaviour of the power amplifier effectively cancel each other.
[0072] In one embodiment, the present invention provides a system which does digital pre-distortion to mitigate the nonlinear effect of power amplifier consisting of,
[0073] a) In one embodiment, the signal generation unit is configured to load different spectrally efficient transmit waveforms (waveform synthesis) like QAM, OFDM, QPSK with different sampling rates and frame sizes which is designed in embedded processor, which are given to the input to the Power Amplifier.
[0074] b) In one embodiment, the system splits a part of RF output of the Power Amplifier (whose input is as generated in 1(a)) to Analog to Digital converter.
[0075] c) In one embodiment, a processing element compares the stored samples and samples obtained in 1(b).
[0076] d) In one embodiment, an embedded design retrieves stored digital transmitter samples from signal generation unit given in 1(c) sends it to Digital to Analog converter through LVDS interfaces.
[0077] e) In one embodiment, a Digital to analog converter is used to convert the digital transmit samples to an analog waveform.
[0078] f) In one embodiment, a power amplifier section consisting of a preamplifier to amplify the transmitted analog signal with sufficient gain and a power amplifier (device under test).
[0079] g) In one embodiment, the splitter in 1(b), is joined with a receiver circuitry which has an attenuator which reduces the power of an amplified analog signal without distortion and RF power splitter to split the received analog signal into more than one path and divide the power among the paths.
[0080] h) In one embodiment, an Analog to Digital convertor to convert the analog received signal to digital samples.
[0081] i) In one embodiment, an embedded design which receives digital samples from Analog to digital converter through LVDS interfaces and stores in memory.
[0082] j) In one embodiment, a data synchronization unit, configured to time align the digital transmitted samples and digital received samples.
[0083] k) In one embodiment, a power normalization unit, configured to perform gain compensation and phase alignment between transmitted complex samples and received complex samples of power amplifier.
[0084] In one embodiment, a transmit filter coupled between digital to analog converter and the pre-amplifier, wherein bandwidth of the transmit filter is at least twice that of the digital transmitted signal. The bandwidth of the receive filter is at least wide enough to pass through signals distorted by the power amplifier.
[0085] In one embodiment, the present invention provides a method to measure the accuracy of predistorter using the Normalized mean square error (NMSE) metric.
[0086] Figures are merely representational and are not drawn to scale. Certain portions thereof may be exaggerated, while others may be minimized. Figures illustrate various embodiments of the invention that can be understood and appropriately carried out by those of ordinary skill in the art.
[0087] In the foregoing detailed description of embodiments of the invention, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the invention require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the detailed description of embodiments of the invention, with each claim standing on its own as a separate embodiment.
[0088] It is understood that the above description is intended to be illustrative, and not restrictive. It is intended to cover all alternatives, modifications and equivalents as may be included within the spirit and scope of the invention as defined in the appended claims. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein,” respectively.

,CLAIMS:

1. A system for digital predistortion for RF power Amplifiers, the system comprising:
a digital baseband signal generator (101) configured to generate a plurality of digital transmit waveform signals;
a digital to analog converter (103) configured to receive atleast one digital transmit waveform signal from the digital baseband signal generator (101) and convert atleast one digital transmit waveform signal into analog transmit waveform signal and provide the analog transmit waveform signal to an analog transmitter circuitry (104, 105, 108,107) for amplification;
an attenuator (109) configured to receive the amplified analog transmit waveform signal from the analog transmitter circuitry (104, 105, 108,107) and reduce the power level of the amplified analog transmit waveform signal;
a splitter (110) configured to receive attenuated analog waveform signal from the attenuator (109) and split the attenuated analog waveform signal into a first and a second analog waveform signal, wherein the first analog waveform signal is provided to an analog receiver circuitry (108,111,112);
an analog to digital converter (113) configured to receive the first analog waveform signal from the analog receiver circuitry (108,111,112) and convert the received analog waveform signal into digital receive waveform signal;
a data synchronization unit (115) configured to receive and store the atleast one digital transmit waveform signal, and further configured to receive the digital receive waveform signal and determine synchronization offset value for time alignment between the stored digital transmit waveform signal and the digital receive waveform signal and generate time aligned digital waveform signals;
a power normalization unit (116) configured to calculate gain compensation and phase alignment between stored digital transmit waveform signal and digital receive waveform signal and generate gain compensated and phase aligned digital waveform signal; and
a digital predistortion estimation unit (117) configured to receive the time aligned digital waveform signal, gain compensated and phase aligned digital waveform signal and estimate polynomial coefficient values for digital predistortion from the received time aligned digital waveform signal, gain compensated and phase aligned digital waveform signal.

2. The system as claimed in claim 1, wherein the second analog waveform signal is provided to a spectrum analyzer (114) to observe non-linear effects of the signal.

3. The system as claimed in claim 1, wherein the data synchronization unit (115) cross correlates the digital transmit waveform signal and digital receive waveform signal and employs a peak detection technique to compensate the delay incurred.

4. The system as claimed in claim 1, wherein the digital predistortion estimation unit (204) uses indirect learning architecture and least square solution to estimate polynomial coefficient values.

5. The system as claimed in claim 1,wherein the analog transmitter circuitry (104, 105, 108,107) comprises a power amplifier for amplification and the analog transmitter circuitry comprises a transmit filter (104) and a mixer (105), wherein a local oscillator (108) is configured to provide a carrier frequency to the mixer to up-convert the analog transmit waveform signal, wherein bandwidth of the transmit filter is at least twice that of the digital transmit waveform signal.

6. The system as claimed in claim 1, further comprising a predistorter unit (102) configured to filter digital transmit waveform signals to compensate for the non-linearity of the power amplifier using the estimated polynomial coefficient values, where the estimated polynomial coefficient values are stored in the predistortion unit to compensate for the one or more nonlinear characteristics of the power amplifier.

7. The system as claimed in claim 1, further comprising a power level adjustment unit configured to adjust the power levels of the digital transmit waveform signal to the power levels of the predistorter unit to mitigate the nonlinear effects of the power amplifier.

8. The system as claimed in claim 1, further comprising an inverse system modelling unit which uses a polynomial model for behavioral modelling of the power amplifier, by taking digital receive waveform signals as input and digital transmit signals as output for the inverse system modelling.

9. The system as claimed in claim 6, wherein the predistortion unit (102) forms an inverse function of power amplifier, where a signal passing through the predistortion unit followed by the power amplifier (107) yields minimal distortion, as the predistortion unit and the non-linear behaviour of the power amplifier effectively cancel each other.
10. A method for digital predistortion for RF power Amplifiers (500), the method comprising:
generating, by a digital baseband signal generator (101), a plurality of digital transmit waveform signals (510);
converting, by a digital to analog converter (103), atleast one digital transmit waveform signal into analog transmit waveform signal and providing the analog transmit waveform signal to an analog transmitter circuitry (104, 105, 108) (520);
amplifying, by a power amplifier (PA) (107), the analog transmit waveform signal received from the analog transmitter circuitry, wherein the power amplifier (PA) (107) adds one or more nonlinear characteristics to an amplified analog transmit waveform signal (530);
reducing, by an attenuator (109), the power level of the amplified analog transmit waveform signal (540);
splitting by a splitter (110), the attenuated analog waveform signal into a first and a second analog waveform signal, wherein providing the first analog waveform signal to an analog receiver circuitry (108,111,112), and providing the second analog waveform signal to a spectrum analyzer (114) to observe the non-linear effects of the signals (550);
receiving by an analog to digital converter (113), the first analog waveform signal from the analog receiver circuitry (108,111,112) and converting the received analog waveform signal into digital receive waveform signal (560);
determining, by a data synchronization unit (115), a synchronization offset value for time alignment between a stored digital transmit waveform signal and the digital receive waveform signal, and generating a time aligned digital waveform signals (570);
calculating, by a power normalization unit (116), a gain compensation and phase alignment between the stored digital transmit waveform signal and digital receive waveform signal and generating a gain compensated and phase aligned digital waveform signals (580); and
estimating, by a digital predistortion estimation unit (117), polynomial coefficient values for digital predistortion, wherein the polynomial coefficient values are estimated by receiving the time aligned digital waveform signal values from data synchronization unit (115), gain compensated and phase aligned digital waveform signal values from power normalization unit (116) (590).

11. The method as claimed in claim 10, wherein the step of calculating the power normalization comprises:
calculating a gain curve by dividing the digital receive waveform signal with corresponding digital transmit waveform signal;
identifying a gain compression point from the slope of the gain curve;
separating digital receive waveform signal which are in constant region of gain curve; and
calculating small signal gain from separated digital receive waveform signal and corresponding digital transmit waveform signal for gain compensation and phase alignment.

12. The method as claimed in claim 10, further comprising setting various parameters in an analog transmit path such as sampling rate of DAC, bandwidth of transmitter filter, carrier frequency in the mixer.
13. The method as claimed in claim 10, further comprising receiving the digital waveform signal through analog receiver circuitry and setting various parameters in an analog receiver path such as sampling rate of the ADC, bandwidth of receiver filter, carrier frequency in the mixer to down convert the analog signal.

14. The method as claimed in claim 10, wherein estimating polynomial coefficient values uses singular value decomposition method for inversion of a complex matrix.

15. The method as claimed in claim 10, further comprising constructing a predistorter unit (102) with estimated polynomial coefficient values to compensate for the one or more nonlinear characteristics of the power amplifier.

16. The method as claimed in claim 10, further comprising filtering, by a predistorter unit (102), the digital transmitted waveform signals to compensate for the non-linearity of the power amplifier using the estimated polynomial coefficient values.