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A System And Method To Store Data In Memory

Abstract: ABSTRACT A SYSTEM AND METHOD TO STORE DATA IN MEMORY The method (100) to store data in memory which is divided into files comprising of pages, pages comprising blocks, stored in sequential manner. The blocks are arranged in in rows ‘1 to x’ and columns ‘1 to n’. From a table (202) extracting (102) the stored statuses and addresses of blocks (1,1) and (x, n) and comparing (104) the status with each other. If the compared statuses are both (0), then writing (106) data on (1,1). If not, examining (108) the blocks in following pages in sequence until a page is viewed where the status of (1,1) and (x, n) memory block is either both (0) or both are different, by moving (110) along the memory blocks. A transition block with different status is identified and writing (112) the data onto a memory block (0) adjacent to a transition block. The method (100) increases life expectancy of the data storage.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
18 March 2019
Publication Number
12/2021
Publication Type
INA
Invention Field
COMPUTER SCIENCE
Status
Email
dewan@rkdewanmail.com
Parent Application
Patent Number
Legal Status
Grant Date
2024-08-28
Renewal Date

Applicants

MAHINDRA AND MAHINDRA LIMITED
Mahindra & Mahindra Limited, Mahindra Research Valley, Mahindra World City, Plot No:41/1, Anjur P.O. , Chengalpattu

Inventors

1. JOSHI, Prathamesh
14, Aryachandra, Jai Hind Colony, Gupte Road, Dombivali West, Mumbai – 421202
2. RAWKE, Prasanna
Prasanna Sinchan Nagar, Near Swami Smarth Mandir, Parbhani - 431401

Specification

DESC:FIELD
The present disclosure relates to the field of data storage.
DEFINITIONS
As used in the present disclosure, the following terms are generally intended to have the meaning as set forth below, except to the extent that the context in which they are used indicate otherwise.
As used in the present disclosure, the following term is generally intended to have the meaning as set forth below, except to the extent that the context in which it is used indicate otherwise.
The expression “wear levelling” used hereinafter in this specification refers to, but is not limited to, a feature in flash type SSDs, which evenly distributes the write operation throughout the flash memory and prevents the early wear out of memory.
The expression “persistent changing data” used hereinafter in this specification refers to, but is not limited to, constantly changing values of the data.
The expression “full” used hereinafter in this specification refers to, but is not limited to, memory that is currently used.
The expression “blank” used hereinafter in this specification refers to, but is not limited to, memory that is currently unused.
The expression “reading” used hereinafter in this specification refers to, but is not limited to, the reading head starts from the top left corner and moves across the row from block to block in a matrix. Reading head will move to the first block of next row until end of page is reached. Same steps to be repeated for all following pages.
The expression “transition block” used hereinafter in this specification refers to, but is not limited to, a block if (1), is adjacent to a (0) or (0xFF)block or if (0) or (0xFF), is adjacent to a (1) block.
The definition is in addition to those expressed in the art.
BACKGROUND
The background information herein below relates to the present disclosure but is not necessarily prior art.
The roles of memory storage units like NAND-NOR flash and SD cards are rapidly increasing in the embedded applications. In some applications persistent data, like last known status and the details of the device needs to be stored in the memory. The update frequency of the persistent data can be as high as one write per second. The memory systems like flash and SD card typically have life cycles of 100 thousands write operations, and thus needs a file system which performs wear levelling. The traditional wear levelling techniques store the address of the persistent data in the flash in the form of look-up table at some location, and no wear leveling is performed for the look-up table. Because of this, if the address location of the look-up table becomes inaccessible, due to memory failure, power reset or re-boot, the entire memory will be corrupted.
In conventional systems to store data in memory during runtime and to identify the address of the latest persistent data takes large time overhead.Therefore, there is felt a need to provide a system and method to store data in memory that alleviates the aforementioned drawbacks.
OBJECTS
Some of the objects of the present disclosure, which at least one embodiment herein satisfies, are as follows:
It is an object of the present disclosure to ameliorate one or more problems of the prior art or to at least provide a useful alternative.
An object of the present disclosure is to provide a system and method to store data in memory.
Another object of the present disclosure is to provide a system and method that increases the life expectancy of the data storage.
Yet another object of the present disclosure is to provide a system and method that eliminates the risk of loss of the data, in situations like power reset, re-boot and memory failure.
Still another object of the present disclosure is to provide a system and method that is time-efficient.
Other objects and advantages of the present disclosure will be more apparent from the following description, which is not intended to limit the scope of the present disclosure.
SUMMARY
The present disclosure envisages a method to store data in memory. The method to store data in memory wherein the memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n). The statuses (0), (1) or (0xFF) and addresses of blocks (1,1) and (x, n) are extracted from a table storing the memory blocks and statuses and addresses corresponding to the memory blocks. The status of memory blocks (1,1) and (x, n) are compared with each other. The data is written on (1,1) if the statuses of the memory blocks (1,1) and (x, n) are both (0) or (0xFF). If not, the memory blocks are examined in next page of sequence of pages until a page is viewed where the status of (1,1) and (x, n) memory block is either both (0) or (0xFF)or both are different if the statuses of the memory blocks (1,1) and (x, n) are both (0) or (0xFF). By moving along the memory blocks until a transition block is identified if the status of (1,1) and (x, n) memory block is different. Once identified, the data is written into a memory block with status (0) or (0xFF) adjacent to a transition block. .
The present disclosure also envisages a system to store data in memory. The data storage system in memory wherein the memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n), the system comprises a table, an inputting module, a status module, a search module and an execution module.
The table is configured to store the memory blocks, addresses of the memory blocks, a status corresponding to each of the addresses of the memory blocks and location of each of the memory blocks.
The inputting module configured to receive the data to be written in the memory block. The status module configured to cooperate with the inputting module and the table to compare and extract statuses and addresses of (1,1) and a (x,n), and further configured to generate and transmit read or write command if the compared status are both (1) or both (0) or (0xFF)and generate and transmit a search command if the compared status are (1) and (0) or (0xFF)or vice versa.
The search module configured to cooperate with the status module to receive the search command and perform a binary search for the memory block having a transition of status upon receiving the search command, and further configured to generate and transmit the write command to the execution module to write to the searched memory block.
The execution module configured to cooperate with the status module and the search module to receive the write command and to move the read/write head to the memory block to write the data to the memory block.
BRIEF DESCRIPTION OF DRAWINGS
A system and method to store data in memory, of the present disclosure will now be described with the help of the accompanying drawing, in which:
Figure 1 illustrates a flow diagram of a method for data storage;
Figure 2 illustrates a block diagram of a system for data storage; and
Figures 3a to 3h illustrate a plurality of exemplary output of the method of Figure 1, in accordance with the present invention;
LIST OF REFERENCE NUMERALS
100 method
200 system
202 table
204 inputting module
206 status module
208 search module
210 execution module
212 crawler and extractor
214 comparator
DETAILED DESCRIPTION
Embodiments, of the present disclosure, will now be described with reference to the accompanying drawing.
Embodiments are provided so as to thoroughly and fully convey the scope of the present disclosure to the person skilled in the art. Numerous details are set forth, relating to specific components, and methods, to provide a complete understanding of embodiments of the present disclosure. It will be apparent to the person skilled in the art that the details provided in the embodiments should not be construed to limit the scope of the present disclosure. In some embodiments, well-known processes, well-known apparatus structures, and well-known techniques are not described in detail.
The terminology used, in the present disclosure, is only for the purpose of explaining a particular embodiment and such terminology shall not be considered to limit the scope of the present disclosure. As used in the present disclosure, the forms "a,” "an," and "the" may be intended to include the plural forms as well, unless the context clearly suggests otherwise. The terms "comprises," "comprising," “including,” and “having,” are open ended transitional phrases and therefore specify the presence of stated features, steps, operations, elements, modules, units and/or components, but do not forbid the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof. The particular order of steps disclosed in the method and process of the present disclosure is not to be construed as necessarily requiring their performance as described or illustrated. It is also to be understood that additional or alternative steps may be employed.
The amount of data to be stored in the data storage depends on how the internal memory is organized within a storage device. Data can be written sequentially or randomly either one byte at a time or on one page in the internal memory of the storage device.
When the data is stored sequentially on one page at a time, the write process starts from the page number specified. The next set of data is to be written on the next adjacent subsequent page, once the previous page is full.
The data storage may store persistent changing data in the data storage. Persistent changing data is data that is constantly changing such as temperature, humidity, historic device runtime, number of operations in past and vibration.
Presently, the data in the data storage is stored in pages. Each page is divided into memory blocks. When the data is written to the memory block, the storage location is stored in the look up table in the memory. The look up table is stored in the fixed location. The data can be stored in a new memory address location and the look up table is updated accordingly. The location of the look up table remains same. In order to avoid the corruption of data in the look up table, wear levelling is applied. Wear levelling is only applied on the storage locations stored in the look up table and not on the stored memory address location of look up table. So in case of power reset or processor reboot there is a risk of losing the address of the look up table, stored in a memory location.
Referring to Figure 1, the present disclosure envisages a method to store data in memory 100 (hereinafter referred as “the method 100”). The method to store data in memory wherein the memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n), the method comprising the following steps:
• Step 102: extracting, statuses and addresses of blocks (1,1) and (x,n) from a table storing the memory blocks and statuses and addresses corresponding to the memory blocks;
• Step 104: comparing, the status of memory blocks (1,1) and (x,n) with each other;
• Step 106: writing, the data on (1,1) if the statuses of the memory blocks (1,1) and (x,n) are both (0) or (0xFF);
• Step 108: examining, the memory blocks in next page of sequence of pages until a page is viewed where the status of (1,1) and (x,n) memory block is either both (0) or (0xFF)or both are different if the statuses of the memory blocks (1,1) and (x,n) are both (0) or (0xFF);
• Step 110: moving along the memory blocks until a transition block is identified if the status of (1,1) and (x,n) memory block is different; and
• Step 112: writing, the data into a (0) or (0xFF) memory block adjacent to a transition block.
The method as claimed in claim 1, wherein the writing on the memory block is performed by generating commands to move the read/write head to a required address of the memory block.
In an embodiment, , the status are stored along with the data as metadata on each page.
Referring to Figure 2, the present disclosure envisages a system to store data in memory 200 (hereinafter referred as “the system 200”). The system to store data in memory (200) wherein the memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n), the system (200) comprises a table (202), an inputting module (204), a status module (206), a search module (208) and an execution module (210).
In an embodiment, the memory block contains 256-1024 bytes of data.
The table (202) is configured to store the memory blocks, addresses of the memory blocks, a status corresponding to each of the addresses of the memory blocks and location of each of the memory blocks.
The inputting module (204) is configured to receive the data to be written in the memory block.
The status module (206) is configured to cooperate with the inputting module (204) and the table (202) to compare and extract statuses and addresses of (1,1) and a (x,n) and further configured to generate and transmit read or write command if the compared status are both (1) or both (0) or (0xFF) and generate and transmit a search command if the compared status are currently (1) and currently (0) or (0XFF) or currently (0) or (0XFF) and currently (1). The status module (206) comprises a crawler and extractor (212) and a comparator (214).
The crawler and extractor (212) configured to cooperate with the status table to crawl through the table (202) to extract the status of (1,1) and (x,n).
The comparator (214) configured to cooperate with the crawler and extractor (212) to compare the status of the (1,1) and the (x,n), then generate and transmit the read or write command if the compared status are same or generate and transmit the search command if the compared status are different.
In an embodiment, if the compared statuses are same as default status, the data is written on (1,1).
The search module (208) configured to cooperate with the status module (206) to receive the search command and perform a binary search for the memory block having a transition of status upon receiving the search command, and further configured to generate and transmit the write command to the execution module (210) to write to the searched memory block.
The execution module (210) configured to cooperate with the status module (206) and the search module (208) to receive the write command and to move the read/write head to the memory block to write the data to the memory block.
Referring to Figures 3a to 3h a plurality of exemplary output of the method of Figure 1.
The memory of 256 bytes is considered. A
consecutive N*256 bytes of the memory are allocated for wear levelling. At any given time the memory has a current instance
and a plurality of N-1 old instances. The status is assigned to every instance 0xFF as default, 0 for blank or 1 for full. Address of the current instance is stored in RAM. When the processor core resets due to software or power resets, address of the current instance needs to be recomputed. The current instance is located where the transition of the status occurs.
In an embodiment the sequence of instance status is nothing but a sorted array 0, 1, 0xFF.
The example attached explains the same.
In a first embodiment, figure 3a shows, the default memory pages. The First Page Status is 0xFF and the Last Page status: 0xFF. When Both flags are 0xFF it implies the memory is in default state. Then the comparator (214) performs writing (112) for Write Address = First Page Address and Read Address = First Page Address.
In a second embodiment, figure 3b shows, the memory pages after first write cycle. The First Page status is 0 and the Last Page status is 0xFF. The examining (108) the status transition from 0 to 0xFF is done. Then the comparator (214) performs writing (112) for Read Address = First Page Address, Write Address = Second Page Address.
In a third embodiment, figure 3c shows, the memory pages after nn>N cycles when First Page status is 1 and Last Page status is 0, the examining (108) for the status transition from 1 to 0 is done. Then the comparator (214) performs writing (112) for Read Address = (n% N)th Page Address and Write Address = ((n+1)%N)th Page Address.
In a seventh embodiment, figure 3g shows, memory pages after n=2N cycles when First Page status is 1 and Last Page status is 1 so both pages have same address. The comparator (214) performs writing (112) for Read Address = Last Page Address and Write Address = First Page Address.
In a eighth embodiment, figure 3h shows, memory pages after n > 2N cycles when First Page status is 0 and Last Page status is 1 the examining (108) for the status transition from 0 to 1 is done. The comparator (214) performs writing (112) for Read Address = (n% N)th Page Address and Write Address = ((n+1)%N)th Page Address.
In an embodiment, use of binary search ensures that the search operation is completed with 2*log(x*n) cycles instead of conventional linear search which takes x*n cycles.
In an embodiment, the statuses are stored along with the data as metadata on each page. Every page consists of two parts:
1. data of intereset to be stored;
2. status of the page.
Storing status of the page along with the page ensures that the memory allocated to status flags dont have to be wear levelled explicitly, which removes the need of extra space and thus memory required to store the flags, as used in conventional systems.
In an embodiment, in order to reduce the RAM footprint, two status are fetched from the flag instead of the entire table, if the transition is found, search operation returns the address of read and write location, if the transition is not found, the next set of status are fetched.
In an embodiment, further improvements of the method and system are employed with machine learning.
The foregoing description of the embodiments has been provided or purposes of illustration and not intended to limit the scope of the present disclosure. Individual components of a particular embodiment are generally not limited to that particular embodiment, but, are interchangeable. Such variations are not to be regarded as a departure from the present disclosure, and all such modifications are considered to be within the scope of the present disclosure.
TECHNICAL ADVANCEMENTS
The present disclosure described herein above has several technical advantages including, but not limited to, the realization of a system and method to store data in memory that:
• increases the life expectancy of the data storage;
• eliminates the risk of loss of the data, in situations like power reset;
• is time-efficient; and
• implements balanced wear levelling, by erasing each block exactly the same no of times.
The embodiments herein and the various features and advantageous details thereof are explained with reference to the non-limiting embodiments in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein
The use of the expression “at least” or “at least one” suggests the use of one or more elements or ingredients or quantities, as the use may be in the embodiment of the disclosure to achieve one or more of the desired objects or results.
The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.
,CLAIMS:WE CLAIM:
1. A method to store data in memory wherein said memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n), said method comprising the following steps:
• extracting, statuses (0), (1) or (0xFF) and addresses of blocks (1,1) and (x,n) from a table storing said memory blocks and statuses and addresses corresponding to said memory blocks;
• comparing, said status of memory blocks (1,1) and (x,n) with each other;
• writing, said data on (1,1) if said statuses of the memory blocks (1,1) and (x,n) are both (0);
• examining (108), said memory blocks in next page of sequence of pages until a page is viewed where said status of (1,1) and (x,n) memory block is either both (0) or both are different if said statuses of the memory blocks (1,1) and (x,n) are both (0);
• moving along said memory blocks until a transition block is identified if the status of the memory block (1,1) and that of (x,n) are different on that event; and
• writing, said data into a block whose status is (0) or (0xFF) adjacent to a transition block.

2. The method as claimed in claim 1, wherein said writing on said memory block is performed by generating commands to move the read/write head to a required address of said memory block.

3. A data storage system (200) in memory wherein said memory is divided into at least one file comprising a plurality of pages stored in a sequential manner, each page divided into a plurality of memory blocks arranged in the form of a matrix in rows ‘1 to x’ and columns ‘1 to n’, the data being stored in a sequential manner starting from (1,1) to (x, n), said system (200) comprising:
• a table (202) configured to store said memory blocks, addresses of said memory blocks, a status corresponding to each of said addresses of said memory blocks and location of each of said memory blocks;
• an inputting module (204) configured to receive said data to be written in said memory block;
• a status module (206) configured to cooperate with said inputting module (204) and said table (202) to compare and extract statuses and addresses of (1,1) and a (x,n), and further configured to generate and transmit read or write command if said compared status are both (1) or both (0) or (0xFF) and generate and transmit a search command if said compared status are (1) and (0) or (0xFF) or vice versa;
• a search module (208) configured to cooperate with said status module (206) to receive said search command and perform a binary search for said memory block having a transition of status upon receiving said search command, and further configured to generate and transmit said write command to said execution module (210) to write to said searched memory block; and
• an execution module (210) configured to cooperate with said status module (206) and said search module (208) to receive said write command and to move the read/write head to said memory block to write said data to said memory block.

4. The system as claimed in claim 3, wherein said status module (206) includes:
• a crawler and extractor (212) configured to cooperate with said status table (202) to crawl through said table (202) to extract said status of (1,1) and (x,n); and
• a comparator (214) configured to cooperate with said crawler and extractor (212) to
o compare said status of said (1,1) and said (x,n);
o generate and transmit said read or write command if said compared status are same; and
o generate and transmit said search command if said compared status are different.

5. The system as claimed in claim 3, wherein if said compared statuses are same as default status, said data is written on (1,1).
6. The system as claimed in claim 3, wherein said memory block contains 256-1024 bytes of data.

Documents

Orders

Section Controller Decision Date

Application Documents

# Name Date
1 201941010521-IntimationOfGrant28-08-2024.pdf 2024-08-28
1 201941010521-STATEMENT OF UNDERTAKING (FORM 3) [18-03-2019(online)].pdf 2019-03-18
2 201941010521-PatentCertificate28-08-2024.pdf 2024-08-28
2 201941010521-PROVISIONAL SPECIFICATION [18-03-2019(online)].pdf 2019-03-18
3 201941010521-PROOF OF RIGHT [18-03-2019(online)].pdf 2019-03-18
3 201941010521-AMMENDED DOCUMENTS [27-08-2024(online)].pdf 2024-08-27
4 201941010521-FORM 13 [27-08-2024(online)].pdf 2024-08-27
4 201941010521-FORM 1 [18-03-2019(online)].pdf 2019-03-18
5 201941010521-MARKED COPIES OF AMENDEMENTS [27-08-2024(online)].pdf 2024-08-27
5 201941010521-DRAWINGS [18-03-2019(online)].pdf 2019-03-18
6 201941010521-Response to office action [27-08-2024(online)].pdf 2024-08-27
6 201941010521-DECLARATION OF INVENTORSHIP (FORM 5) [18-03-2019(online)].pdf 2019-03-18
7 201941010521-Proof of Right (MANDATORY) [05-04-2019(online)].pdf 2019-04-05
7 201941010521-PETITION UNDER RULE 137 [26-04-2024(online)].pdf 2024-04-26
8 Correspondence By Agent_Form1_24-04-2019.pdf 2019-04-24
8 201941010521-Written submissions and relevant documents [26-04-2024(online)].pdf 2024-04-26
9 201941010521-Correspondence to notify the Controller [08-04-2024(online)].pdf 2024-04-08
9 201941010521-ENDORSEMENT BY INVENTORS [17-03-2020(online)].pdf 2020-03-17
10 201941010521-DRAWING [17-03-2020(online)].pdf 2020-03-17
10 201941010521-FORM-26 [08-04-2024(online)].pdf 2024-04-08
11 201941010521-COMPLETE SPECIFICATION [17-03-2020(online)].pdf 2020-03-17
11 201941010521-US(14)-HearingNotice-(HearingDate-24-04-2024).pdf 2024-04-05
12 201941010521-CLAIMS [11-04-2022(online)].pdf 2022-04-11
12 201941010521-FORM 18 [18-03-2020(online)].pdf 2020-03-18
13 201941010521-COMPLETE SPECIFICATION [11-04-2022(online)].pdf 2022-04-11
13 201941010521-FORM-26 [27-05-2021(online)].pdf 2021-05-27
14 201941010521-FER.pdf 2021-10-17
14 201941010521-FER_SER_REPLY [11-04-2022(online)].pdf 2022-04-11
15 201941010521-FORM 3 [27-12-2021(online)].pdf 2021-12-27
16 201941010521-FER.pdf 2021-10-17
16 201941010521-FER_SER_REPLY [11-04-2022(online)].pdf 2022-04-11
17 201941010521-FORM-26 [27-05-2021(online)].pdf 2021-05-27
17 201941010521-COMPLETE SPECIFICATION [11-04-2022(online)].pdf 2022-04-11
18 201941010521-FORM 18 [18-03-2020(online)].pdf 2020-03-18
18 201941010521-CLAIMS [11-04-2022(online)].pdf 2022-04-11
19 201941010521-COMPLETE SPECIFICATION [17-03-2020(online)].pdf 2020-03-17
19 201941010521-US(14)-HearingNotice-(HearingDate-24-04-2024).pdf 2024-04-05
20 201941010521-DRAWING [17-03-2020(online)].pdf 2020-03-17
20 201941010521-FORM-26 [08-04-2024(online)].pdf 2024-04-08
21 201941010521-Correspondence to notify the Controller [08-04-2024(online)].pdf 2024-04-08
21 201941010521-ENDORSEMENT BY INVENTORS [17-03-2020(online)].pdf 2020-03-17
22 201941010521-Written submissions and relevant documents [26-04-2024(online)].pdf 2024-04-26
22 Correspondence By Agent_Form1_24-04-2019.pdf 2019-04-24
23 201941010521-PETITION UNDER RULE 137 [26-04-2024(online)].pdf 2024-04-26
23 201941010521-Proof of Right (MANDATORY) [05-04-2019(online)].pdf 2019-04-05
24 201941010521-DECLARATION OF INVENTORSHIP (FORM 5) [18-03-2019(online)].pdf 2019-03-18
24 201941010521-Response to office action [27-08-2024(online)].pdf 2024-08-27
25 201941010521-MARKED COPIES OF AMENDEMENTS [27-08-2024(online)].pdf 2024-08-27
25 201941010521-DRAWINGS [18-03-2019(online)].pdf 2019-03-18
26 201941010521-FORM 13 [27-08-2024(online)].pdf 2024-08-27
26 201941010521-FORM 1 [18-03-2019(online)].pdf 2019-03-18
27 201941010521-PROOF OF RIGHT [18-03-2019(online)].pdf 2019-03-18
27 201941010521-AMMENDED DOCUMENTS [27-08-2024(online)].pdf 2024-08-27
28 201941010521-PROVISIONAL SPECIFICATION [18-03-2019(online)].pdf 2019-03-18
28 201941010521-PatentCertificate28-08-2024.pdf 2024-08-28
29 201941010521-STATEMENT OF UNDERTAKING (FORM 3) [18-03-2019(online)].pdf 2019-03-18
29 201941010521-IntimationOfGrant28-08-2024.pdf 2024-08-28

Search Strategy

1 SearchStrategyMatrixE_07-05-2021.pdf

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