DESC:TITLE OF THE INVENTION
A system for limiting inrush current.

FIELD OF THE INVENTION
[001] The invention generally relates to system for limiting inrush current.

BACKGROUND OF THE INVENTION
[002] Switching inrush current leads to malfunction/ failure of electrical devices such as capacitor banks, transformers, motors, etc. Thus, it is desirable to reduce the effect of inrush current. There are several techniques that are known for limiting the switching inrush current. They include the use of series reactors; the use of semiconductor switches; the use of point on wave switching; and the use of electromechanical switches with pre closing resistors.
[003] Electromechanical switches with pre closing resistors when used for limiting switching inrush current uses two switches – a main switch and an auxiliary switch. The auxiliary switch is first closed thereby connecting a series resistor to an electrical device. The series resistor effectively limits and damps switching inrush current. After a certain time lag, the main switch is closed to bypass the series resistor and the auxiliary switch or just the resistor. Thus, the current limiting series resistor is in play only during the initial switching operation. Once the main switch is closed, the series resistor is effectively bypassed. This eliminates continuous, steady state power loss that would otherwise be caused by the series resistor.
[004] Known electromechanical switch configurations that are used to limit switching inrush current are shown in Figure 1 and Figure 2. There will be two instances of inrush current, first instance when closing of the auxiliary switch and second instance when closing of the main switch. The magnitude of these two inrush currents will depend upon the value of resistance and the time lag between the closing of main and auxiliary switch, for a given electrical device (type, nature and power rating), system voltage and the instance of closing of auxiliary switch. Figure 1 shows a power source P connected to an electrical device E. An auxiliary switch Sa and a series resistor R is connected between the power source P and the electrical device E. A main switch Sm is connected in parallel with the auxiliary switch Sa and the series resistor R. Figure 2 also shows power source P connected to an electrical device E. An auxiliary switch Sa and a series resistor R is connected between the power source P and the electrical device E. A main switch Sm is connected in parallel with the series resistor R.
[005] In operation for both circuits shown in Figure 1 and Figure 2, the auxiliary switch Sa is closed, leading to inrush of current from the power source P. The resistor R limits inrush current from damaging the electrical device E. After the partial or complete decay of initial transient current after a predetermined time lag, the main switch Sm is closed. Thus, in Figure 1 the path of least resistance between the power source P and the electrical device E now bypasses the auxiliary switch Sa and the resistor R; and in Figure 2 the path of least resistance between the power source P and the electrical device E now bypasses the resistor R alone. The current now flows through the main switch Sm with no limiting resistance between the power source P and the electrical device E.
[006] In both of the above cases, there is a fixed value of resistance chosen depending upon the characteristics of the electrical device. For example, if the electrical device E is a capacitor bank, then the capacitance of the capacitor bank (generally denoted by the power, kvar at a given system voltage) will determine the optimal value of the resistance required. However, the value of resistance required will be different for varied electrical devices. Thus, other capacitor banks or other reactive loads would need new resistors with different resistance values for optimizing the inrush current. This is problematic as resistors would need to be changed every time the electrical device connected to the power source was changed (for example when the rating of the capacitor bank is changed). Also during initial installation one has to determine the optimal value of resistance and this possess complexity as the power rating of the capacitor bank could be anything and thus would require a wide range of resistances to be made available.
[007] In view of the above, there is a need in the art for a solution to overcome at least the abovementioned drawbacks.

SUMMARY OF THE INVENTION
[008] In one aspect the present invention provides a system for limiting inrush current from a power source to an electrical device, the system comprising an auxiliary switch connected with the power source; a first resistor connected with the auxiliary switch; a second resistor connected with the electrical device; a first resistive link connected in parallel with the first resistor and a second resistive link connected in parallel with the second resistor; a third resistive link interconnecting the first resistor and second resistor, the first, second and third resistive links are removable resistive links allowing resistance of the system to be varied depending upon rating of the electrical device; main switch Sm connected with the electrical device; and at-least one connecting link for connecting the main switch Sm with the power source P or for connecting the main switch with the auxiliary switch, the connecting links are removable links, the connecting link is a removable connecting link allowing the configuration of the system to be varied.

BRIEF DESCRIPTION OF THE INVENTION
[009] Reference will be made to embodiments of the invention, examples of which may be illustrated in accompanying figures. These figures are intended to be illustrative, not limiting. Although the invention is generally described in context of these embodiments, it should be understood that it is not intended to limit the scope of the invention to these particular embodiments.
Figure 1 shows an electromechanical switch configuration that is used to limit switching inrush current.
Figure 2 shows an electromechanical switch configuration that is used to limit switching inrush current.
Figure 3 shows a system for limiting inrush current according to an embodiment of the invention.
Figure 4 shows a system for limiting inrush current according to an embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION
[010] The present invention is directed towards a system for limiting inrush current whereby the system can be adapted to electrical devices having different ratings. The system obviates the need of changing to a new system when rating of the electrical device is changed/varied.
[011] Figure 3 shows a system 100 for limiting inrush current. The system 100 is placed between a power source P and an electrical device E. Accordingly, the system 100 prevents inrush or sudden surge of current from the power source P to the electrical device E. The system 100 comprises an auxiliary switch Sa, a first resistor R1, a second resistor R2, plurality of resistive links L1, L2, L3, plurality of connecting links C1, C2, and a main switch Sm.
[012] As shown, the first resistor R1 is connected with the auxiliary switch Sa and the second resistor R2 is connected with the electrical device E. The first resistive link L1 is connected across the first resistor R1 and the second resistive link L2 is connected across the second resistor R2. In effect, the first resistive link L1 is in parallel with the first resistor R1 and the second resistive link L2 is in parallel with the second resistor R2. The third resistive link L3 interconnects the first resistor R1 and the second resistor R2. In effect the third resistive link is in series with first resistor R1 and second resistor R2. In an embodiment, the resistive links L1, L2, L3 are removable resistive links. In a further embodiment, the resistive links are metallic bus bars with low resistance or resistances with fixed resistance value as to increase the number of resistance combinations that can be obtained. Accordingly, the resistance offered by the system 100 can be varied by selectively adapting the resistive links L1, L2, L3. In this regard, the first resistor R1 and the second resistor R2 has a fixed value. Thus, depending upon actual rating of the electrical device E, optimal value of resistance can be selected by merely connecting/ disconnecting the removable resistive links L1, L2, L3. The links are manually connected before energization of the electrical device E to get optimal value of resistance for a given electrical device. Thus, the resistors R1, R2 along with removable links L1, L2, L3 enable the system 100 to have various resistance values in the same circuit, by connecting and disconnecting the links.
[013] As shown, the main switch Sm is connected to the electrical device E and is connectable to the power source P via a first connecting link C1 or a second connecting link C2. In an embodiment, the connecting links C1, C2 are removable connecting links. Accordingly, the connecting links C1, C2 enable the configuration of the system 100 to be varied to a first configuration or a second configuration. In the first configuration, the first connecting link C1 is adaptable between the power source P and the auxiliary switch Sa whereby the system 100 will be in a configuration similar to the configuration shown in figure 1. In the second configuration, the second connecting link C2 is connected between the auxiliary switch Sa and the first resistor R1, whereby the system 100 will be in a configuration similar to the configuration shown in figure 2. Accordingly, the configuration of the system 100 can be varied by selectively adapting the connecting links C1, C2. While both configurations are effective in limiting the inrush current, these configurations have their own advantages and disadvantages. In the first configuration as shown in Figure 1, only the main switch is in operation after switching and hence is rated to carry the full load current and system fault current. The auxiliary switch can be rated for lower load current and lower fault current. In the second configuration as shown in Figure 2, both the switches are in series during operation after switching and hence both the switches have to be rated to carry the full load current and system fault current. In the second configuration, since the two switches are in series, during the opening of the switches, both the switches are in series and thus can share the voltage during opening and offer a lower probability of restrike especially in case when the electrical device E is a shunt capacitor bank. Thus with a set of connecting links, C1, C2, the switching device can be configured to suit different application requirements.
[014] Further, in either of the configurations, the main switch Sm and auxiliary switch Sa can have similar characteristics. However, main switch Sm is configured to operate after a time lag. A control unit may be provided for time lag between switches whereby a fine adjustment of the time lag of closing between the auxiliary switch Sa and the main switch Sm further optimizes the limiting of the inrush current. The time lag can be obtained either through a mechanical system such as cam/ gear/ spring arrangement or electronic circuit such as a circuit for delivering a delayed signal to the closing coil. The time lag can be adjusted in a range of 1ms to 30 ms. Further, the control unit in addition to controlling operation of the auxiliary switch and the main switch, can also control the sequence of operation and time delay between the two switches.
[015] Figure 4 shows a system 100 for limiting inrush current according to an embodiment of the invention. The system 100 receives current from a power source from a power line 110. The system 100 has switches Sa, Sm, resistors R1, R2, removable links L, and connecting links C similar to configuration as shown in Figure 3. In an embodiment of the invention, as shown in Figure 4, the resistors R1, R2, and the switches Sa, Sm are contained in hollow insulators as shown in Figure 4. The system 100 rests on a stand 120 for support. The system 100 also has a box 130 which has controls or mechanisms for operating the switches Sa, Sm. Mechanism can be motor driven, spring operated, magnetic actuator etc. A control unit may be provided for time lag between switches. The system 100 is connected to an electrical device or capacitor bank or Power equipment via a cable 150. The configuration, as shown in Figure 4, facilitates easy change of configuration and selection of range of resistances with simple connection of links to get optimal value of resistance in a system that is used to limit inrush current according to an embodiment of the invention.
[016] Further, although both types of configuration - first configuration and second configuration can be realized in the present invention by an external link, first configuration is the preferred configuration as the system can be optimized for this configuration to get the best of switching and steady state performance.
[017] In first configuration, switch Sa is expected to carry the switching inrush current which would flow for a few milliseconds. This switch can be selected to have a higher voltage rating (to prevent a restrike), higher closing and opening speeds, and a lower rms and fault current. Since the rated continuous and fault currents are lower, the mechanism can be lighter and thus can facilitate a faster operating speeds and longer stroke. Switch Sm is selected / designed to carry the continuous rms current and also the system fault currents and can be bulkier.
[018] Further, the auxiliary switch and main switch are electromechanical switches, and can have similar or different characteristics. In first configuration, though both the switches can be of same / similar characteristics, a further optimization can be obtained by selecting switch Sa with higher voltage performance characteristics (such as higher BIL, faster opening / closing speeds, higher travel / stroke, higher restrike voltage) and switch Sm with higher current performance characteristics (such as higher rate current, higher fault current capability etc.).
[019] In second configuration, since both the switches are expected to carry the rated continuous current as well as fault current, both the switches have to be rated for full rated as well as fault current. Though they are in series during opening and are expected to share the opening voltages, from a prudent design aspect both the switches have to be rated for the full system rated / minimal voltages and basic insulation level.
[020] By way of example, various combinations of switching sequences are as indicated below, wherein the electrical device is a capacitor bank.
The closing and opening operation and aspects of first configuration:
Closing operation of first configuration - Sa, first and then Sm after predetermined time delay.
When Sa is closed, the capacitor gets connected to the power supply through the pre closing resistor and this resistor limits the inrush current.
The voltage across the capacitor raises and tends to follow supply voltage and the value of resistance in combination with the value of capacitance determines the initial charging time constant.
The current through the capacitor leads the voltage across the capacitor by 90 degrees and this current through the RC series combination leads the system voltage by an angle determined by the power factor of the circuit comprising of R and C.
The first peak switching inrush current is determined by the instant at which the switch Sa is closed, value of capacitance C and value of resistance R. (ignoring the system fault level and presence of parallel connected capacitor banks)
For a given set of system conditions and capacitance value, it is evident that larger the value of R, lower will be the first switching inrush current.
Assuming the worst case closing time of voltage peak and virtual short circuit of capacitor due to high frequency of switching transient, the peak of the first switching inrush current would be
Ip1 = Vm / R
The initial switching transient delays in a short time (few ms), determined by the values of circuit inductance, resistance and capacitance.
The current flowing into the capacitor also flows through the pre closing resistor and produces a voltage drop across it. This exhibits a damped sinusoidal characteristic.
After some time delay (typically in the range of 1ms to 30 ms) the second switch, Sm is closed to bypass the pre closing resistor and the first switch Sa.
The second inrush current depends upon the voltage drop across the resistor, which depends upon the value of resistance, value of current flowing through it, which again depends upon the time instant and the value of capacitance.
For a given set of conditions (capacitance value, closing time instances), the voltage drop across the resistor is directly proportional to the resistance value and thus a higher value of resistance though would limit the first inrush current, would lead to a higher second inrush current.

Opening operation for first configuration - Sm first and then Sa
When Sm is opened the current transfers to the path through Sa and resistance. This also improves the power factor of the load circuit, which now comprises of the switched capacitor bank and the resistor. Sa is then opened. Sa is configured to have a higher opening speed and higher transient voltage withstand characteristics so as to avoid flashover.

The closing and opening operation and aspects of second configuration:
Closing operation for second configuration - Sa, first and then Sm after predetermined time delay
The operation is similar to first configuration, except that the switch Sm bypasses just the resistance and not the combination of resistance R and first switch Sa.
Since the contact resistance of switch Sa is very low (in the order of few micro Ohms) compared to the resistance R (in the order of Ohms), all the aspects / parameters can be considered to be the same as a first approximation.

Opening operation for second configuration - Sm first and then Sa OR Sa first and then Sm
In case Sm is first opened, the current transfers to the path through Sa and resistance. This also improves the power factor of the load circuit, which now comprises of the switched capacitor bank and the resistor. Sa is then opened. Sa is configured to have a higher opening speed and higher transient voltage withstand characteristics so as to avoid flashover.

In case Sa is first opened, the current transfers to the path through Sm. After certain period Sm is opened to break the capacitive current.

In second configuration in both cases for certain duration of time (in ms) both the switches (Sa and Sm) are in series and the voltage will be shared thus minimizing the probability of a restrike. Though this is an advantage, for operational reasons both the switches have to be rated for full system BIL and capacitor bank current to ensure reliability under all operating conditions.

First configuration under steady state operations:
Steady state rms currents flow through Sm, Sm is rated for the full capacitor bank current including over currents due to system over voltages, harmonics etc. Since Sa will carry currents for a very short duration (few ms during the closing / opening operations), Sa can be configured for a much lower current capacity.
Fault currents will be flowing through just Sm (neglecting the rare probability of Sa closing on faults wherein the currents would be limited by the pre closing resistance), and hence Sm is rated to handle full fault currents and Sa is rated for much lower currents. Since Sm is rated to carry full load currents and fault currents, the interrupter is designed for higher currents and the mechanism also for handling such higher currents and thus has a higher force. The travel of Sm can be lower, but the associated mechanism has a higher force to handle high currents. Sa is designed to have a higher speed, travel and voltage characteristics and this is used for closing / opening operatons and does not carry the load current or fault currents.

Second configuration under steady state operations :
Since both the switches (Sa and Sm) are in series and carry the full load current these have to be designed for the rated current of capacitor bank including over currents associated with over voltage, harmonics etc.
Also, since both the switches (Sa and Sm) are in series and carry the full fault current, these have to be designed for the rated fault current of the system.
[021] The present invention thus enables varying the value of the pre closing resistance by a simple arrangement so that a wider range of capacitance values / capacitor bank ratings can be optimized for inrush current performance. The present invention further enables configuring the switch either as type 1 or type 2, based on a simple interconnection and fine tunes inrush current performance by user settable time lag between the auxiliary and main contacts and such a time lag realized by either electromechanical or electronic means.
[022] Advantageously, the present invention provides a system for limiting inrush current which is configurable to various resistance values and/or configurations by connecting and disconnecting the links allowing the system to be connect to electrical devices having different ratings.
[023] While the present invention has been described with respect to certain embodiments, it will be apparent to those skilled in the art that various changes and modification may be made without departing from the scope of the invention.
,CLAIMS:WE CLAIM:
1. A system 100 for limiting inrush current from a power source P to an electrical device E, the system comprising:
an auxiliary switch Sa connected with the power source P;
a first resistor R1 connected with the auxiliary switch Sa;
a second resistor R2 connected with the electrical device;
a first resistive link L1 connected in parallel with the first resistor R1 and a second resistive link L2 connected in parallel with the second resistor R2;
a third resistive link L3 interconnecting the first resistor R1 and second resistor R2, the first, second and third resistive links are removable resistive links allowing resistance of the system to be varied depending upon rating of the electrical device;
a main switch Sm connected with the electrical device; and
at-least one connecting link for connecting the main switch Sm with the power source P or for connecting the main switch with the auxiliary switch, the connecting links are removable links, the connecting link is a removable connecting link allowing the configuration of the system to be varied.
2. The system as claimed in claim 1, wherein the system comprises a control unit for controlling operation of the auxiliary switch and the main switch and the sequence of operation and time delay between the two switches.
3. The system as claimed in claim 2, wherein the control unit is configured to operate the auxiliary switch and the main switch at pre-determined time intervals wherein a time lag is between 1ms and 30 ms.
4. The system as claimed in claim 1, wherein the auxiliary switch and the main switch are electromechanical switches with similar or different characteristics.
5. The system as claimed in claim 1, wherein the resistive links are metallic bus bars with low resistance or resistances with fixed resistance value so as to increase the number of resistance combinations that can be obtained.