DESC:FIELD OF THE INVENTION
The present disclosure relates generally to wireless communication systems. The present disclosure, more particularly, relates to a wideband frequency receiver.
BACKGROUND OF THE INVENTION
Frequency measurement using a delay line method has lot of challenges. In the present scope, it follows homodyning technique. Thus, a Local Oscillator (LO) is constructed from incoming radio frequency (RF) signal itself. Thereby a huge amount of gain building is must to drive mixers. While doing so it ends up flatness issues, prone to oscillate, nonlinear phase over the band and unwanted leakage signals to adjacent channels. Thus, a very robust and accurate RF laying out planning with proper power management techniques is required to fulfil the requirements. Implementation of well thought-out tactics require proper design realization engineering with availability of components in the market keeping minimum effects of above described issues. Substrate attachments with carrier-based attachment process especially for bigger PCBs (Printed Circuit Board) create voids beneath the substrate and degrades the quality of RF phase performance. Thereby direct substrate attachment onto housing at a time tactics is planned to realize the strategy to improve the RF performance. It is observed that unwanted oscillation and leakage between inter channels becoming stronger if gain blocks are closely spaced and have no proper isolation between them. Various RF clusters are planned to overcome this issue. Fixed delay lines and vertical transition reduces flexibility and alterability of delay lines and transitions between various RF layers. Laying out of LO and RF channels side by side create signal overriding issues due to vast power level difference. Thus, separate layers are planned in different RF clusters to overcome these issues. Overall leakage between different RF clusters after full integration is a big challenge. Separate RF modules are planned in the design phase, designed, realized and sealed to keep leakage minimum. Interconnections between RF modules are done by very cost effective flexible and tuneable RF transitions.
US 9729363 B2 describes about a frequency discriminator comprising a power splitter for splitting a signal into first and second paths, wherein the first path is configured to provide a first, straight-through signal and second path includes a frequency-dependent element, such as low-pass filter, so as to provide a second signal. The frequency discriminator further comprises a circuit configured to compare the first and second signals and generate an instantaneous frequency signal dependence thereon. It further describes a detector-based frequency discriminator. A huge post digital processing activity is involved into the final frequency calculations.
US 9667349 B1 describes about a method of dynamic range extension for heterodyne fiber-optic interferometers, and more particularly towards the use of instantaneous carrier to extend the dynamic range of heterodyne fiber-optic interferometers. The method includes the providing of a heterodyne fiber-optic interferometer having a demodulator and an associated carrier frequency. The method also includes the determining of demodulator excessions. The detecting of the demodulator excessions and the determining of an appropriate correction factor is based in information from the instantaneous carrier frequency. The method also includes the introduction of the appropriate correction factor to the demodulator.
Hence, there is a wideband frequency receiver, which solves the above defined problems.
Summary of the Invention
An aspect of the present invention is to address at least the above-mentioned problems and/or disadvantages and to provide at least the advantages described below.
Accordingly, in one aspect of the present invention relates to a wideband discrete frequency resolve receiver (100), the receiver comprising: an RF system having a first module (120) and a second module (140) coupled by plurality of transition mediums (1111, 1112 and 1113) wherein the modules are isolated from each other and independent, the first and the second module comprising plurality of electrically isolated clusters (122, 124, 125 and 126) with atleast two interconnects, where each cluster comprises plurality of active splitters, gain blocks, detector, passive splitters, delay lines and passive equalizer, wherein the plurality of transition medium (1111, 1112 and 1113) couples at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of in phase RF layer of the first module with corresponding at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of RF layer of the second module.
Other aspects, advantages, and salient features of the invention will become apparent to those skilled in the art from the following detailed description, which, taken in conjunction with the annexed drawings, discloses exemplary embodiments of the invention.
BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
The above and other aspects, features, and advantages of certain exemplary embodiments of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings in which:
Figure 1 illustrates a block diagram depicting a wideband frequency receiver, according to an exemplary implementation of the present disclosure.
Figure 2 illustrates a schematic diagram depicting staking details of module-1 and module-2 with interconnections, according to an exemplary implementation of the present disclosure.
Figure 3 illustrates a block diagram depicting RF module-1 with various clusters, according to an exemplary implementation of the present disclosure.
Figure 4 illustrates a block diagram depicting RF module-2 with various clusters, according to an exemplary implementation of the present disclosure.
Figure 5 illustrates a schematic diagram depicting various clusters of module-1, according to an exemplary implementation of the present disclosure.
Figure 6 illustrates a schematic diagram depicting various quadrature phase LO and Delay distribution circuits of multi-layer module-2, according to an exemplary implementation of the present disclosure.
Figure 7 illustrates a schematic diagram depicting various in phase LO and main Delay distribution circuits of multi-layer module-2, according to an exemplary implementation of the present disclosure.
Figure 8 illustrates a block diagram depicting Cluster-1 with various components, according to an exemplary implementation of the present disclosure.
Figure 9 illustrates a block diagram depicting Cluster-2 with various components, according to an exemplary implementation of the present disclosure.
Figure 10 illustrates a block diagram depicting Cluster-3 with various components, according to an exemplary implementation of the present disclosure.
Figure 11 illustrates a block diagram depicting Cluster-4 with various components, according to an exemplary implementation of the present disclosure.
Figure 12 illustrates a graphical representation depicting Phase nonlinearity against Frequency for D1 Line, according to an exemplary implementation of the present disclosure.
Figure 13 illustrates a graphical representation depicting Phase nonlinearity against Frequency for D2 Line, according to an exemplary implementation of the present disclosure.
Figure 14 illustrates a graphical representation depicting Phase nonlinearity against Frequency for D3 Line, according to an exemplary implementation of the present disclosure.
Figure 15 illustrates a graphical representation depicting Phase nonlinearity against Frequency for D4 Line, according to an exemplary implementation of the present disclosure.
Figure 16 illustrates a graphical representation depicting Phase nonlinearity against Frequency for D5 Line, according to an exemplary implementation of the present disclosure.
Figures 17a-17d illustrate graphical representations depicting Pulse amplitude response of final RF output, according to an exemplary implementation of the present disclosure.
Figure 18 illustrates a graphical representation depicting resolved error frequency between output and input frequency respectively against input frequency, according to an exemplary implementation of the present disclosure.
Persons skilled in the art will appreciate that elements in the figures are illustrated for simplicity and clarity and may have not been drawn to scale. For example, the dimensions of some of the elements in the figure may be exaggerated relative to other elements to help to improve understanding of various exemplary embodiments of the present disclosure.
Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures.
DETAILED DESCRIPTION OF THE INVENTION
The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.
The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.
It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a component surface” includes reference to one or more of such surfaces.
By the term “substantially” it is meant that the recited characteristic, parameter, or value need not be achieved exactly, but that deviations or variations, including for example, tolerances, measurement error, measurement accuracy limitations and other factors known to those of skill in the art, may occur in amounts that do not preclude the effect the characteristic was intended to provide.
Figs. 1 through 18, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way that would limit the scope of the disclosure. Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged communications system. The terms used to describe various embodiments are exemplary. It should be understood that these are provided to merely aid the understanding of the description, and that their use and definitions, in no way limit the scope of the invention. Terms first, second, and the like are used to differentiate between objects having the same terminology and are in no way intended to represent a chronological order, unless where explicitly stated otherwise. A set is defined as a non-empty set including at least one element.
The various embodiments of the present disclosure describe a wideband frequency receiver and method thereof. It further provides an improved system and method for use in an industrial environment. However, the systems and methods are not limited to the specific embodiments described herein. Further, structures and devices shown in the figures are illustrative of exemplary embodiments of the presently disclosure and are meant to avoid obscuring of the presently disclosure.
Typically, design success involves establishment of lots of innovative methodologies and well directed implementation of those methodologies for complex subsystem like wideband immediate discrete frequency resolve (WIDFR) receivers. Appropriate engineering is essential in design realization phase. The present disclosure describes techniques which have been implemented of making RF design successful for multi octave band. These techniques are also low cost, compact, easily realizable, more noise immune and ease of troubleshooting. Very low-cost flexible and tuneable 45° broadband RF (Radio Frequency) transitions. It is used to pass information between RF layers and as well as modules. Direct substrate attachment technique. It ensures uniformity of substrate attachment at various places as it’s done at a time. Separate RF clusters with easy interconnect. This technique mostly improves unwanted oscillations with very high gain LO (Local Oscillator) chain, noise performances and isolations between channels. Hermetic active and passive modules realization. It improves performance of the receiver by improving input output port isolations of different RF clusters. Walls between top covers and area specific scooping inside the covers and RF anti radiant jacket over the covers. It improves adjacent channel leakage at higher frequencies. In-phase and quadrature-phase high gain LO laying out technique in different RF layers. It helps to overcome signal override over comparably low power RF signal. Flexible and easily tuneable noise immune, low loss delay lines. These delay lines are realized at the higher delay paths to reduce total path loss and slope characteristics of RF signal. And Quasi TEM to pure TEM broadband horizontal RF transitions. They are also used and realized by using clamps to make receiver design compact.
Design realization of a complex WIDFR receiver in a circular manner with proper space utilization is a challenge. Thereby planning of RF routing needs to be done in appropriate manner. Planning of RF design realization have been split into several stages. In the first stage whole block diagram have been split into two RF modules viz; RF power building module (Module–1) mainly builds LO power and Delay Line (Module–2) module mainly distributes delay lines and LO branches for different delay lines. Space allocations for each module have been decided keeping components’ height into consideration from finally allocated dimensions for this receiver. RF as well as supply interconnections between two modules are done by very low-cost flexible, easily realizable and tuneable 45° broadband RF transitions and normal sealed wires respectively. Thereby RF signals of Module–1 is completely isolated from Module–2. Supply lines and RF lines are running parallel same side of the housing and sometimes careful crisscross made between RF and DC (Direct Current) lines. LO building block is very important as homodyning technique is adopted. So, these blocks have been designed as different clusters to isolate high power signals from one stage to another. RF path of Module–1 is comprises of frequency select device, active splitter as cluster–1, gain building block with frequency select device as cluster–2. It builds 95% of LO power and it’s having more than 90 dB gain. Cluster–3 is constituted by splitter and 90° phase splitter. Detector path is kept isolated from high gain LO chain as cluster–4. Each RF clusters is constituted by multiple RF components. Each RF components are designed as hermetic sealed package device. Isolations between input and output is the advantage of these hermetic sealed modules. It is helpful to build high gain RF channels by reducing inter-stage coupling and inter-channel leakages. Inter and intra module flexible RF transitions are horizontal in nature between pure TEM (Transverse Electro Magnetic) and Quasi TEM lines. Module–2 is comprises of LO1 (in phase) and LO2 (quadrature phase) and Delay lines. Physically separate LO line laying out tactic is followed. In this process separate layers of same housing (back to back) is selected. Flexible 45° RF transitions are used to overcome crossovers between LO1 and LO2. By this tactic high power LOs are isolated from each other.
Moreover, RF and both the LOs are realized as different physically separated clusters thereby signal override between weak RF signals to stronger LO have been avoided. Again, LO and RF clusters are further divided into sub-clusters by appropriate mechanical boundaries to place hermetic modules. LO side is comprising of cluster–5 as LO1 and cluster–6 as LO2. RF delay line side have two more RF clusters of active splitters. Most of the sub-clusters are realized by hermetic sealed active as well as passive modules which further improves the inter-stage coupling. Delay paths are physically separated by boundaries and scooped cover plates with anti-radiant jackets. The present disclosure further discloses a Direct attachment technique of substrates dual side of the housing. Uniformity of the substrate attachment is achieved for dual side of the housing. This process is quicker than conventional carrier attachment process. Uniformity of attachment for a bigger housing itself is a difficult task but appropriate technique is planned and adopted to success the challenge. Direct attachment of substrates at a time reduces the voids beneath the RF tracks. It improves the phase nonlinearity performances over the band. Another advantage of the direct attachment is that it accommodates dense RF circuitry in relatively less area as additional fixing space of substrate is not required. Realizing lengthy delay lines in the form of strip or microstrip line suffers from higher losses and flatness issues. Tuning of these lines is difficult and changing routing directions is merely impossible. These lines are also suffer from inter channel interferences between closely spaced lines. These problems are overcome by using low loss, very flexible and easily tuneable coaxial lines. Advantage of this delay line is layer changing is easier than strip and microstrip line. Low gain devices are sufficient to restore power levels at the end due to low loss of the line compared to strip and microstrip line. Thereby it reduces nonlinearity issues unlike multistage gain blocks. Moreover, it reduces the power requirement of the overall module. Power supply lines routing is a problem for this module as RF is laid out both sides of the housing. It’s done in the same layer side by side of RF tracks and sometimes beneath the RF tracks to avoid crossover between DC and RF.
Figure 1 illustrates a block diagram depicting a wideband frequency receiver, according to an exemplary implementation of the present disclosure.
Figure 2 illustrates a schematic diagram depicting staking details of module-1 and module-2 with interconnections, according to an exemplary implementation of the present disclosure.
Referring to Figure 1 and Figure 2, a WIDFR receiver 100 comprises of two basic building blocks viz; module-1, 120 and module-2, 140. 120 and 140 are connected via three flexible 45° broadband easily tuneable quasi TEM- pure TEM to pure TEM - quasi TEM transitions 1111, 1112 and 1113. These flexi transitions are very easy to reassemble from both the ends. Thereby module-1 and 2 can easily be dismantled for troubleshooting for any post development phase activities. This separate module planning tactic made this complex design easy for realization.
In one embodiment, the wideband discrete frequency resolve receiver (100), the receiver comprising: an RF system having a first module (120) and a second module (140) coupled by plurality of transition mediums (1111, 1112 and 1113) wherein the modules are isolated from each other and independent, the first and the second module comprising plurality of electrically isolated clusters (122, 124, 125 and 126) with atleast two interconnects, where each cluster comprises plurality of active splitters, gain blocks, detector, passive splitters, delay lines and passive equalizer, wherein the plurality of transition medium (1111, 1112 and 1113) couples at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of in phase RF layer of the first module with corresponding at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of RF layer of the second module.
In the present invention, each transition medium comprises (1111, 1112 and 1113) atleast two pure TEM to quasi TEM transitions which couples atleast two different substrates situated in two different modules. Each cluster is mechanically further divided into sub-clusters for placement of plurality of hermetic sealed modules, where each hermetic module couples at least two different substrates situated in two different modules in a cluster. Each transition is entirely isolated from each other to reduce inter channel interferences.
In the present invention, each transition is held by mechanical clamps for providing mechanical strength and flexible transitions. Each channel of each cluster is designed in zigzag way mechanically to produce multiple reflections of leakage RF signals, where multiple reflections weakens the coupled signals between the substrate, thereby reducing the tendency of strong signal overriding over weak signal.
A cover of each clusters is an EM anti radiant jacket cover. The receiver further comprises a mechanical wall between covers to reduce leakage signals from one channel to another channel. The receiver further comprises a plurality of delay lines (D1-D5) with quasi TEM to pure TEM broadband horizontal RF transitions, where the delay lines are covered by radiation proof jackets. The receiver further comprises a plurality of ground guiding RF tracks, where ground guiding RF tracks are coupled from one cluster to another cluster.
Figure 3 illustrates a block diagram depicting RF module-1 with various clusters, according to an exemplary implementation of the present disclosure.
In Figure 3, a module-1 is constituted of frequency select device 121, active splitter 122, gain block 1241, a 2nd frequency select device 1242, two way splitter 1251, phase splitter 1252 and a detector module. These components are clubbed into different RF clusters to realize the design into very compact manner. This cluster implementation tactic in the housing ensures better isolation between clusters and less inter-channel interferences between high to low power level channels.
Figure 4 illustrates a block diagram depicting RF module-2 with various clusters, according to an exemplary implementation of the present disclosure.
In Figure 4, a module 140 is constituted of four active splitters 122 with multiple outputs. It’s also having five delay paths D1, D2, D3, D4, D5, normal two way passive splitters like 144, 145,146,146,147, 148 and ten mixers142n (where n=1,….,10). Transitions 111x (where x=1, 2 and 3) connect module-1 and module-2 and isolates all other unwanted EM interferences. Thereby these two modules are physically separable. This realization tactic makes easy to troubleshoot and tune the individual modules as well as the whole system. Although these interconnections 111x are very closely spaced but they are fully covered by anti-radiant jackets thereby there is no signal over riding between strongest to weaker signal respectively. Among these three channels indicated in Fig-2, two are carrying high power LO in and quadrature phase (1112 and 1113) respectively and the rest one in phase RF 1111. This drastically reduces signal interference between two LO signals and it also avoids the most unavoidable RF crossovers. Due to flexible interconnections signals can easily be directed in the different RF layers of module-2. Thereby it become possible to route high power LO signals in different layers of module-2.
Figure 5 illustrates a schematic diagram depicting various clusters of module-1, according to an exemplary implementation of the present disclosure. In Figure 5, a module-1 is sub-divided into four different clusters. All clusters 122, 124, 125 and 126 are well isolated mechanically. Thereby output signals has no chance to leak to other channels. Cluster-1, 122 is constituted by two hermetic sealed sub-modules. Its layout tactic is made in such a way that 124 and 126 can’t talk each other. 126 is a very low power sensitive detector. Thereby strong signals from 124 should be avoided otherwise actual detector signal will be over ridden by unwanted signals. The layout planning of interconnecting channels between 122- 124 (1301) and 122-126 (1302) are zigzag. Strong radiated leakage signals from 124 is blocked while passing through 1301 and 1302 gets weakened because of multiple reflections from the zigzag walls. Thereby this tactic helps to keep actual signals fed for detector stronger than reflected signal. Thereby performance of the sensor remain unaffected. These mechanical routing of 126 and 124 are covered by metallic plates and well covers with anti-radiation jacket. 124 is formed by a series of gain blocks 1241 and a frequency select device 1242. These components are hermetic sealed sub-modules. This tactic of hermetic sealed sub-module implementation improves input to output isolations between two intermediate modules. It also reduces the tendency of oscillations between two amplifying sub-modules kept to build the gain as LO is constituted by homodyning technique. 124 plays most vital role to boost input signal power from sensitivity level to considerable high level irrespective of incoming signal to WIDFR receiver. This very high level signal constitutes three final signals for module-2 by the help of 125 cluster-3. 125 constitutes by a splitter 1251 and a phase splitter 1252. Laying out tactic of 125 is challenging because three channels carry different power levels as well as different phases. They must be isolated properly. 1303, 1304 and 1305 zigzag channels are planned to keep interference less from closely spaced channels. There is another reason to build these channels zigzag shapes to accommodate pre-calculated phases which helps to phase calculations easier in the module-2. 1303 and 1304 delay lines are implemented by CPWG (Co-planner Wave Guide) lines and reduces the chance of tune-ability. 1305 in phase LO path is implemented by partly quasi TEM and rest is pure TEM line. Laying out route of quadrature LO and in phase RF are planned in such a way that they separate enough from each other and produce calculated phases at the end of transition medium 111. As these lines are not implemented in pure TEM medium due to space constraint and to develop equal amount of phase at the same time, require lots of zigzag paths to follow. So, separation channels in few places is too nearby. Successive level of top covers is planned to avoid channel interferences. EM shielding jackets are covered on to the top covers to avoid micron level gaps between housing and top covers. Inter-channel interferences became negligible by arresting these microns level gaps between housing and top covers. This tactic has given very clean RF and LO signals to the next module. Flexible broadband easily tuneable quasi TEM- pure TEM transitions for three channels are placed with easily accessible mechanical clamps. These clamps are designed to provide proper ground to RF lines as well as mechanical strength and hold them properly at time of vibration. Metallic walls of suitable width have been provided between covers to restrict RF signal leakage from one channel to another. The micron level gaps between housing and cover plate can’t be avoided due to fabrication tolerances. Thereby whenever a cover seats over a channel to shield it from other passages there is a fair possibility of high frequency signal to be leaked to adjacent channels. A metallic wall between two helps to restrict this leakage. Moreover, EM shielding over the covers are completely shields the micron level gaps and therefore keeps channels isolated from each other.
Figure 6 illustrates a schematic diagram depicting various quadrature phase LO and Delay distribution circuits of multi-layer module-2, according to an exemplary implementation of the present disclosure.
In Figure 6, a module-2, 140 is planned as a multilayer RF module. It’s an individual module and completely separated from 120. Rear side of 140 constitutes of quadrature phase LO distribution as cluster-5, 1221, 1222, 1223, then five flexible, easily tuneable, semi-vertical quasi TEM- pure TEM to pure TEM - quasi TEM transitions 1451, 1452, 1453, 1454, 1455. It also consist of partly laid out delay lines of D4 (322) and D5 (325), laying out of all ten down-converted IF signals and supply lines for various power modules 155. 147 and 148 have pair of flexible semi-vertical transitions 1461, 1462, 1463, and 1464.
Figure 7 illustrates a schematic diagram depicting various in phase LO and main Delay distribution circuits of multi-layer module-2, according to an exemplary implementation of the present disclosure.
In Figure 7, a front side of 140 constitutes of 122, 1421 to 14210, 144, 145, 146, 147, 148, D1, D2, D3 and partially D4 & D5 delay lines. Cluster-5 and cluster-6 are identical and both carrying high level LO signals. Thereby these two clusters are planned not in the same side of the housing rather opposite side. It has lot of advantages. This cluster distribution planning restricts unwanted oscillations between active splitters as these lines carrying very high power. Leakages between channels are minimum as these two LO distribution clusters are in opposite direction. It avoids interactions of in and quadrature phase line’s power to each other thereby phases are clean. It makes the mixer placement positions compact with respect to D1 to D5 lines. It avoids RF crossovers between in phase and quadrature phase LO lines. Mechanical space utilization is maximum. Cluster-7, 8 are carrying less power than cluster-6 and well separated by conductive wall. These clusters are closed from each other by metallic cover plates with EM shielding jackets. Thereby this arrangement restricts high level LO signal interference with low level signals passing through cluster-7 and 8.
Hermetic sealed module implementation is another success. It has lots of advantages. It makes circuit easy to troubleshoot. Replacement of module is easy. Hermetic modules don’t disturb the performances of a cluster while replacing from the cluster as it works as an individual drop in module. It restricts high radiation from high power modules within it. Thereby interference become minimum. Body of hermetic module behaves as wall between input and output port. Thus, it shades input/output ports quite well and signal leakage from output port to input port becomes minimum.
Figure 8 illustrates a block diagram depicting Cluster-1 with various components, according to an exemplary implementation of the present disclosure.
In Figure 8, cluster-1, 5, 6, 7 and 8, 122 is constituted by multiple gain blocks followed by input- output matching circuits, a gain slope specific equalizer and a two way power splitter. Gain blocks are hermetic sealed modules constituted by 122105 to 122117 with simple input output re-solder-able interconnects 122100. Thereby changing of faulty hermetic modules are very easy. Each gain block is realised as a separate entity by making it hermetic module. Thereby a full chain mentioned in the block diagram is split into many small parts for effective design realization engineering. Thereby tendency of oscillations reduce as gain modules are fully isolated with other components. 122210 to 122223 constitute rest of the cluster and these components not hermetic sealed module as all are passive in nature.
Figure 9 illustrates a block diagram depicting Cluster-2 with various components, according to an exemplary implementation of the present disclosure.
In Figure 9, cluster-2, 124 has been designed in the same manner of 122 last stage 124202. 124202 is again a hermetic sealed module.
Figure 10 illustrates a block diagram depicting Cluster-3 with various components, according to an exemplary implementation of the present disclosure.
In Figure 10, cluster-3, 125 has a splitter, 12511 and a phase splitter 12521. Channels of 125 are very zigzag and carefully laid out to cater pre-calculated phases at the end of 1111, 1112 and 1113. Each clusters layout tactics are different and it depends on different factors like; how many gain blocks are consisting in that cluster and final number of output channels.
Figure 11 illustrates a block diagram depicting Cluster-4 with various components, according to an exemplary implementation of the present disclosure.
In Figure 11, cluster-4 starts with equalizer followed by detector to down convert RF signals to normal pulsed signal. Equalizer designed by 126116 to 126127 helps to improve flatness of the incoming RF signal incident on 1262. Thereby output slop is controlled over the frequency as well as the power levels. Dual OPAMP (Operation Amplifier) sages constituted by 1262 and 1265 followed by filtering sections shapes the pulse into a detectable parameter in the next digital domain. Offset resistors of the OPAMP circuitries 1263, 12631, 12655, 12656 e.c.t. are temperature sensitive thereby it keeps the levels of final output temperature insensitive over extreme temperature shifts. Successive division and amplifications in the OPAMP circuitry keep the sufficient levels gaps between two outputs compared to two successive input level shifts.
Figure 12 illustrates a graphical representation (810) depicting Phase nonlinearity against Frequency for D1 Line, according to an exemplary implementation of the present disclosure. Figure 13 illustrates a graphical representation (820) depicting Phase nonlinearity against Frequency for D2 Line, according to an exemplary implementation of the present disclosure. Figure 14 illustrates a graphical representation (830) depicting Phase nonlinearity against Frequency for D3 Line, according to an exemplary implementation of the present disclosure. Figure 15 illustrates a graphical representation (840) depicting Phase nonlinearity against Frequency for D4 Line, according to an exemplary implementation of the present disclosure. Figure 16 illustrates a graphical representation (850) depicting Phase nonlinearity against Frequency for D5 Line, according to an exemplary implementation of the present disclosure.
Figures 17a-17d illustrate graphical representations depicting Pulse amplitude response of final RF output, according to an exemplary implementation of the present disclosure.
Figure 17a illustrates graphical representations depicting Pulse amplitude response of final RF output on 5GHz and on sensitivity level, according to an exemplary implementation of the present disclosure. Figure 17b illustrates graphical representations depicting Pulse amplitude response of final RF output on 5GHz and on mid power level, according to an exemplary implementation of the present disclosure. Figure 17c illustrates graphical representations depicting Pulse amplitude response of final RF output on 5GHz and on high power level, according to an exemplary implementation of the present disclosure. Figure 17d illustrates graphical representations depicting Pulse amplitude response of final RF output on 5GHz and on saturation level, according to an exemplary implementation of the present disclosure.
Figure 18 illustrates a graphical representation (900) depicting resolved error frequency between output and input frequency respectively against input frequency, according to an exemplary implementation of the present disclosure.
In an embodiment, the present disclosure provides direct attachment of substrates onto the main housing. It has several advantages. It is compact as it doesn’t need any extra fixing spaces for substrates. It helps more dense circuit realization in same amount of space. Uniformity of immediate RF ground which improves phase nonlinearity as it has direct connection of final output frequency calculations. It also reduces the quantity of micro voids beneath substrate form during the normal attachment process. It improves the RMS (Root Mean Square) values of nonlinearity by reducing the spread of nonlinearity across 0 (zero) line. Thereby it improves the RMS value of the final output frequency. It saves time as all attachment happens of the housing at a time. Once process is established production time saves greatly. Lengthy delay lines are implemented by low loss, noise immune, flexible and easily tuneable lines with quasi TEM to pure TEM broadband horizontal RF transitions. It’s easy to tune and readjust as per need. It improves losses compared to other transmission line implementable inside the existing housing. Thereby it reduces the gain blocks of the corresponding delay paths. Reduction of gain blocks is a great advantages of system level power assessment. This delay lines can be accommodated very closely as they are totally covered by radiation proof jackets.
In an embodiment, a Full RF system is subdivided into two independent physically separable fully isolated two RF modules i.e., module-1 and module-2 and connected by transition medium.
In an embodiment, the wideband frequency receiver is very low cost flexible and easily tuneable and replaceable 45° broadband RF transitions for interconnecting two modules.
In an embodiment, each transition medium is comprised with at least two pure TEM to quasi TEM transitions connected minimum two different substrates situated in two different modules.
In an embodiment, end of each transition is coupled to the at least a broadband power splitter.
In an embodiment, both modules again internally subdivided into highly electrically isolated various clusters with easy interconnects.
In an embodiment, clusters are comprising of active splitters, gain blocks, detectors passive splitters, delay lines and passive equalizers.
In an embodiment, each rigid interconnect couples at least two different substrates situated in two different locations within or different cluster.
In an embodiment, each RF clusters is mechanically further divided into sub-clusters for placement of hermetic sealed modules.
In an embodiment, easily replaceable hermetic active and passive independent module has at least two rigid interconnects.
In an embodiment, each hermetic module couples at least two different substrates situated in two different modules in a cluster.
In an embodiment, direct substrate attachment technique to attach substrate directly onto both the side of the housing bed at a time for rest of the RF circuitries of each cluster.
In an embodiment, walls between top covers and area specific scooping inside the covers and RF anti radiant EM jacket over the covers.
In an embodiment, fully isolated in-phase and quadrature-phase high gain LO laying out technique in different RF layers of module-2.
In an embodiment, flexible and 45° broadband RF transitions medium couples at least a substrate of in phase LO layer with at least a pure TEM to quasi TEM transitions.
In an embodiment, flexible and 45° broadband RF transitions medium couples at least a substrate of quadrature phase LO layer with at least a pure TEM to quasi TEM transitions.
In an embodiment, flexible and 45° broadband RF transitions medium couples at least a substrate of in RF layer with at least a pure TEM to quasi TEM transitions.
In an embodiment, flexible and easily tuneable noise immune, low loss, very compact delay line implementation for lengthy delay lines.
In an embodiment, Quasi TEM to pure TEM broadband horizontal RF transitions for delay lines.
In an embodiment, flexible and easily tuneable and replicable semi vertical broadband RF transitions for interconnecting at least two LO clusters within a module.
In an embodiment, semi vertical broadband RF transitions comprise of at least two pure TEM to quasi TEM transitions connected minimum two different substrates situated in two different layers.
In an embodiment, flexible and easily tuneable and replicable 30° broadband RF transitions for interconnecting two different layer delay lines within a module.
In an embodiment, 45° broadband RF transitions are able to disconnect from both the ends and can easily be dismantled. RF transitions are fully isolated from each other thereby reduce inter channel interferences. RF transitions can accommodate extra time delay thereby it provides more flexibility of phase tuning of module-2. RF transitions are flexible enough to interchange the ports if required. RF transitions are hold by mechanical clamps thereby it provides good mechanical strength and it also ensures proper RF ground to flexible transitions.
In an embodiment, performance check of module-1 and module-2 can separately be possible. Thereby it gives flexibility of testing and troubleshooting.
In an embodiment, cluster implementation tactic in the housing ensures better isolation between clusters and less inter-channel interferences between high to low power level channels.
In an embodiment, module-1 and module-2 are fully shielded thereby it exhibits good spurious performances.
In an embodiment, each channels of every clusters are designed in zigzag way mechanically to produce multiple reflections of leakage RF signals, wherein multiple reflections weakens the coupled signals thereby reduces the tendency of strong signal overriding over weak signal, and weak signal reduces chance of oscillations to other path.
In an embodiment, covers of individual clusters have EM anti radiant jackets. Covers with EM anti radiant jackets shields micron level gaps between housing and metallic cover on top of a cavity. EM jackets absorb RF radiation from one component to another and improves the tendency of oscillations within the clusters. Protection of radiation reduces inter channel interferences, and thereby improves spurious performances.
In an embodiment, mechanical walls between two top covers reduces leakage signals from one channel to another channel. Mechanical walls improve tendency of oscillations of the other channels by reducing leakage.
In an embodiment, direct attachment process is compact as it doesn’t need any extra fixing spaces for substrates. It helps more dense circuit realization in same amount of space. It provides uniformity of immediate RF ground which improves phase nonlinearity as it has direct connection of final output frequency calculations. It reduces the quantity of micro voids beneath substrate form during the normal attachment process. It improves the r.m.s values of nonlinearity by reducing the spread of nonlinearity across zero line. Thereby it improves the r.m.s. value of the final output frequency. Substrates are attached at a time, thereby it reduces assembly time thus once process is established production time saves greatly.
In an embodiment, hermetic modules make circuit easy to troubleshoot and replacement. Hermetic modules don’t disturb the performances of a cluster while replacing from the cluster as it works as an individual drop in module. Hermetic modules restrict high radiation from high power modules within it. Thereby interference become minimum. Hermetic modules body of hermetic module behaves as wall between input and output port. Thus, it shades input/output ports quite well and signal leakage from output port to input port becomes minimum.
In an embodiment, lengthy delay lines are implemented by low loss, noise immune, flexible and easily tuneable lines with quasi TEM to pure TEM broadband horizontal RF transitions. It’s easy to tune and readjust as per need. It improves losses compared to other transmission line implementable inside the existing housing. It reduces the gain blocks of the corresponding delay paths. Reduction of gain blocks is a great advantages of system level power assessment. This delay lines can be accommodated very closely as they are totally covered by radiation proof jackets.
In an embodiment, RF tracks are mostly implemented by CPWG technique which reduces radiation tendency.
In an embodiment, ground guiding RF tracks are connected from one cluster to another cluster, thereby it improves continuity of RF ground thus improves power levels at higher frequencies.
In an embodiment, layout tactic of cluster 2 and 4 are made in such a way that they can’t talk each other as detector is low power sensitive detector.
In an embodiment, channels are designed zigzag so strong radiated leakage signals from cluster-2 is blocked while passing through the channels gets weakened by multiple reflections and performance of the sensor remain unaffected.
In an embodiment, laying out route of quadrature LO and in phase RF are planned in different layers, thus it improves isolations between two LO signals. Different layer LO implementation technique gives high power high frequency stabilized LO.
In an embodiment, transitions between two layers is made by semi vertical flexible lines. It avoids RF crossovers between in-phase and quadrature-phase LO. It avoids interactions of in and quadrature phase line’s power to each other thereby resolved output phases are clean. It makes the mixer placement positions compact with respect to D1 to D5 lines and also mechanical space utilization becomes maximum.
In an embodiment, hermetic modules help to avoid RF and DC crossovers for active hermetic module supply lines as supply lines are also running parallel to the RF tracks.
In an embodiment, an equalizer helps to improve flatness of the incoming RF signal incident to the detector. Thereby output slop is controlled over the frequency as well as the power levels.
In an embodiment, dual OPAMP sages followed by several matching and filtering sections shapes the pulse into a detectable parameter in the next digital domain.
In an embodiment, offset resistors of the OPAMP circuitries are temperature sensitive thereby it keeps the levels of final output temperature insensitive over extreme temperature shifts.
In an embodiment, successive division and amplifications in the OPAMP circuitry keep the sufficient levels gaps between two outputs compared to two successive input level shifts.
In an embodiment, cluster-7, 8 are carrying less power than cluster-6 and separated by conductive walls. These clusters are closed from each other by metallic cover plates with EM shielding jackets. Thereby this arrangement confines high level LO signal interference with low level signals passing through cluster-7 and 8. The dielectric substrate is a multilayer board.
In an embodiment, substrate comprises of a double sided copper clad printed circuit board.
Following are the technical advancements of the wideband frequency receiver:
It uses very low cost flexible and tuneable 45° broadband RF transitions. Thereby it helps to pass information between RF layers and as well as modules.
Direct substrate attachment technique. It ensures uniformity of substrate attachment at various places as it’s done at a time. It also reduces the quantity of micro voids beneath substrate form during the normal attachment process.
Separate RF clusters with easy interconnect. This technique mostly improves unwanted oscillations with very high gain LO chain, noise performances and isolations between channels.
Hermetic active and passive modules realization. It improves performance of the receiver by improving input output port isolations of different RF clusters.
Those skilled in this technology can make various alterations and modifications without departing from the scope and spirit of the invention. Therefore, the scope of the invention shall be defined and protected by the following claims and their equivalents.
FIGS. 1-18 are merely representational and are not drawn to scale. Certain portions thereof may be exaggerated, while others may be minimized. FIGS. 1-18 illustrate various embodiments of the invention that can be understood and appropriately carried out by those of ordinary skill in the art.
In the foregoing detailed description of embodiments of the invention, various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments of the invention require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into the detailed description of embodiments of the invention, with each claim standing on its own as a separate embodiment.
It is understood that the above description is intended to be illustrative, and not restrictive. It is intended to cover all alternatives, modifications and equivalents as may be included within the spirit and scope of the invention as defined in the appended claims. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein,” respectively.

,CLAIMS:
1. A wideband discrete frequency resolve receiver (100), the receiver comprising:
an RF system having a first module (120) and a second module (140) coupled by plurality of transition mediums (1111, 1112 and 1113) wherein the modules are isolated from each other and independent;
the first and the second module comprising plurality of electrically isolated clusters (122, 124, 125 and 126) with atleast two interconnects, where each cluster comprises plurality of active splitters, gain blocks, detector, passive splitters, delay lines and passive equalizer;
wherein the plurality of transition medium (1111, 1112 and 1113) couples at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of in phase RF layer of the first module with corresponding at least a substrate of in phase LO (Local Oscillator) layer, at least a substrate of quadrature phase LO (Local Oscillator) layer, at least a substrate of RF layer of the second module.
2. The receiver as claimed in claim 1, wherein each transition medium comprises (1111, 1112 and 1113) atleast two pure TEM to quasi TEM transitions which couples atleast two different substrates situated in two different modules.
3. The receiver as claimed in claim 1, wherein each cluster is mechanically further divided into sub-clusters for placement of plurality of hermetic sealed modules, where each hermetic module couples at least two different substrates situated in two different modules in a cluster.
4. The receiver as claimed in claim 1, wherein the interconnects couples atleast two different substrates situated in two different clusters.
5. The receiver as claimed in claim 1, wherein each transition is entirely isolated from each other to reduce inter channel interferences.
6. The receiver as claimed in claim 1, wherein each transition is held by mechanical clamps for providing mechanical strength and flexible transitions.
7. The receiver as claimed in claim 1, wherein each channel of each cluster is designed in zigzag way mechanically to produce multiple reflections of leakage RF signals, where multiple reflections weakens the coupled signals between the substrate, thereby reducing the tendency of strong signal overriding over weak signal.
8. The receiver as claimed in claim 1, wherein a cover of each clusters is an EM anti radiant jacket cover. The receiver employs direct attachment of substrates onto the main housing which assists dense circuit realization.
10. The receiver as claimed in claim 1, further comprising a mechanical wall between covers to reduce leakage signals from one channel to another channel.
11. The receiver as claimed in claim 1, further comprising a plurality of delay lines (D1-D5) with quasi TEM to pure TEM broadband horizontal RF transitions, where the delay lines are covered by radiation proof jackets.
12. The receiver as claimed in claim 1, further comprising a plurality of ground guiding RF tracks, where ground guiding RF tracks are coupled from one cluster to another cluster.
13. The receiver as claimed in claim 1, wherein laying out routes of quadrature LO and in phase RF are arranged in different layers and transitions between two layers is aided by semi vertical flexible lines.
14. The receiver as claimed in claim 1, wherein the substrate made of a double sided copper clad printed circuit board.
15. The receiver as claimed in claim 1, wherein the equalizer assists to improve flatness of the incoming RF signal incident to the detector.
16. The receiver as claimed in claim 1, wherein the plurality of clusters is separated by metallic cover plates with EM shielding jackets to confine high level LO signal interference with low level signals passing through clusters.