DESC:TECHNICAL FIELD
[0001] The present invention relates generally to radar systems. More specifically, the present invention relates generally to an apparatus for providing moving target indication.
BACKGROUND
[0002] While identifying and tracking a moving object or a target, many processes are required to be performed for obtaining better results for tracking the object/target. Moving target indication (MTI) one such process is typically used to reduce false clutter tracks to avoid overwhelming a track algorithm. The moving target indication (MTI) process is used to attenuate clutter in different types of radar such as early warning radar and surveillance radar. More specifically, the moving target indication (MTI) is a mode of operation of a radar to discriminate the target against the clutter. In contrast to stationary target indication, the moving target indication (MTI) advantages of the fact that the target moves with respect to the stationary clutter. The most common approach takes an advantage of the Doppler Effect. For a given sequence of radar pulses, the moving target can change its distance from a radar system. Therefore, the phase of the radar reflection that returns from the target will be different for successive pulses. This differs from the stationary target which can cause the reflected pulses to arrive at the same phase shift. MTI may be achieved using various methodologies. One such method using single delay line canceller. The frequency response of a single delay line canceller is shown in Figure 1.

[0003] However, the MTI operation attenuates clutter as well as the targets. The number of delay lines used in the MTI operation and target's Doppler together determine the amount of attenuation or gain for that particular target. The attenuation introduced by the MTI affects the operation of a Constant False Alarm Rate (CFAR) and must be compensated after performing Fast Fourier Transform (FFT) on the MTI output.
[0004] The role of a Constant False Alarm Rate (CFAR) process is to determine the power threshold above which any return can be considered to probably originate from a target. If this threshold is too low, then more targets will be detected at the expense of increased numbers of false alarms. Also, if the threshold is too high, then fewer targets will be detected, but the number of false alarms will also be low.

[0005] In order to reduce the negative effects of the MTI operations, compensating gain or loss introduced in radar target returns after the MTI operation without compensating clutter attenuation is needed. However, when number of pulses within a coherent pulse interval reduce by significant amount then due to a smaller number of sampling points in frequency spectrum of the MTI response as shown in Figure 1, the compensation accuracy reduces significantly.

[0006] Therefore, there exists a need of an apparatus and method for an improvement in compensation accuracy over the frequency spectrum relating to moving target indication operation.

SUMMARY
[0007] This summary is provided to introduce concepts related to an apparatus and method for providing moving target indication for a signal processor. This summary is neither intended to identify essential features of the present invention nor is it intended for use in determining or limiting the scope of the present invention.

[0008] For example, various embodiments herein may include one or more apparatuses and methods for providing moving target indication for a signal processor are provided. In one of the embodiments, an apparatus for providing moving target indication for a signal processor includes a digital pulse compression module, a moving target indicator, a multiplexer, a transformation module, a de-multiplexer, and an inverse moving target indicator. The digital pulse compression module is configured to perform compression on one or more frequency pulses and generate a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. The moving target indicator is configured to take samples of each target from the compressed data, and generate an output by performing an operation on the samples. The multiplexer is configured to multiplex the compressed data and the output, and generate an interleaved target stream output. The transformation module is configured to transform the interleaved target stream output into an interleaved transform data target stream, and generate an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. The de-multiplexer is configured to split the interleaved transformed data stream in at least two data streams. The inverse moving target indicator is configured to select the frequency bins from the splitted streams, and combine the frequency bins.

[0009] In another embodiment, a method for providing moving target indication for a signal processor includes a step of performing, by a digital pulse compression module, compression on one or more frequency pulses and generating a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. The method includes a step of taking, by a moving target indicator, samples of each target from the compressed data, and generating an output by performing an operation on the samples. The method includes a step of multiplexing, by a multiplexer, the compressed data and the output, and generating an interleaved target stream output. The method includes a step of transforming, by a transformation module, the interleaved target stream output into an interleaved transform data target stream, and generating an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. The method includes a step of splitting, by a de-multiplexer, the interleaved transformed data stream in at least two data streams. The method includes a step of selecting, by an inverse moving target indicator, the frequency bins from the splitted streams. The method includes a step of combining, by the inverse moving target indicator, the selected frequency bins.

BRIEF DESCRIPTION OF ACCOMPANYING DRAWINGS
[0010] The detailed description is described with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The same numbers are used throughout the drawings to reference like features and modules.

[0011] Figure 1 illustrates a prior art depicting a frequency response of a single delay line canceller.

[0012] Figure 2 illustrates a block diagram depicting an apparatus for providing moving target indication for a signal processor, according to an exemplary implementation of the present invention.

[0013] Figure 3 illustrates a schematic diagram depicting various modules of the apparatus of Figure 2, according to an exemplary implementation of the present invention.

[0014] Figure 4 illustrates a block diagram of a signal processor having an inverse moving target indicator of Figure 2, according to an exemplary implementation of the present invention.

[0015] Figure 5 illustrates a graphical representation depicting an output received from a moving target indicator and a digital pulse compression module, according to an exemplary implementation of the present invention.

[0016] Figure 6 illustrates a flow diagram depicting a method for interleaving operation used in an inverse moving target indicator, according to an exemplary implementation of the present invention.

[0017] Figure 7 illustrates a finite state machine diagram depicting a reading method for an interleaving operation used in an inverse moving target indicator, according to an exemplary implementation of the present invention.

[0018] Figure 8 illustrates a schematic diagram depicting captured data for read and write operations used in an inverse moving target indicator, according to an exemplary implementation of the present invention.

[0019] Figure 9 illustrates a graphical representation depicting target detection comparison of the performance of the apparatus of Figure 2 with a conventional approach for target Doppler falling in a first filter, according to an exemplary implementation of the present invention.

[0020] Figure 10 illustrates a flowchart depicting a method for providing moving target indication for a signal processor, according to an exemplary implementation of the present invention.

[0021] It should be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative systems embodying the principles of the present invention. Similarly, it will be appreciated that any flowcharts, flow diagrams, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

DETAILED DESCRIPTION
[0022] In the following description, for the purpose of explanation, specific details are set forth in order to provide an understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, some of which are described below, may be incorporated into a number of systems.

[0023] The various embodiments of the present invention provide an authentication system and method thereof. Furthermore, connections between components and/or modules within the figures are not intended to be limited to direct connections. Rather, these components and modules may be modified, re-formatted or otherwise changed by intermediary components and modules.

[0024] References in the present invention to “one embodiment” or “an embodiment” mean that a particular feature, structure, characteristic, or function described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.

[0025] In one of the embodiments, an apparatus for providing moving target indication for a signal processor includes a digital pulse compression module, a moving target indicator, a multiplexer, a transformation module, a de-multiplexer, and an inverse moving target indicator. The digital pulse compression module is configured to perform compression on one or more frequency pulses and generate a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. The moving target indicator is configured to take samples of each target from the compressed data, and generate an output by performing an operation on the samples. The multiplexer is configured to multiplex the compressed data and the output, and generate an interleaved target stream output. The transformation module is configured to transform the interleaved target stream output into an interleaved transform data target stream, and generate an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. The de-multiplexer is configured to split the interleaved transformed data stream in at least two data streams. The inverse moving target indicator is configured to select the frequency bins from the splitted streams, and combine the frequency bins.

[0026] In another implementation, the apparatus includes a storage unit. The storage unit is configured to store the pulse compressed output.

[0027] In another implementation, the pulse compressed output is stored in the form of a matrix, wherein each row of the matrix includes range bins for each pulse, and each column of the matrix includes range bins for a particular target.

[0028] In another implementation, the moving target indicator is configured to perform a delay canceller operation and generate the output.

[0029] In another implementation, the output includes target echoes.

[0030] In another implementation, the transformation module is configured to transform time domain interleaved target stream output into a frequency domain interleaved transform stream.

[0031] In another implementation, the inverse moving target indicator is configured to select and combine the frequency bins from the splitted streams based on the clutter and each target identification.

[0032] In another implementation, the transformation module is configured transform the interleaved target stream output into an interleaved transform data target stream by using a Fast Fourier transformation technique.

[0033] In another implementation, the apparatus further includes an Analog to Digital Convertor and a digital down-convertor. The Analog to Digital Convertor is configured to receive an analog Intermediate Frequency (IF) from a radar receiver, and convert the IF into digital IF data. The Analog to Digital Convertor is further configured to generate samples for the IF data. The digital down-convertor is configured to convert the IF data into a baseband data. The digital pulse compression module is configured to compress the baseband data having the one or more frequency pulses and generate the pulse compressed output.

[0034] In another implementation, the de-multiplexer is configured to split the interleaved transformed data stream using an anti-interleaving operation.

[0035] In another embodiment, a method for providing moving target indication for a signal processor includes a step of performing, by a digital pulse compression module, compression on one or more frequency pulses and generating a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. The method includes a step of taking, by a moving target indicator, samples of each target from the compressed data, and generating an output by performing an operation on the samples. The method includes a step of multiplexing, by a multiplexer, the compressed data and the output, and generating an interleaved target stream output. The method includes a step of transforming, by a transformation module, the interleaved target stream output into an interleaved transform data target stream, and generating an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. The method includes a step of splitting, by a de-multiplexer, the interleaved transformed data stream in at least two data streams. The method includes a step of selecting, by an inverse moving target indicator, the frequency bins from the splitted streams. The method includes a step of combining, by the inverse moving target indicator, the selected frequency bins.

[0036] In another embodiment, the apparatus is configured for providing compensating gain/loss in a moving target indicator (MTI) operation. The apparatus can make use of the Doppler characteristics of returns. In one embodiment, the apparatus can replace the functionality of the multiplexer/de-multiplexer with one or more transformation modules based on availability of resources.

[0037] In another embodiment, the apparatus is configured for providing compensation accuracy of better than ±0.5dB over a frequency spectrum even when a number of pulses in a coherent pulse interval is less than or equal to 8.

[0038] In another embodiment, the apparatus is configured to provide target detection improvement of better than 12dB for target Doppler very near to clutter doppler. This is an exemplary scenario when a number of pulses in the coherent pulse interval is equal to 8.

[0039] In another embodiment, the apparatus is configured for providing very useful functionality when a number of pulses in a coherent pulse interval is less. However, a person skilled in the art will realize that the apparatus and method may be extended to any number of coherent pulses.

[0040] Figure 2 illustrates a block diagram depicting an apparatus (200) for providing moving target indication for a signal processor, according to an exemplary implementation of the present invention.

[0041] The apparatus for providing moving target indication for a signal processor (hereinafter referred to as “apparatus”) (200) includes a digital compression pulse module (202), a moving target indicator (204), a multiplexer (206), a transformation module (208), a de-multiplexer (210), and an inverse moving target indicator (212).

[0042] The digital compression pulse module (202) is configured to perform compression on one or more frequency pulses, and generate a pulse compressed data. In an embodiment, the pulse compressed data includes a plurality of target bins and range bins of each pulse.

[0043] In one embodiment, the apparatus (200) includes a storage unit (214). The storage unit (214) is configured to store the pulse compressed output generated by the digital compression pulse module (202). The pulse compressed output is in the form of a matrix, where each row of the matrix includes range bins for each pulse, and each column of the matrix includes range bins of a particular target.

[0044] The moving target indicator (MTI) (204) is configured to cooperate with the digital compression module (202) to receive the generated pulse compressed data. The MTI (204) is configured to take samples of each target from the pulse compressed data, and is further configured to generate an output by performing an operation on the samples. In an embodiment, the MTI (204) is configured to perform a delay canceller operation and generate the output. The output includes target echoes.

[0045] The multiplexer (206) is configured to cooperate with the digital pulse compression module (202) and the MTI (204) to receive the pulse compressed data and the output, respectively. The multiplexer (206) is further configured to multiplex the pulse compressed data and the output, and generate an interleaved target stream output.

[0046] The transformation module (208) is configured to cooperate with the multiplexer (206) to receive the interleaved target stream output. The transformation module (208) is further configured to transform the interleaved target stream output into an interleaved transform data target stream, and generate an interleaved transform stream in a frequency domain. In an embodiment, each target is having two frequency bin streams. In one embodiment, the transformation module (208) is configured to transform a time domain interleaved target data stream output into a frequency domain interleaved transform stream. In another embodiment, the transformation module (208) is configured to transform the interleaved target stream output into an interleaved transform data target stream by using a Fast Fourier Transformation (FFT) technique.

[0047] The de-multiplexer (210) is configured to cooperate with the transformation module (208) to receive the interleaved transform stream. The de-multiplexer (210) is further configured to split the interleaved transform stream in at least two data streams. In an embodiment, the de-multiplexer (210) is configured to split the interleaved transformed data stream using an anti-interleaving operation.

[0048] The inverse moving target indicator (MTI) (212) is configured to cooperate with the de-multiplexer (210) to receive the splitted streams. The inverse MTI (212) is further configured to select the frequency bins from the splitted streams, and combine the frequency bins with each other. In an embodiment, the inverse MTI (212) is configured to select and combine the frequency bins from the splitted streams based on the clutter and each target identification.

[0049] In an embodiment, the apparatus (202) includes an Analog to Digital Convertor (ADC) (216) and a digital down convertor (218). The ADC (216) is configured to receive an analog Intermediate Frequency (IF) from a radar receiver, and convert the IF into digital IF data. The ADC (216) is further configured to generate samples for the IF data. The digital down convertor (218) is configured to convert the IF data into a baseband data. In another embodiment, the digital pulse compression module (202) is configured to cooperate with the digital down convertor (218) to receive the baseband data. The digital pulse compression module (202) is further configured to compress the baseband data having the one or more frequency pulses and generate the pulse compressed data.

[0050] Figure 3 illustrates a schematic diagram (300) depicting various modules of the apparatus of Figure 2, according to an exemplary implementation of the present invention.

[0051] In an embodiment, to overcome limitation in the moving target indicator (MTI) gain/loss compensation accuracy over the frequency spectrum, the apparatus (200) is configured to calculate Fast Fourier Transform (FFT) without MTI operation and FFT with the MTI operation, which allows to compute Inverse MTI by comparing the two FFT results. The apparatus (200) is configured to initiate computation after performing compression on one or more pulses. In an embodiment, the apparatus (200) is configured to initiate computation after performing Digital Pulse Compression (DPC) operation. The pulse compressed output, generated by the digital pulse compression module (202), is stored in the form of a matrix where each row represents return echoes (called range bins) for each pulse and a column represents range bins of a particular target. Transpose of the matrix is then fed to the MTI (204) and the multiplexer (206) in parallel, which serializes the output generated by the MTI (204) and the pulse compressed output as per the target. In an embodiment, the apparatus (200) first delivers the generated by the MTI (204) output (including all target echoes) followed by the pulse compressed output (including all target echoes without MTI operation) every range bin. The multiplexer (206) then multiplex the output of the MTI (204) and the pulse compressed output, and generate an interleaved target stream output. The interleaved data stream output is then fed to the transformation module (208). The transformation module (208) is configured to transform interleaved target data stream output into an interleaved transform data target stream, and generate an interleaved transform stream in frequency domain. The interleaved transform stream is then fed in the de-multiplexer (210). The de-multiplexer (210) is used to split the interleaved transform stream into two separate streams. Finally, the inverse MTI (212) selects and combines the frequency bins from both streams.

[0052] In an embodiment, the apparatus (200) can be implemented in any programmable signal processor for radar. The signal processor for one such radar is a field programmable gate array (FPGA) based printed circuit board (as shown in FIG. 4). The radar operates in a staggered pulse repetition frequency (PRF) mode, where the radar fires staggered pulses in different type of bursts.

[0053] Figure 4 illustrates a block diagram of a signal processor (400) having an inverse moving target indicator of Figure 2, according to an exemplary implementation of the present invention.

[0054] The signal processor (400) includes an ADC (216). The ADC (216) is configured to receive an Intermediate Frequency (IF) from a radar receiver, and convert the IF into digital IF data. The ADC (216) is further configured to generate samples for the IF data. The sampled IF data is digitally down, and converted by a digital down converter (DDC) (218) to a baseband data. The digital down convertor (DDC) (218) includes a numerically controlled oscillator (NCO) (402), a mixer (404), a finite impulse response (FIR) filter (406), and a decimation (408). The NCO (402) is configured to generate a synchronous waveform. The mixer (404) is configured to mix signals, and generate a new signal having new frequency. The FIR filter (406) is configured to filter impulse response of finite period. The decimation (408) is configured to perform on a sequence of IF samples and provide an approximation of the sequence that is obtained by sampling the IF data at a lower rate.

[0055] A digital pulse compression module (202) is configured to compress the baseband data. The compressed baseband data is be stored on an external SRAM (424) and read back in a transposed form. In an embodiment, the storage unit (214) of Figure 2 includes SRAM (424). The digital pulse compression module (202) includes an external SRAM controller for transpose (410) and a matched filter (412). The external SRAM controller (410) is configured to control the SRAM (424), and receive the baseband data for further use. The matched filter (412) is configured to filter the data having similar functionality.

[0056] In the transposed form, the baseband data consists of a series of target range bins. In an embodiment, each range bin contains returns of the same target separated in time by 1/PRF (Pulse Repetition Frequency) seconds. The MTI (204) take samples of each target and perform a single delay canceller operation. A person ordinarily skilled in the art may realize that other delay cancellers can also be used. The output of MTI (204) contains samples of each target after zero doppler cancellation. In another embodiment, the inverse MTI (212) having n pulses is configured to generate an output by selecting and combining frequency bins, which can be n-1 for the single delay canceller. This can be seen in the left side of a Figure 5. Figure 5 illustrates a graphical representation (500) depicting an output received from a moving target indicator and a digital pulse compression module, according to an exemplary implementation of the present invention.

[0057] In an exemplary embodiment, assuming there are nine pulses. Consider a signal processor (400) operates up to 600 MHz, this may thus amount to much higher than most surveillance radar's bandwidth. This allows the signal processor (400) to share the resource in a time multiplexed manner. Hence, in the inverse MTI (212), the multiplexer (206) is used to multiplex target range bins (before and after MTI). The output of the multiplexer (206) consists of an interleaved target stream output prior and after the MTI operation. There are time domain samples associated with each interleaved target. The interleaved target stream output data then be input at the transformation module (208). This is done by performing a windowing operation on the time domain sampled data associated with each interleaved target. In one embodiment, the fast Fourier transform (FFT) performed is an n-points fast Fourier transform.

[0058] In an embodiment, the transformation module (208) is configured to produce an interleaved transform stream in frequency domain, comprising of frequency bins associated with every target. The de-multiplexer (210) is configured to perform an anti-interleaving operation on the interleaved transform stream, and split the interleaved transform stream into two separate streams, i.e. frequency bin streams. One of the frequency domain streams is MTI operation inclusive, while the other frequency domain target stream is MTI operation exclusive.

[0059] In another embodiment, the inverse MTI (212) is configured to receive the splitted streams, and identify the frequency bins (FFT points) which contain clutter. The relation between Nc (a number of the clutter bins), NFFT (number of FFT points) and fcmax (maximum clutter frequency) may be represented by an equation below.
Ceil [Nc] =2 * NFFT * (fcmax)/PRF

[0060] Generally, the frequency range covered by the clutter varies with nature of the clutter. Clutter returns can come from ground, sea, weather, buildings, birds or insects. In one exemplary embodiment, for long range air surveillance Radar operating in L band, it may be observed that sea clutter fcmax is close to 20 Hz and PRF is approximately 500 Hz. This results in the number of clutter bins Nc being of value 1. One frequency bin from each side is marked as a clutter bin. This is done to anticipate the clutter with negative Doppler. In case of an 8 FFT points, clutter bins would be those numbered 1 and 8. The inverse MTI (212) takes the two FFT streams from the de-multiplexer (210) and select the clutter bins from the stream with MTI operation (1st stream). The remaining frequency bins can be taken from the second stream which has no MTI operation. After selecting and combining operation, at the inverse MTI (212), a single FFT stream is formed. A Constant False Alarm Rate (CFAR) and plot generator (416) is configured to receive the single FFT stream. In one embodiment, the CFAR operation is two dimensional and done for each frequency bin across the range bins. All CFAR outputs may be combined for plot generation. This can be sent to a radar data processing unit (RDP unit) (422). This can be done over various communication channels. In one embodiment, this may be done over Ethernet, such as RJ45. In such scenarios, an ethernet controller (420) is used. A control unit (418) is configured to perform the controller operation for the internal communication of the signal processor (400).

[0061] Figure 6 illustrates a flow diagram (600) depicting a method for interleaving operation used in an inverse moving target indicator (212), according to an exemplary implementation of the present invention.

[0062] The flow diagram (600) starts at a step (602). At a step (604), waiting on a read interrupt. In an embodiment, the apparatus (200) is configured to wait on a read interrupt. Upon receiving the read interrupt, the apparatus (200) is configured to read moving target indicator (MTI) data. At a step (608), checking whether the number of data read is equal to the Non-Uniform Fast Fourier Transform (NFFT). In an embodiment, the apparatus (200) is configured to check whether the number of data read is equal to the Non-Uniform Fast Fourier Transform (NFFT). If the number of data read is not equal to the NFFT then the MTI data is re-read until the number of data read is equal to the NFFT. However, if the number of data read is equal to the NFFT, waiting on the read interrupt, as shown at a step (610). In an embodiment, the apparatus (200) is configured to wait on a read interrupt. At a step (612), the apparatus (200) reads the digital pulse compression (DPC) data. At a step (614), checking whether the number of data read is equal to the NFFT. If the number of data read is not equal to the NFFT, then the DPC data is re-read. However, if the number of data read is equal to the NFFT, then the method (600) involves waiting for the read interrupt, as shown at a step (604).

[0063] In an embodiment, the step of reading the data for interleaving operation can be done using dual port RAM (DPRAM) or using first in first out (FIFO) memory. For interleaving, the multiplexer (206) can be implemented using DPRAM. The memory requirement varies with a number of FFT points and data width in bits, such as:
TotalMemory = 8 * (NFFT) * (datawidth) bits.

[0064] In an exemplary embodiment, there may be total four data streams, i.e. MTI In-phase, MTI Quadrature phase, DPC In-phase and DPC Quadrature phase data. Therefore, four random access memory (RAM) are required to store the data. The size of each RAM is twice the NFFT to enable read and write at the same time.
During the writing process all the four streams may be written in parallel. While reading, however, there may be present an address offset between read address and write address, which allows read and write operations at the same time. In order to interleave two streams, the read process must be done at double the rate of write process.

[0065] Figure 7 illustrates a finite state machine diagram (700) depicting a reading method for an interleaving operation used in an inverse moving target indicator, according to an exemplary implementation of the present invention.

[0066] Figure 7 illustrates four states for performing interleaving operation used in an inverse moving target indicator (212). The power on reset brings the current state to RD_INTR_MTI (702). In this state, a finite state machine (FSM) waits till read interrupt becomes low and then jump to the next state. In RD_DATA_MTI state (704), a fixed number of MTI data words reads till next interrupt high comes. The equivalent read operation happens for the DPC data in next two states, i.e. RD_DATA_DPC state (706) and RD_INTR_DPC state (708). After RD_DATA_DPC state (706), the FSM comes back to its first state. This one cycle of the FSM does the interleaving for 1 target of MTI data stream and DPC data stream. In RD_INTR_DPC state (708) state, the FSM waits till read interrupt becomes low and then back to the RD_DATA_DPC state (706).

[0067] Figure 8 illustrates a schematic diagram (800) depicting captured data for read and write operations used in an inverse moving target indicator, according to an exemplary implementation of the present invention.

[0068] In an exemplary embodiment, Figure 8 illustrates read and write operations for 8 pulses captured in a debug tool (for example, an Altera™ debug tool) signal tap II. The first signal is WR_INTERRUPT (802) that controls the write operation. RD_INTERRUPT (806) signal has a rate twice of WR_INTERRUPT (802) and it controls the read operation. During a low period of WR_INTERRUPT (802), 8 data words are written on the RAM and write address increments from 0 to 7. In the same time, RD_INTERRUPT (806) completes its two events. During its first event, 8 MTI data words written in previous WR_INTERRUPT (802), are read and its address increments from 8 to 15. During its second event, 8 DPC data words written in previous WR_INTERRUPT (802) event, are read and its address increments from 8 to 15. In the 2nd event of WR_INTERRUPT (802) low period, new 8 data words are written and write address increments from 8 to 15. This time read operation happens for address 0 to 7 for both MTI and DPC data RAM. The same RAM is used without read write conflict. Various address lines (804, 808, 810) are shown, and indicated in the Figure 8.

[0069] In an embodiment, the anti-interleaving operation separates the two steams and bring down the data rate to the half. The data flow and the finite state machine (700) are very similar to the interleaving operation except it does de-multiplexing for the range bin streams and reduces the data rate to half. In an embodiment, the apparatus (200) can be implemented in any programmable signal processor for radar. The signal processor (400) (as shown in Figure 4) for one such radar is a field programmable gate array (FPGA) based printed circuit board. Radar operates in a staggered pulse repetition frequency (PRF) mode, where the radar fires staggered pulses in different type of bursts.

[0070] In another embodiment, the apparatus (200) and a method in its various embodiments herein has ease of implementation in various programmable radar signal processors. The lower complexity provides for lesser development time for code development, as it relies on the common fast Fourier transform (FFT) (i.e. the transformation module (208)) to compute the inverse moving target indicator (IMTI) (212) through interleaving. The response of the IMTI (212) is very close to inverse of response of MTI curve irrespective of a number of FFT points. The error in compensation is reduced to acceptable level with reduced complexity.

[0071] In an exemplary embodiment, the apparatus (200) was tested on the MATLAB simulated data input over the dynamic range of signal processors. The signal processor does baseband conversion to input intermediate frequency signal and target extraction using moving target indicator (MTI) processing. The Radar parameters for the simulated case are as follows:
• Input Intermediate Frequency= 30 MHz;
• Sampling Frequency= 40 MHz;
• Input Signal Doppler= 62.5 Hz;
• Transmitted Pulse Width= 4us;
• Signal Band Width=5 MHz;
• Pulse Repetition Frequency=1000 Hz;
• Number of Pulses=9;
• MTI canceller=single delay line canceller; and
• Fast Fourier Transform points=8.
The input Signal to Noise Ratio (SNR) varies from 16 dB to -14 dB and given to the signal processor input which generates target detection report.

[0072] Figure 9 illustrates a graphical representation (900) depicting target detection comparison of the performance of the apparatus of Figure 2 with a conventional approach for target Doppler falling in a first filter, according to an exemplary implementation of the present invention.

[0073] Specifically, Figure 9 shows the target detection comparison of the apparatus (200) with a conventional approach for target Doppler falling in first filter as per an embodiment herein. In this exemplary implementation, detection improvement of 12 dB in when the target doppler falls in first filter is achieved. A person skilled in the art can appreciate that the unique apparatus (200) and the method of implementing Inverse Moving Target Indicator (IMTI) (212) for a programmable radar signal processor overcomes various shortcomings of the conventional approaches. The conventional approach of the computing IMTI (212) in frequency domain or statistical method with clutter map is complicated and might involve excessive computations. Conventionally, the problem of determining IMTI coefficients is difficult as it involves transformation and the computation of matrix multiplications in the processor. The various embodiments described herein to compute the IMTI using a different approach, in which a high degree of accuracy in compensation can be achieved with least computational complexity.

[0074] Figure 10 illustrates a flowchart (1000) depicting a method for providing moving target indication for a signal processor, according to an exemplary implementation of the present invention.

[0075] The flowchart (1000) starts at a step (1002), performing, by a digital pulse compression module (202), compression on one or more frequency pulses and generating a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. In an embodiment, a digital pulse compression module (202) is configured to perform compression on one or more frequency pulses and generating a pulse compressed output, wherein the pulse compressed output includes a plurality of target bins and range bins of each pulse. At a step (1004), taking, by a moving target indicator (204), samples of each target from the compressed data, and generating an output by performing an operation on the samples. In an embodiment, a moving target indicator (204) is configured to take samples of each target from the compressed data, and generate an output by performing an operation on the samples. At a step (1006), multiplexing, by a multiplexer (206), the compressed data and the output, and generating an interleaved target stream output. In an embodiment, a multiplexer (206) is configured to multiplex the compressed data and the output, and generating an interleaved target stream output. At a step (1008), transforming, by a transformation module (208), the interleaved target stream output into an interleaved transform data target stream, and generating an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. In an embodiment, a transformation module (208) is configured to transform the interleaved target stream output into an interleaved transform data target stream, and generate an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams. At a step (1010), splitting, by a de-multiplexer (210), the interleaved transformed data stream in at least two data streams. In an embodiment, a de-multiplexer (210) is configured to split the interleaved transformed data stream in at least two data streams. At a step (1012), selecting, by an inverse moving target indicator (212), the frequency bins from the splitted streams. In an embodiment, an inverse moving target indicator (212) is configured to select the frequency bins from the splitted streams. At a step (1014), combining, by the inverse moving target indicator (212), the selected frequency bins. In an embodiment, the inverse moving target indicator (212) is configured to combine the selected frequency bins.

[0001] It should be noted that the description merely illustrates the principles of the present invention. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described herein, embody the principles of the present invention. Furthermore, all examples recited herein are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the invention and the concepts contributed by the inventor to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions. Moreover, all statements herein reciting principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.

,CLAIMS:
1. An apparatus (200) for providing moving target indication for a signal processor (400), said apparatus (200) comprising:
a digital pulse compression module (202) configured to perform compression on one or more frequency pulses and generate a pulse compressed output, wherein said pulse compressed output includes a plurality of target bins and range bins of each pulse;
a moving target indicator (204) configured to cooperate with said digital pulse compression module (202), said moving target indicator (204) configured to take samples of each target from said compressed data, and generate an output by performing an operation on said samples;
a multiplexer (206) configured to cooperate with said digital pulse compression module (202) and said moving target indicator (204), said multiplexer (206) configured to multiplex said compressed data and said output, and generate an interleaved target stream output;
a transformation module (208) configured to cooperate with said multiplexer (206), said transformation module (208) configured to transform said interleaved target stream output into an interleaved transform data target stream, and generate an interleaved transform stream in a frequency domain, wherein each target is having two frequency bin streams;
a de-multiplexer (210) configured to cooperate with said transformation module (208), said de-multiplexer (210) configured to split said interleaved transform stream in at least two data streams; and
an inverse moving target indicator (212) configured to cooperate with said de-multiplexer (210), said inverse moving target indicator (212) configured to select said frequency bins from said splitted streams, and combine said frequency bins.

2. The apparatus (200) as claimed in claim 1, wherein said apparatus (200) includes a storage unit (214) configured to store said pulse compressed output.
3. The apparatus (200) as claimed in claim 2, wherein said pulse compressed output is stored in the form of a matrix, wherein each row of said matrix includes range bins for each pulse and each column of said matrix includes range bins of a particular target.

4. The apparatus (200) as claimed in claim 1, wherein said moving target indicator (204) is configured to perform a delay canceller operation and generate said output.

5. The apparatus (200) as claimed in claim 4, wherein said output includes target echoes.

6. The apparatus (200) as claimed in claim 1, wherein said transformation module (208) is configured to transform time domain interleaved target stream output into a frequency domain interleaved transform stream.

7. The apparatus (200) as claimed in claim 1, wherein said inverse moving target indicator (212) is configured to select and combine said frequency bins from said splitted streams based on the clutter and each target identification.

8. The apparatus (200) as claimed in claim 1, wherein said transformation module (208) is configured transform said interleaved target stream output into an interleaved transform data target stream by using a Fast Fourier transformation technique.

9. The apparatus (200) as claimed in claim 1, wherein said apparatus (200) comprising:
an Analog to Digital Convertor (216) is configured to receive an analog Intermediate Frequency (IF) from a radar receiver, and convert said IF into digital IF data, said Analog to Digital Convertor (216) is configured to generate samples for said IF data;
a digital down convertor (218) is configured to cooperate with said Analog to Digital Convertor (216), said digital down convertor (218) is configured to convert said IF data into a baseband data; and
said digital pulse compression module (202) configured to cooperate with said digital down convertor (218), said digital pulse compression module (202) is configured to compress said baseband data having said one or more frequency pulses and generate said pulse compressed output.

10. The apparatus (200) as claimed in claim 1, wherein said de-multiplexer (210) is configured to split said interleaved transformed data stream using an anti-interleaving operation.

11. A method for providing moving target indication for a signal processor (400), said method comprising:
performing, by a digital pulse compression module (202), compression on one or more frequency pulses and generating a pulse compressed output, wherein said pulse compressed output includes a plurality of target bins and range bins of each pulse;
taking, by a moving target indicator (204), samples of each target from said compressed data, and generating an output by performing an operation on said samples;
multiplexing, by a multiplexer (206), said compressed data and said output, and generating an interleaved target stream output;
transforming, by a transformation module (208), said interleaved target stream output into an interleaved transform data target stream, and generating an interleaved transform stream in frequency domain, wherein each target is having two frequency bin streams;
splitting, by a de-multiplexer (210), said interleaved transformed data stream in at least two data streams; and
selecting, by an inverse moving target indicator (212), said frequency bins from said splitted streams; and
combining, by said inverse moving target indicator (212), said selected frequency bins.