Sign In to Follow Application
View All Documents & Correspondence

Algorithm For Fault Indication In Ssfdr

Abstract: After meeting the ON condition of SSFDR,algorithm checks for fault in all modules(e.g processor module,Audio module etc.) of SSFDR with the help of Built in test which will show fault by glowing doll"s eye(LED),if any.there are two types of built in test.one will be initiated after the power on condition and another will be of continuous in nature which will perform test continuously during the working of SSFDR.

Get Free WhatsApp Updates!
Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
22 December 2014
Publication Number
36/2016
Publication Type
INA
Invention Field
ELECTRONICS
Status
Email
Parent Application

Applicants

HINDUSTAN AERONAUTICS LIMITED
Hindustan Aeronautics Limited, Avionics Division, P.O. Korwa, Amethi

Inventors

1. AMARDEEP KUMAR
Hindustan Aeronautics Limited, Avionics Division, P.O. Korwa, Amethi, Pin-227412, UP, India

Specification

FIELD OF THE INVENTION
The purpose of this invention is to present the algorithm for the
implementation of the Fault Indication functionality in SSFDR for aircraft
indication which confirm the proper functioning of all the modules of SSFDR
after meeting the on condition and there after continuous check of criticality of
system and detect the fault in the system if any.
BACKGROUND OF THE INVENTION
Flight data recorder records aircraft data of various parameters and audio data
through various channels. Aircraft data being so critical make the acquisition of
data important in any circumstances, there should not be any condition of
failure in the recording of aircraft data so it is necessary to have a provision of
check for fault in the system from start to end .After meeting the on condition,
we check the proper functioning of all modules with the help of BIT test. then
we display the fault with the help of LED named doll's eye positioned on the
system as fault indicator or the same on test equipment where one can also
check it by manually generating the fault.
SUMMARY OF PRESENT INVENTION
In accordance with one aspect of present invention is to provide a technique
according to which Fault is displayed as an indicator with the help of LED.
In accordance with one aspect of present invention is to provide a testing
method where we have the provision of manually generating the test signal .
In accordance with one aspect of present invention is to provide a checking
method whether the implemented algorithm is working as per specification or
not and if it is ,then check for fault in modules.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1: It shows the SSFDR GO/NO GO lamp functionality algorithm.
Figure 2: It shows the block diagram of SSFDR.
Figure 3: It shows the block diagram of fault indicator.
DETAILED DESCRIPTION
In SSFDR, After meeting the ON condition, we check the proper functioning of
all modules with the help of BIT test. then we display the fault with the help of
LED named doll's eye positioned on the system as fault indicator .There will be
an option for generating fault manually within the modules for testing purpose
only. the representation of fault with the help of LED will ensure the fault
being detected as per the specification and due to this the purpose of having
built in test will be justified.
The procedure to be followed for the proper detection of fault in SSFDR will
be as per the algorithm. which starts with the meeting of on condition of
SSFDR. after the power on condition being met, PBIT will be initiated which will
check for the BIT test condition. in case of any fault, the system will show the
fault with the help of LED as indicator. Contrary to this ,the system will be
checked for another BIT test which is continuous BIT test (which will be
performed continuously during the working of the SSFDR) and for whether
recording condition has been initiated or not. the CBIT will also be checked for
two conditions. in case of failure ,the system will again show the fault with the
help of LED as indicator but on being passed, the system will wait for another
test being performed by the system i.e. recording condition initiation test. if
the system is unable to meet the recording condition, then this fault signal will
be digitally combined with the fault signal of CBIT according to OR gate logic
and the SSFDR GO/NO GO LAMP will glow. this logic will implement the
condition that either of the two fault signal will be high ,the LAMP will glow. in
any of the above check, in case of condition being true, the program will have
the provision of recheck, if needed. otherwise the fault signal will be
generated. actually the system will go in status quo position after meeting the
true condition.

WE CLAIMS:-
Accordingly, the description of the present invention is to be considered as illustrative only and is for the purpose of teaching those skilled in the art of the best mode of carrying out the invention. The details may be varied substantially without departing from the spirit of the invention, and exclusive use of all modifications which are within the scope of the appended claims is reserved. We Claim

1. This procedure has been developed to detect the fault in the modules of SSFDR.
2. This feature is very easily accessible.
3. This feature provides a better picture about the Detection of Fault after the power on condition and During The Working Of SSFDR.
4. This feature can be used for existing and future data recording system or in any other areas where such operation are required. ,TagSPECI:As per Annexure-II

Documents

Application Documents

# Name Date
1 specification.pdf 2014-12-23
2 FORM5.pdf 2014-12-23
3 FORM3MP.pdf 2014-12-23
4 drawings.pdf 2014-12-23
5 3842-DEL-2014-Form 18-251018.pdf 2018-10-30
6 3842-DEL-2014-FER.pdf 2021-10-17

Search Strategy

1 3842searchE_01-05-2020.pdf