Field of invention:
The present invention relates to a plasma display panel (hereinafter referred to as PDP) and its manufacturing method and more particularly related to a PDF provided with an auxiliary electrode formed below the address electrode separated by reflective dielectric layer that results in the reduction of address voltage with improved performance and life of the PDP.
Background of the invention:
The efforts in PDP development are continuing every day with the demand of its performance improvement. PDP is composed of a matrix of discharge cells that are formed by partitions made by barrier ribs between a pair of glass substrates. Three color (Red, Blue, and Green) phosphors are provided on the surface of the respective barrier ribs, and the cell volume is filled with a gas mixture of Neon and Xenon. During PDP operation, the gas discharge takes place between electrodes in the cells that result the generation of VUV photons with a wavelength of 147 nm and 172 nm. The phosphors absorb these VUV photons and emit visible light to display a picture including characters and graphics. Such PDPs are self-emitting type flat panel displays and have excellent characteristics such as large size, wide horizontal and vertical view-angle, slim look, lightweight etc that differentiate it from other display devices.
The conventional AC driven PDP possesses three-electrode structure on two glass plates forming front plate and back plate. The front plate has formed therein a plurality of pairs of display electrodes known as sustain and scan electrodes. These electrodes are formed of ITO (Indium-Tin-Oxide) material. The ITO electrode sheet resistance is decreased with the introduction of metal bus lines of electrically conducting material over the ITO electrodes. The back plate has formed therein a plurality of address electrodes that are perpendicular to the display electrodes. The straight channel barrier ribs are formed on the back plate to create the discharge volume and also to separate the different sub-pixels. The co-planar discharge is created with the display electrodes by square pulse voltage. The VUV radiation produced in the discharge phenomenon excites the phosphor to emit visible light. An example of conventional AC-PDP is described in US Patent no. 5661500.
To select a sub-pixel, it is required to give data input in the form of voltage to the address electrode to create a weak discharge between address electrode and scan electrode. The address voltage requirement of an AC PDP depends on the Ne-Xe gas mixture, the barrier rib height, the dielectric constant of the barrier rib and reflective dielectric layer and the thickness of phosphor and reflective dielectric layer. Generally, the required address voltage in conventional structure is above ~ 60 volts that demands the use of high cost and complex electronic circuitry to convert logic level voltage to the desired high voltage level. Hence it is always required to reduce the address voltage so that this complex electronic circuitry such as data carriers (Chip-On-Foil (COF) or Tape-Carrier-Package
(TCP)) can be removed or replaced with data carriers with lower power rating ICs (Integrated Circuits). The address voltage reduction is also important for higher Xenon percentage PDP operation to improve the luminous efficacy.
Object of the invention:
The primary objective of the invention is to provide an electrically conducting layer forming auxiliary electrode for reducing the address voltage and resulting in use of data carriers using lower power rating ICs.
Another objective of the invention is to enhance of the life of the data carriers carrying lower address voltage.
Yet another objective of the invention is to remove the high voltage data carriers.
Yet another objective of the invention is to improve the luminous efficacy with high Xenon percentage in PDP.
Statement of the invention:
Accordingly the invention provides a Plasma Display Panel comprising a pair of front and back glass substrates and gas enclosed between the substrates having plurality of pair of sustain (X) - scan (Y) display electrodes on the front glass substrate in second direction, a electrically conductive layer forming auxiliary electrode (solid or patterned) is provided on the back glass substrate and said electrically conductive layer is covered with a dielectric layer as said dielectric layer can be light reflective with plurality of address electrode orthogonal to the display electrodes is provided over the said dielectric layer in first direction and said address electrodes are covered with a dielectric layer as straight channel barrier ribs are formed on the said dielectric layer, the R , G , B phosphor layers are formed in the barrier ribs channel spaces.
Brief description of Drawings:
Figure 1 illustrates the cross-sectional view of conventional AC PDP with straight barrier ribs.
Figure 2 shows the cross-sectional view of the AC PDP structure provided with an electrically conducting layer forming auxiliary electrode according to the present invention.
Figure 3(a) shows the block diagram of the driving circuitry of the conventional AC PDP.
Figure 3(b) shows the block diagram of the driving circuitry of the AC PDP according to the present invention.
Figure 4(a) illustrates the waveform diagram for conventional AC PDP showing wave shapes employed during a single subfield.
Figure 4(b) illustrates the waveform diagram showing wave shapes employed during a single subfield according to the present invention.
Figure 5(a) shows the cross sectional view of the back glass substrate provided with an electrically conducting layer forming auxiliary electrode according to the present invention.
Figure 5(b) shows the cross sectional view of the back glass substrate provided with an electrically conducting layer and a dielectric layer covering the said auxiliary electrode according to the present invention.
Figure 5(c) shows the cross sectional view of the back glass substrate provided with an electrically conducting layer, a dielectric layer covering the said auxiliary electrode and address electrode above the said dielectric layer according to the present invention.
Figure 5(d) shows the cross sectional view of the back glass substrate provided with an electrically conducting layer, a dielectric layer covering the said auxiliary electrode, address electrode above the said dielectric layer, a reflective dielectric layer over the said address electrode, straight channel barrier rib above the said reflective dielectric layer and phosphor layer in the barrier rib channel according to the present invention.
Detailed description of the invention with reference to drawings:
Before starting the detailed description of the present invention, it is necessary to discuss the conventional AC PDP for clear understanding of the present invention.
Figure 1 illustrates the cross-sectional view of conventional AC PDP with straight barrier ribs. As in figure 1, the front glass substrate (1) and back glass plate (2) are shown. In the front glass substrate (1), display electrodes are made of transparent ITO sheet (3). To reduce the resistance of the display electrode, opaque electrically conducting layer forming bus electrodes (4) are made over the ITO electrodes. The display electrode is covered with a transparent dielectric layer (5) to limit the discharge current. Then the electron emissive layer (6) is deposited over the transparent dielectric layer (5). On the back glass substrate (2), a plurality of address electrodes (7) is formed. The address electrodes (7) are covered with a reflective dielectric layer (8) to limit the discharge current and light reflection. The straight channel barrier ribs (9) are formed over the white
dielectric layer. The R (10a), G (10b), B (10c) phosphor layers are formed in the barrier rib (9) channel spaces.
Figure 2 shows the cross-sectional view of AC PDP with barrier ribs according to the present invention. It consists of two glass substrates that enclose the gas for discharge. The front glass substrate (1) having display electrodes are made of transparent ITO sheet (3). To reduce the resistance of the display electrode, opaque electrically conducting layer forming bus electrodes (4) are made over the ITO electrodes (3). The display electrode is covered with a transparent dielectric layer (5) to limit the discharge current. Then the electron emissive layer (6) is deposited over the transparent dielectric layer (5). A layer of electrically conducting material (11) forming auxiliary electrode is provided on the back glass plate (2). Silver may be one of the suitable electrically conducting materials to form auxiliary electrode, however other materials like gold (Au), copper (Cu), aluminum (Al) or any conductor can also be used. The auxiliary electrode can be made of patterned electrically conducting layer. This conductive layer is covered with a dielectric layer (12). A plurality of address electrode (7) orthogonal to the display electrodes (3, 4) is provided over the said dielectric layer (12). The address electrode (7) is covered with a reflective dielectric layer (8) to limit the discharge current and light reflection from the back plate. The barrier ribs (9) are formed over the white dielectric layer (8). The R (10a), G (10b), B (10c) phosphor layers are formed in the barrier rib (9) channel spaces.
The detailed driving circuitry for operation of conventional POP is shown in figure 3(a). The waveforms diagrams of figure 4(a) are illustrative of the waveforms employed to scan (Y), sustain (X) and address (A) electrodes of the POP during the operation of figure 3(a). A controller (16) provides output to control a plurality of address or data drivers (17) which provides selective addressing to the data carriers to provide the required address voltage to the address electrodes. Controller (16) further provides control output to scan module (13) and sustain module (14). Scan module (13) is utilized to provide the waveforms required during the set-up period and the sustain period of figure 4(a). Sustain module (14) applies voltage outputs to sustain (X) electrodes in common and the scan module (13) applied its output via scan drivers (15) to scan (Y) electrodes. The controller (16) provides output to the scan driver (15) to generate a scan pulse for line selection to the scan (Y) electrode in sequence while applying a control output to the address drivers to provide the data via the data carriers (18) to the address electrodes in synchronization with the application of scan pulse.
Figure 3(b) shows the block diagram of the driving circuitry of the AC PDP according to the present invention. The waveforms diagrams of figure 4(b) are illustrative of the waveforms employed to scan (Y) electrodes, sustain (X) electrodes, address (A) electrodes and Auxiliary electrode of the AC PDP during the operation of figure 3(b). A controller (16) provides output to control a plurality of address or data drivers (17) that provides selective addressing to the data carriers to provide the required address voltage which will be lower than normal
voltage to the address electrodes. Controller (16) further provides control output to scan module (13) and sustain module (14) and auxiliary module (19). Scan module (13) is utilized to provide the waveforms required during the set-up period and the sustain period of figure 4(b). Sustain module (14) applies voltage outputs to sustain (X) electrodes in common and the scan module (13) applied its output via scan drivers (15) to scan (Y) electrodes. The controller (16) provides output to the scan driver (15) to generate a scan pulse for line selection to the scan (Y) electrode in sequence while applying a control output to the address drivers to provide the data via the data carriers (18) to the address electrodes in synchronization with the application of scan pulse. The controller (16) also provides output to the auxiliary module to generate a single pulse after the set up period for duration equal to the address period. This fixed bias at auxiliary electrode (11) creates extra charges at the time of addressing that help the reduction of the address voltage. The electric field generated by the extra charges between scan and auxiliary electrode adds up to the applied electric field between scan and address electrode to initiate the address discharge at lower address voltages less than 60 volts.
The manufacturing process description to form back plate structure is shown in figure 5(a)-5(d) according to the present invention. The front plate structure is similar as the conventional AC PDP structure shown in figure 1. The solid layer of electrically conducting material (11) such as silver, gold, copper, aluminum etc or any conducting material is deposited by any of the following processes such as screen-printing, sputtering, electron beam evaporation, thermal evaporation, pulsed laser deposition, atomic layer deposition, electroless plating, flash evaporation, ion plating, spray pyrolysis or pulsed electron gun evaporation process to form auxiliary electrode as shown in figure 5(a).
A layer of dielectric material (12) is printed through screen-printing or lamination process over the said auxiliary electrode for insulation as shown in figure 5(b). Further, the address electrodes (7) made of electrically conducting layer material are printed over the said dielectric layer (12) using the screen-printing process or thick film photo process or sand blasting process (see figure 5(c)). A layer of reflective dielectric material (8) is also printed through screen-printing process or lamination process over the said address electrodes (7) for insulation and light reflection.
Figure 5(d) shows the cross-sectional view of back plate structure including the straight channel barrier ribs (9) or in waffle structure on in any other pattern form and phosphor layer (10) in the spaces between barrier rib walls. The barrier ribs are formed over the said reflective dielectric layer (8) by the sand blasting process or screen-printing process. The three color (R, G, B) phosphors (10a, 10b, 10c) are deposited between the inner walls of the barrier rib channel in the paste form so as to fill in the channel. The phosphor paste is fired to form a layer. In this process the volume of the phosphor paste is constant as it is determined by the volume of the cavity formed by barrier ribs. The composition of the phosphors is chosen such that on simultaneous excitation of the phosphors by
the VUV gives white color. The phosphor is coated with the help of screen-printing process.
The front and back glass substrates are joined using frit seal material (not shown) applied on front glass substrate (1). The Xe+Ne gas mixture is filled in the discharge spaces formed by barrier ribs between the front and back glass substrates.
The present invention provides an AC PDP having an auxiliary layer with fixed bias voltage to reduce the address voltage requirement. The reduction in address voltage is useful to eliminate the high cost and complex electronic circuitry of data carriers like COF and TCP. Low address voltage is also facilitating to use higher Xenon percentage (up to 70%) in PDP operation for improving the luminous efficacy.
The auxiliary electrode layer can be shifted to front glass substrate or its position can be changed between front and back glass substrates. Its position can also be changed by placing it on any layer or sequence of layers. The auxiliary electrode layer can be interchanged with other layers and can be used in any new structure.
Although the invention has been described with reference to specific embodiments, this description is not meant to be construed in limiting sense. Various modifications of the disclosed embodiments, as well as alternate embodiments of the invention, will become apparent to persons skilled in the art upon reference to the description of the invention. It is therefore contemplated that such modifications can be made without departing from the spirit or scope of the present invention as defined.

We Claim:
1) A plasma display panel comprising
A pair of front and back glass substrate and gas enclosed between the substrates, plurality of pair of sustain (X) - scan (Y) display electrodes are provided on the front glass substrate in second direction,
wherein,
An electrically conductive layer forming auxiliary electrode (solid or patterned) is provided on the back glass substrate,
The said electrically conductive layer is covered with a dielectric layer, said dielectric layer can be visible light reflective,
A plurality of address electrode orthogonal to the display electrodes is provided over the said dielectric layer in first direction,
The said address electrodes are covered with a reflective dielectric layer,
Barrier ribs are formed on the said reflective dielectric layer,
R, G, B phosphor layers are formed in the barrier ribs channel spaces.
2) The PDP as claimed in claim 1, wherein, said layer of auxiliary electrode is
provided with a fixed voltage bias during the address period.
3) The PDP as claimed in claim 1, wherein, said auxiliary electrode layer is
provided with fixed voltage bias to reduce the address voltage requirement to
eliminate the high cost and complex electronic circuitry of data carriers.
4) The PDP as claimed in claim 1, wherein, low address voltage is provided to
use higher Xenon percentage in PDP operation for improving the luminous
efficacy.
5) A Process for manufacturing POP that comprises the following steps:

a) a layer forming auxiliary electrode is provided on the back glass substrate
by method such as here in described,
b) a layer of dielectric material is formed over the said layer forming auxiliary
electrode by method such as herein described,
c) address electrodes are formed over the said dielectric layer by method
such as herein described,
d) a reflective dielectric layer is formed over address electrode by method
such as herein described,
e) barrier ribs are formed over said reflective dielectric layer on back glass
substrate by method such as herein described,
f) three color (R, G, B) phosphors are deposited on the inner walls of the
barrier rib cavity forming a layer by method such as herein described,
g) The front and back glass substrates are joined using frit seal material and
Ne+Xe gas mixture is filled in the discharge spaces formed by barrier ribs
between the front and back glass substrates to develop an AC PDP.
5) A plasma display panel and a process for its manufacturing substantially herein described with reference to the accompanying drawings.