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"An Automatic Failure Detection System For A Single Phase Inverter/Ups"

Abstract: This invention relates to an automatic failure detection system for a single phase inverter/UPS comprising of a control unit having various sensing circuits, DC-AC converter, load connected to the control unit, CPU section and display & interfaced to a computer.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
16 August 2007
Publication Number
16/2008
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application
Patent Number
Legal Status
Grant Date
2016-07-21
Renewal Date

Applicants

SU-KAM POWER SYSTEMS LTD.
PLOT NO. WZ-1401/2, NANGAL RAYA,NEW DELHI-110046,INDIA.

Inventors

1. PRINCE VIKAS GARG,
SU-KAM POWER SYSTEMS LTD. PLOT NO WZ-1401/2, NANGAL RAYA,NEW DELHI-110046,INDIA.
2. SANJEEV KUMAR SAINI
PLOT NO WZ-1401/2, NANGAL RAYA,NEW DELHI-110046,INDIA.
3. KUNWER DEEP SACHDEV
PLOT NO WZ-1401/2, NANGAL RAYA,NEW DELHI-110046, INDIA.

Specification

FIELD OF INVENTION
This invention relates to an automatic failure detection system for a single phase inverter/UPS.
PRIOR ART
The conventional related test equipment includes a number of tools, measuring equipments and instruments e.g. Multimeters, Digital Storage Oscilloscopes, mains supply, a Variac, DC source and a Test Rig with load attached/connected to it & a number of analog meters like ammeters, voltmeters. It also requires a skilled engineer who can operate these equipments and has an in-depth knowledge of the product as well. The operator would be required to carry out the testing procedure one by one and remark the final status of the tested product. There would not be any data records of the tested products. This makes the whole testing setup bulky and the testing process lengthy (if the operator records the data, the time increases multifold). Normally, it takes at least 4-5 minutes of rigorous testing, which can vary to well over 30 min. depending on the type and capacity of the product.
In a conventional testing rig, there is no such process that would automate the production process after the product takes shape of the finished good. The focus has so far been only on the automation of the production process before the finished goods stage rather than the final stage.
Moreover, it requires a seasonal skilled operator who is supposed to have in-depth knowledge of the testing process. Also, any organization needs the excessive skilled manpower during the peak demand and requires offloading some during the off-season. Therefore, considering the need of the highly skilled operator all the time and the potential hazard that any power electronics equipment carry with it, it becomes quiet essential to ease the dependency on the skilled labor.
US patent 4,807,161 provides the concept of a modular approach in which optional interface modules selected to suit the particular requirements of a user are assembled into a programmable unit wherein software programmable hardware modules configured according to requirements provide a comprehensive range of test signal types and control features. However, what it doesn't have in its scope is the functional testing of the finished product as a whole. Its focus is
primarily on the functional testing of the electrical PCB assemblies only. Also, this cannot keep the record of the tested products along with their status, storage of data and
the respective status related to different parameters of the product under testing. Further, there is no provision to generate a report by using thermal printer.
In the US patent 5,786,641, there is a failure detection system for a power converter wherein it detects a failure only in a by-pass switch of the same. However, it doesn't have provision for functional testing of the product as a whole. Its focus is primarily on the functioning of the by-pass switch only.
OBJECTS OF THE INVENTION
The primary object of the present invention is to provide an automatic failure detection system for a single phase inverter/UPS to overcome the above said problems associated with prior art(s).
Another object of the present invention is to provide an automatic failure detection system for a single phase inverter/UPS, capable of detecting a failure, measuring all related parameters, and generating reports.
Further object of the present invention is to provide an automatic failure detection system for a single phase inverter/UPS, which is efficient.
Yet further object of the present invention is to provide an automatic failure detection system for a single phase inverter/UPS, which is having simple functionality and which does not require skilled operator.
Inventive features have been indicated in the principal claim and advantageous features have been reflected in the subsequent claims.
4
SUMMARY OF THE INVENTION
The present invention comprises a control section having various sensing circuits provided with a supply section in the control card for supply from the battery. The output of these control section is fed to the CPU, which processes the information and executes the desired task. This information is fed to the PC and the PC records this information and generates reports.
According to the present invention, the automatic failure detection system does not require a mains source to carry out the functionality of mains parameters of the product. It has its own in-built DC-AC converter/ Variable Voltage Variable Frequency (VVVF) source which ensure the availability of the mains supply throughout even when the power from the grid fails. The VVVF source also eliminates the need of a variac which
otherwise is a bulky option and requires manhandling as well. Hence, the production can continue without any interruption. The task is done with a battery connected to the unit which in one go can carry out as many as 500 operations (depending on the type of the product, figure may vary). This battery can afterwards be replaced with a charged battery or charged again with an external charger or can be charged with the in-built DC-AC converter in bidirectional mode i.e. it will convert AC into DC to charge batteries using converter in fly back boost mode when the production process is offline.
Further a thermal printer is attached to the control unit for individual test report generation of the product.
The current time to carry out the functional testing of a single product is ~ 60secs. This can further be reduced to 30-50secs. Hence, it helps in cutting down the production time.
Unlike already available automation techniques which are complex in nature and require skilled operators to carry out the process, its functionality is very simple and doesn't require a skilled operator too. The best an operator has to do here is to make 2-3 connections and start the process. Rest will be done by the automatic failure detection system itself.
According to the present invention with the centralized supervision, the production floor supervisor doesn't require to monitor the lines individually and in person. The whole process can be monitored remotely on a single/multiple PCs depending upon the communication protocol selected. It eases the pressure on the supervisor and facilitates him in multitasking. Moreover, the data is always available and can be sent to the technical experts immediately, if required.
The present invention gives a better insight into the average, maximum and minimum no. of products tested during a day. This can help improving the production process. Also, it carries out data logging which ensures the availability of the data for all the tested products.
Since the technical specifications of the products are already fed in the powerful DSP/DSC inside this embedded system, therefore there is no control of the operator on the testing process and the chances of the operator missing/skipping any process is eliminated.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
Further objects and advantages of this invention will be more apparent from the ensuing description when read in conjunction with the accompanying drawings indicating exemplary embodiments of the present invention and wherein:
FIG. 1 shows block diagram of a first embodiment of an automatic failure detection system for inverter/UPS according to the present invention;
4
FIG. 2A shows a block diagram of the control section for an automatic failure detection system according to the present invention;
FIG. 2B shows a block diagram of the PC interface for an automatic failure detection system according to the present invention;
FIG. 2C shows a block diagram of the product under testing for an automatic failure detection system according to the present invention;
FIG. 2D shows a circuit diagram of load combination for an automatic failure detection system according to the present invention;
FIG. (2E) & (2F) show a perspective view .of the battery bank for an automatic failure detection system according to the present invention;
FIG. 2G shows a 6ircuit diagram of the control section for an automatic failure detection system according to the present invention;
FIG. 3A & 3B show the block diagram and circuit diagram of a DC/AC converter for automatic failure detection system according to the present invention;
FIG. 4 shows a perspective view of the CPU (digital signal controller) for an automatic failure detection system according to the present invention;
FIG. 5 shows a circuit diagram of battery sensing circuit for an automatic failure detection system according to the present invention;
FIG. 6 shows a circuit diagram of input sense with zero cross sense for an automatic failure detection system according to the present invention;
FIG. 7 shows a circuit diagram of output sense with zero cross circuit for an automatic failure detection system according to the present invention;
FIG. 8 shows a circuit diagram of charging current sensing circuit for an automatic failure detection system according to the present invention;
FIG. 9 shows a circuit diagram of overload current sensing circuit for an automatic failure detection system according to the present invention;
FIG. 10 shows a circuit diagram of AC current sense section for an automatic failure detection system according to the present invention;
FIG. 11 shows a circuit diagram of supply section for an automatic failure detection system according to the present invention;
FIG. 12 shows a circuit diagram of automatic switch for an automatic failure detection system according to the present invention;
FIG. 13 shows a diagram of the driver of automatic switch section for an automatic failure detection system according to the present invention;
FIG. 14 shows a circuit diagram of selector switches for an automatic failure detection system according fa the present invention;
FIG. 15 shows a circuit diagram of communication system for an automatic failure detection system according to the present invention;
FIG. 16 shows a circuit diagram of thermal printer for generating a report. FIG. 17A shows the main software interface screen. FIG.17B shows a perspective view of the database. FIG. 18 shows the composition of the content database;
FIG. 19A shows a flow chart outlining the software program procedures for a typical visit to the computer by the user, according to the present invention;
FIG. 19B shows a continuation of FIG. 19 A; FIG. 19C shows a continuation of FIG. 19B; FIG. 19D shows a continuation of FIG. 19C; FIG. 19E shows a continuation of FIG. 19D; FIG. 19F shows a continuation of FIG. 19E; FIG. 19G shows a continuation of FIG. 19F;
DETAILED DESCRIPTION OF THE INVENTION WITH REFERENCE TO THE ACCOMPANYING DRAWINGS
Reference may be made to Fig (1) indicating the overall view of the functionality of the system i.e. Automatic failure detection system and its interface with the product under testing & the computer. The system comprises of several sections that include Fig. 2A, 2B, 2C, 2D, 2E, 2F, 17A and 17B (described later). Figure 2A depicts the interface of the system with a computer which receives the data & the status of the system, displays it on the graphical user interface and stores the data in the database. This rig ranges from 110-280 Volts and 45-55 hertz (as per the technical requirement both the parameters can be adjusted).
Fig (2A) gives the overall view of the functionality of the control section of the system i.e. Automatic failure detection system. The control section is divided into further subsections viz. the CPU section, the DC-AC converter, Load and the LCD display. The CPU section comprises of a high end Digital Signal Controller which takes the inputs from various sources (described in the further sections), compares the received data with the set parameters, takes the necessary actions and carries out the functional testing of the product in the desired sequence. The DC-AC converter provides the single phase inverter/UPS with the mains supply. It draws power from the battery/battery bank. The load comprises of several types i.e. resistive load, Inductive load and the capacitive load depending on the type of the product. The LCD display along with the GUI on the PC helps the operator to have a look at the status of the single phase inverter/UPS. The functioning of all these sections is controlled again by the CPU section of the system.
Fig (2B) depicts the interface of the system with the PC. The PC receives the data from the system through RS 232/RS 485/USB interface. With the help of the Graphical User Interface (Fig. 17 A) the operator gets to look at the system parameters and status (like in the case of the LCD display). The parameters like I/P & O/P voltages, frequencies and ac current, battery parameters like battery voltage, charging & discharging current, O/P parameters like percentage of load and total power of system in VA and watts are displayed on the GUI screen. Also, all the parameters which comprise of the technical specifications of the said systems e.g. input voltage, frequency, mains fuse & charging current and inverter parameters like no load voltage & current, full load voltage & current, overload voltage and current, o/p frequency, protections like short circuit are displayed on the screen along with their tested status. In case of any communication failure, there would be a message on the screen indicating such notifications. This interface also lets the operator give the print command to the control section which further dictates the thermal printer to generate a test report of the tested product. The test report thus generated can be sent along with the tested product. A copy of this can be retained with the production supervisor as well. The data that is sent to the PC along with the single phase inverter/UPS status and the overall status of the products tested so far,
gets stored in an excel sheet with the product's name & tested date in the database (Fig. 17B) of the PC for further analysis as well as a record.
Fig (2C) depicts the interface of the system with the single phase inverter/UPS. The single phase inverter/UPS is connected to the battery bank (Fig. 2E) for its operation whilst the mains is supplied from DC-AC Converter section of the automatic failure detection system. The output of the single phase inverter/UPS is fed to the control unit which in turn is connected to the load. Depending on the type and capacity of the product, it loads the single phase inverter/UPS to carry out the testing.
Fig (2D) depicts the interface of the system with the Load bank. The load bank comprises of several types of loads e.g. resistive load, Inductive load and the capacitive load depending on the type of the single phase inverter/UPS. The system selects the desired type and amount of load related to the particular type of product.
Fig (2E) & Fig (2F) depicts the battery bank for the system as well as the single phase inverter/UPS. The battery bank again can have a number of batteries connected in series or parallel combination to facilitate the testing of different capacity of products.
Fig (2G) depicts the circuit diagram of the control section of the system i.e. Automatic failure detection system. This embedded system is supplied with for example 12V and ground from the external battery source for its operation. The shunt across the negative terminals of the battery helps in identifying the values of the charging and the discharging current. The value of the shunt is selected in such a way so as to obtain the best resolution for the given current signals. The system receives analog/digital input signals from various sources at their designated pins of the CPU, which in this case is a powerful DSC/DSP, for the functional testing of the product. The analog signals are then converted into their equivalent digital values with the help of an in-built high resolution A/D converter, operating at a high sampling rate. These input signals are received at the CPU through a number of connectors. The control system has two pairs of communication; one for the internal communication with the DC-AC converter and the second with the PC thru' RS 232/RS 485/USB interface. The DC-AC converter acts as a variable voltage variable frequency source when it receives signals from the CPU. The data values along with the parameters' status and the system status are sent to the PC for database. The LCD is also connected thru' a connector to receive and display various parameters along with their respective status. There is an interface between control card and PC, automatic switch card & the DC-AC converter. The thermal printer is also attached to the CPU thru' a connector and generates a printout when commanded by the CPU.
Fig (3a) & (3b) depicts the circuit diagram of the DC-AC converter section of the system i.e. Automatic failure detection system. The DC-AC converter is connected to a battery (bank). It has an in-built powerful DSC/DSP which operates the switching devices (here in this case, it is either MOSFETs or IGBTs) at a very high frequency. These devices

operate to convert DC to AC and supply the thus generated AC to the single phase inverter/UPS. The DC-AC converter receives the data from the control card for its control via full/half duplex transmission/reception. The CPU of the control card, a DSP or a DSC directs the variations in the input voltage and the frequency for its operation and effectively acts as a variable voltage variable frequency source. The DC-AC converter operates in H Bridge configuration. A fan is used for the cooling of the heat sink used in the DC-AC converter. The DC-AC converter has its own O/P sense signal which helps in regulating the desired output voltage and frequency as required by the system. An on/off switch has also been provided to reset the output, if required.
Fig (4) depicts the CPU of the said embedded system. It is a high end Digital Signal Controller/ Processor which receives various analog/digital inputs from various sections of the control unit (described in subsequent sections), the single phase inverter/UPS & the PC and compares the thus received data with the already fed internal Technical Specifications of the product. It displays & stores the corresponding data and declares the status of the product. The CPU ensures that no testing procedure is skipped and carries out the testing in a predefined manner which is set by the technical experts only. The CPU also controls various sections like DC-AC converter, Automatic Switch section and the internal & external communications. The power to the CPU is supplied thru' a regulator which outputs +5V for its functioning. The CPU has got its own reset circuitry and an internal oscillator. Depending upon the requirement, either this internal oscillator or an external oscillator can be used to generate the clock.
Fig (5) depicts the battery sense section of the system. It senses the battery level of the battery bank connected to the single phase inverter/UPS. The resistor network prior to the CPU ensures that the battery bank voltage is calculated over its full range as well as the signal fall between the operating ranges of the CPU. The CPU senses and records these levels to check battery levels during charging in mains mode and discharging in inverter mode. Also, the battery levels help to calculate the total power of the system.
Fig (6) depicts the input section of the system. It senses the input vpltage levels and the corresponding zero cross of the product. The voltage sensing transformer between the mains supply and the CPU steps down the AC voltage. The voltage sensing transformers sample high voltage through the primary and deliver an exact replica to the secondary at a lower voltage. This lowered AC voltage is then converted into DC voltage. The resistor network prior to the CPU ensures that the signal fall between the operating ranges of the CPU. This analog ^signal is then fed to the in-built Analog to Digital converter of the CPU which samples these analog signals at a fast sampling rate to obtain the equivalent digital signal. The CPU varies these levels to ensure that these parameters of the single phase inverter/UPS are within permissible range. The transistor shown in the circuit is fed with the analog sinusoidal signal and the switching of the transistor takes place during the zero crossing of the sine wave. The result is an effective Zero Cross.
Fig (7) depicts the output section of the system. It senses the output voltage levels and the corresponding zero cross of the product in the inverter mode. The voltage sensing transformer between the mains supply and the CPU steps down the AC voltage. The voltage sensing transformers sample high voltage through the primary and deliver an exact replica to the secondary at a lower voltage. This lowered AC voltage is then converted into DC voltage. The resistor network prior to the CPU ensures that the signal falls between the operating ranges of the CPU. This analog signal is then fed to the inbuilt Analog to Digital converter of the CPU which samples these analog signals at a fast sampling rate to obtain the equivalent digital signal. The CPU varies these levels to ensure that these .parameters of the single phase inverter/UPS are within permissible range. The transistor shown in the circuit is fed with the analog sinusoidal signal and the switching of the transistor takes place during the zero crossing of the sine wave. The result is an effective Zero Cross.
Fig (8) depicts the charging current sense section of the system. It senses the charging current levels of the single phase inverter/UPS. If the received values fall outside the tolerance band, it fails the system. The op-amp has been used here as an integrator providing the required gain.
The dual RC network before the CPU provides a second order filter. This analog signal is then fed to the in-built Analog to Digital converter of the CPU which samples this analog signal at a fast sampling rate to obtain the equivalent digital signal. The CPU then records these levels to ensure that this parameter of the single phase inverter/UPS is within permissible range.
Fig (9) depicts the load current sense section of the system. It senses the load current levels of the single phase inverter/UPS in the inverter mode. The op-amp has been used here as a non-inverting amplifier. The dual RC network before the CPU provides a second order filter. This analog signal is then fed to the in-built Analog to Digital converter of the CPU which samples this analog signal at a fast sampling rate to obtain the equivalent digital signal. The CPU then records these levels to ensure that this parameter of the single phase inverter/UPS is within permissible range. If the received values fall outside the tolerance band, it fails the system. The CPU checks this parameter for 'No Load', 'Full Load' and 'Overload' condition.
Fig (10) depicts the input and output AC current sense section of the system. It senses the AC current levels of the single phase inverter/UPS in the mains and the inverter mode. If the received values fall outside the tolerance band, it fails the system. The CPU checks these parameters for power calculations. A current transformer with the desired turn ratio has been used prior to the bridge rectifier to rectify the ac input/output current signal. The resistor network after the CT ensures that the signal falls between the operating ranges of
the CPU. For noise filtration, a double cascade RC n/w has been used. The CPU senses and records these levels to ensure that these parameters of the single phase inverter/UPS are within permissible range.
Fig (11) depicts the Supply section of the system. There are two provisions for the supply viz. from the mains and the battery itself. When supply from both the sources is available then the dominant supply is chosen to carry out the task. The regulator herein has been used in a switch mode buck converter mode. It supplies the system with -H2V wherever it is required. The output is then fed to a linear regulator which generates a 5V supply which is then fed to the whole control section of the system.
Fig (12) depicts the circuit diagram of the Automatic Switch section of the system. The Automatic Switches, which can be relays or thyristors of any ratings depending upon the capacity of the system, are mounted on a separate card or for higher capacity systems, higher ratings switches can be mounted anywhere within the system. These Automatic Switches are controlled by a driver 1C which is mounted in the control section. The driver 1C when receives the signals from the high end CPU, opens or closes the particular switch to carry out the relevant task. All the automatic switches are connected to the control card via a connector and after receiving their relevant signals carry out the testing in a predefined manner. Any number of switches can be used, again depending upon the type and capacity of the product.
Fig (13) depicts the Automatic Switch section of the system. There is a separate Automatic Switch card for higher capacity systems. Automatic Switches are mounted outside but within the system. These Automatic
Switches are controlled by a driver 1C which is mounted in the control section. This driver 1C takes a 5V TTL signal from the DSC and converts it into 12V that is required to drive an electromechanical switch. Also, it draws -1-2 milliamps from the CPU (DSC hi this case) and delivers -100 milliamps to drive the switches. The driver 1C when receives the signal from the high end CPU, opens or closes the particular Automatic Switch to carry out the relevant task.
Fig (14) depicts the selector switch section of the system. There are a number of selector switches (depending on the rating of the system, it can be one or more) which help in selecting the desired product. It is a TTL signal. The control section then carries out the testing process with the set parameters of the particular product only, failing which it will fail the system.
Fig (15) depicts the communication section of the system. There are two communications: one is the internal communication between the control section and the DC-AC converter to exchange data and the second is the external communication with
the PC through RS 232/RS 485/USB protocol. The internal communication uses 'Handshaking' protocol between the two systems. The control section sends the data and the DC-AC converter responds to the data and updates the system with its current status. Through the external communication, the control section sends and receives the signals to the PC for display .and data storage purpose.
Fig (16) depicts the Direct Thermal Printer. This printer uses heat to transfer an impression onto paper and prints the image by burning dots onto coated paper when the paper passes over a line of heating elements. This Thermal Printer is directly connected to the Control Section and at the end of the testing sequence of the single phase inverter/UPS, the Control section after receiving input from the PC sends a command to the thermal printer to generate a test report for the customer and the company records.
Fig (17A) is a screen shot which shows all the parameters of the product being tested
whilst regularly updating their status as sent by the control system. At the end of the
testing, it displays the current status of the card along with the total cards tested so far and
the number of passed/failed cards. Fig (17 B) shows the data logged in an excel sheet.
The data logged contains information like time of the process, total number of cards
tested, number of passed/failed cards, I/P voltage, I/P frequency, I (charge), mains fuse, I
(no load), V (no load), I (full load), V (full load), I (over load), V (over load), O/P
frequency. '
Fig (18) shows the data flow to the database section of the PC. The data, various parameters and the system status are sent to the database from the GUI as well as the Automatic failure detection system. The database stores the data in the form of excel sheets with the product's name and the date on which it was tested in a particular folder, thus helping in segregation of the records of the different products.
FIG. (19A-19G) is a flow chart outlining the software program procedures for a typical visit to the computer by the user, according to the present invention. After making all the connections, the software selects and runs the application file. When product is switched off, the CPU closes the mains switch and testing enters mains mode. It tests input parameters e.g. i/p voltage/ frequency/charging current /fuse. Then it opens the mains switch and all the load switches. Then the testing enters the inverter mode. It tests the inverter parameters like load current/ voltage in all conditions, o/p frequency, protections like overload, short circuit. Then it displays this information on the LCD/PC and sends the data to the P

Documents

Orders

Section Controller Decision Date

Application Documents

# Name Date
1 abstract.jpg 2011-08-21
1 Petition Under Rule 137 [19-07-2016(online)].pdf 2016-07-19
2 1743-del-2007-form-2.pdf 2011-08-21
2 1743-DEL-2007_EXAMREPORT.pdf 2016-06-30
3 1743-del-2007-form-1.pdf 2011-08-21
3 1743-del-2007-Correspondence Others-(16-06-2016).pdf 2016-06-16
4 1743-del-2007-GPA-(16-06-2016).pdf 2016-06-16
4 1743-del-2007-drawings.pdf 2011-08-21
5 Form 13 [07-06-2016(online)].pdf 2016-06-07
5 1743-del-2007-description (complete).pdf 2011-08-21
6 Form 26 [07-06-2016(online)].pdf 2016-06-07
6 1743-del-2007-correspondence-others.pdf 2011-08-21
7 Other Patent Document [07-06-2016(online)].pdf 2016-06-07
7 1743-del-2007-claims.pdf 2011-08-21
8 1743-del-2007-abstract.pdf 2011-08-21
8 1743-del-2007-Abstract-(03-01-2014).pdf 2014-01-03
9 1743-del-2007-Claims-(03-01-2014).pdf 2014-01-03
9 1743-del-2007-Petition-137-(03-01-2014).pdf 2014-01-03
10 1743-del-2007-Correspondence Others-(03-01-2014).pdf 2014-01-03
10 1743-del-2007-GPA-(03-01-2014).pdf 2014-01-03
11 1743-del-2007-Drawings-(03-01-2014).pdf 2014-01-03
12 1743-del-2007-Correspondence Others-(03-01-2014).pdf 2014-01-03
12 1743-del-2007-GPA-(03-01-2014).pdf 2014-01-03
13 1743-del-2007-Claims-(03-01-2014).pdf 2014-01-03
13 1743-del-2007-Petition-137-(03-01-2014).pdf 2014-01-03
14 1743-del-2007-Abstract-(03-01-2014).pdf 2014-01-03
14 1743-del-2007-abstract.pdf 2011-08-21
15 1743-del-2007-claims.pdf 2011-08-21
15 Other Patent Document [07-06-2016(online)].pdf 2016-06-07
16 1743-del-2007-correspondence-others.pdf 2011-08-21
16 Form 26 [07-06-2016(online)].pdf 2016-06-07
17 1743-del-2007-description (complete).pdf 2011-08-21
17 Form 13 [07-06-2016(online)].pdf 2016-06-07
18 1743-del-2007-drawings.pdf 2011-08-21
18 1743-del-2007-GPA-(16-06-2016).pdf 2016-06-16
19 1743-del-2007-form-1.pdf 2011-08-21
19 1743-del-2007-Correspondence Others-(16-06-2016).pdf 2016-06-16
20 1743-DEL-2007_EXAMREPORT.pdf 2016-06-30
20 1743-del-2007-form-2.pdf 2011-08-21
21 Petition Under Rule 137 [19-07-2016(online)].pdf 2016-07-19
21 abstract.jpg 2011-08-21

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