Claims:1. A bus architecture for electronic trip unit comprising:
dual microcontrollers and an external memory, the dual microcontrollers comprising a primary controller and a secondary controller, which are connected to the external memory through a serial bus, which can be SPI or I2C communication based,
wherein access to the external memory of the primary controller and the secondary controller is synchronised by means of handshaking lines between them.
2. The bus architecture as claimed in claim 1, wherein the primary microcontroller is responsible for generating event logs, trip logs, oscillography data etc. is given higher priority for external memory accessing.
3. The bus architecture as claimed in claim 2, wherein the primary microcontroller is configured to read as well as write data from/to external memory.
4. The bus architecture as claimed in claim 1, wherein the secondary microcontroller is configured to read data from shared memory.
5. The bus architecture as claimed in claim 4, wherein the secondary microcontroller is configured to read any or a combination of protection settings, metering, trip log and event log, independently from external memory.
6. The bus architecture as claimed in claim 5, wherein the read request is not required to be routed through the primary controller, thereby reducing communication latency.
7. The bus architecture as claimed in claim 6, wherein the secondary controller is configured to provide backup protections in case of primary controller failure.
8. The bus architecture as claimed in claim 7, wherein the secondary controller works on the same set of protection settings which are set by the user.
, Description:FIELD OF INVENTION
[0001] The present disclosure relates, in general, electronic trip unit of circuit breakers. In particular, the present disclosure relates to a method of data sharing between multiple controllers and external world with enhanced reliability.

BACKGROUND
[0002] Modern day electronic trip units not only provide protection against various types of faults such as over / under current, voltage, frequency etc. but can also provide smart communication for data sharing, user interface and self-healthiness check functionalities. User can read as well as modify protection settings as per the load connected. Electronic trip units have the provision of logging the date and timestamp of settings change and it can also maintain previous settings done by the user thus providing setting change traceability.
[0003] Whenever fault occurs, alarm, pickup and trip log events with timestamp can be stored in the non-volatile memory of the electronic trip unit so that user can read them to trace the cause the fault. Trip log can include source of fault, settings of tripping protection, various phase currents, voltages, system frequency etc. at the time of tripping. It can also store sample values of few cycles before tripping and few cycles after tripping so that the user can understand the load behaviour before and after tripping. All of the data mentioned above can be read using the local user interface on the electronic trip unit or it can be taken on mobile phone using communication such as NFC or Bluetooth.
[0004] The data can also be communicated to remote systems using industry communication protocols such as MODBUS, IEC61850 etc. Electronic trip units (ETUs) can run different self-healthiness check algorithms to make sure that components/mechanical interfaces required for breaker operation are operational. In case of any abnormality user can be pre-warned using LED indications or alarms so that timely maintenance can be scheduled. ETUs are also capable of performing predictive analysis where based upon previous events stored in the non-volatile memory it can suggest the user of different causes which have created a fault in the past. This requires generating and storing large amount of metering data, event logs etc. in the non-volatile memory so that analysis done is accurate.

[0005] Hence to meet above requirements, electronic trip units are designed with multiple controller architecture. Multiple controller-based architecture helps in load sharing between the controllers such that the basic functionality which is to reliably provide protection from faults is not compromised. So generally, the main controller runs various protection algorithms whereas other controller/s may be responsible for running user interface, communication etc.
[0006] Event/trip logging may be done by main controller or by secondary controller. In general, the main controller performs the event logging activity and stores the data in its internal non-volatile memory. In this case whenever secondary controller needs to read the data, its read request is routed via primary controller. This adds latency in the communication time to SCADA. Also, if the main controller fails, there is no way where secondary controller can have access to settings, event logs etc. generated by primary controller.
[0007] Another architecture approach could be where data generation and storing is handled by secondary controller. In this case, fault sensing can be done by both the controllers such that main controller can run only protection algorithms and secondary controller can sense the fault and generate event log. Otherwise, fault sensing can be done by main controller only and the data of fault log is shared with secondary controller for storage. Here though the communication latency with respect to SCADA communication is reduced, there is an added burden on the communication interface between main and secondary controller.
[0008] CN104953533A entitled “Trip cause management device for an electric trip device” suggests a novel method to reliably store the fault record data in a self-powered breaker with multi-controller architecture. Architecture consists of an ASIC to perform the current and voltage measurements and to give trip command in case of a basic current fault. ASIC shares current and voltage data with microcontroller 2. Microcontroller 2 performs advanced metering such as frequency, harmonics etc. on the data collected and runs advance protections. Controller 2 is also connected to non-volatile memory for saving the fault record data. It is supported by a capacitor backup which makes sure that sufficient voltage is available so that controller 2 can do the write operations. Controller 3 is connected to controller 2 and ASIC and is responsible for displaying the information on display. It is usually in sleep mode to reduce the power consumption and is connected to battery circuitry. This battery provides power to controller 3 and non-volatile memory. Controller 3 can read data from non-volatile memory and display it. Controller 3 is also NFC capable and can wake up when there is no self-power using NFC.

[0009] The architecture suggested above uses two controllers and one ASIC. It also works on the principle of shared memory architecture where the data logging is done by controller 2 and data can be read from controller 3. The problem with this architecture is that the entire current and voltage sampling is done in ASIC and data is shared with controller 2 and 3 for further action. In case the ASIC fails or the communication link between ASIC and controller 2/3 fails, the electronic trip unit will fail.
[0010] Hence there exists a need for improvement in this architecture where the dependency of one controller on the other can be reduced/ removed and both can access the data independently. It is also required that in case of failure of one controller, the other controller can still read the data from memory and can provide protection functionality till the user is able to take a shutdown for trip unit replacement.

OBJECTS OF THE INVENTION
[0011] An object of the invention is to provide a multi-controller architecture with shared memory for load sharing between controller, redundancy for protection, ease of data management and reduction in communication latency.
[0012] Another object of the present invention is to provide a multiple controller based electronic trip unit such that basic functionality of providing protection against faults is uncompromised.
[0013] Another object is to provide electronic trip unit which can communicate with SCADA and share data on mobile app using smart communication protocols such NFC, Bluetooth, IEC61850 etc.
[0014] Yet another object of the present invention is to provide an electronic trip unit which can also run various machine learning algorithms which can predict breakers health, source of faults on-line etc.
[0015] Another object of the present invention is to provide dual controller-based design which can provide protection even if one of the two controllers fail due to any reason. Thus, it adds reliability in the design by providing redundant protections in secondary controller such that failure of one controller does not impact the functioning of basic protections.

SUMMARY
[0016] The present disclosure relates, in general, electronic trip unit of circuit breakers. In particular, the present disclosure relates to a method of data sharing between multiple controllers and external world with enhanced reliability.
[0017] In an aspect, the present disclosure provides a bus architecture for electronic trip unit comprising: dual microcontrollers and an external memory, the dual microcontrollers comprising a primary controller and a secondary controller, which are connected to the external memory through a serial bus, which can be SPI or I2C communication based, wherein access to the external memory of the primary controller and the secondary controller is synchronised by means of handshaking lines between them.
[0018] In an embodiment, the primary microcontroller is responsible for generating event logs, trip logs, oscillography data etc. is given higher priority for external memory accessing.
[0019] In another embodiment, the primary microcontroller is configured to read as well as write data from/to external memory.
[0020] In another embodiment, the secondary microcontroller is configured to read data from shared memory.
[0021] In another embodiment, the secondary microcontroller is configured to read any or a combination of protection settings, metering, trip log and event log, independently from external memory.
[0022] In another embodiment, the read request is not required to be routed through the primary controller, thereby reducing communication latency.
[0023] In another embodiment, the secondary controller is configured to provide backup protections in case of primary controller failure.
[0024] In another embodiment, the secondary controller works on the same set of protection settings which are set by the user.

BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the present invention and, together with the description, serve to explain the principles of the present invention.
[0026] Fig. 1 shows dual microcontroller and shared external memory based architecture as per the embodiment.
[0027] Fig. 2 shows hardware interface of primary and secondary microcontroller with external non-volatile memory.
[0028] Fig. 3 shows flow diagram of the implementation as per the embodiment.

DETAILED DESCRIPTION OF THE INVENTION
[0029] While the invention is susceptible to embodiments in many different forms, there are shown in the drawings and will be described herein, in detail, the preferred embodiments of the present invention. It should be understood, however, that the present disclosure is to be considered an exemplification of the principles of the invention and is not intended to limit the spirit or scope of the invention and/or claims of the embodiments illustrated. It will also be apparent to one skilled in the art that the present invention may be practiced without the specific details.
[0030] The bus architecture designed in accordance with the present invention consists of a multi-master scheme for data sharing where both primary and secondary controllers are master and external memory is slave. Both primary and secondary controllers are connected to external memory via serial bus which can be SPI or I2C communication based. Primary and secondary controller’s external memory access is synchronised via handshaking lines between them. Amongst two controllers, primary controller is given the higher priority for accessing the external memory as it is responsible for data generation. So, whenever the primary controller wants to read/write the data in external memory it can do so and indicate the secondary controller by setting the HANDSHAKING_LINE1. Secondary controller needs to check the HANDSHAKING_LINE1 before initiating any read process. If the HANDSHAKING_LINE1 is SET, it means that external memory is being accessed by primary controller and secondary controller needs to wait. Once the HANDSHAKING_LINE1 is RESET, secondary controller can now read the data from external memory. Before initiating any read, secondary controller indicates the primary controller that external memory read access is required. It does so by setting HANDSHAKING_LINE2. If primary controller needs to access the memory at this time, it can respond to secondary controller by setting the HANDSHAKING_LINE1. If HANDSHAKING_LINE1 is SET by primary controller, secondary controller RESETS HANDSHAKING_LINE2 and waits till primary controller’s operation is complete. If HANDSHAKING_LINE1 is not SET by primary controller in response to secondary controller’s request, then secondary controller can read the data from external memory. Once read is complete, it can RESET HANDSHAKING_LINE2.
[0031] Thus, using shared memory architecture with multi-master approach the dependency of one controller on the other is removed and both can access the data independently. If any one of the controllers fail due to any reason (hardware or firmware), the other controller can still read the data from memory and can provide protection functionality till the user is able to take a shutdown for trip unit replacement.
[0032] Modern day electronic trip units not only provide protection against various types of faults such as over / under current, voltage, frequency etc. but can also provide smart communication for data sharing, user interface and self-healthiness check functionalities. User can read as well as modify protection settings as per the load connected. Electronic trip units have the provision of logging the date and timestamp of settings change and it can also maintain previous settings done by the user thus providing setting change traceability.
[0033] Whenever fault occurs, alarm, pickup and trip log events with timestamp can be stored in the non-volatile memory of the electronic trip unit so that user can read them to trace the cause the fault. Trip log can include source of fault, settings of tripping protection, various phase currents, voltages, system frequency etc. at the time of tripping. It can also store sample values of few cycles before tripping and few cycles after tripping so that the user can the load behaviour before and after tripping.
[0034] All of the data mentioned above can be read using the local user interface on the electronic trip unit or it can be taken on mobile phone using communication such as NFC or Bluetooth. The data can also be communicated to remote systems using industry communication protocols such as MODBUS, IEC61850 etc.
[0035] Electronic trip units can run different self-healthiness check algorithms to make sure that components/mechanical interfaces required for breaker operation are operational. In case of any abnormality user can be pre-warned using LED indications or alarms so that timely maintenance can be scheduled. ETUs are also capable of performing predictive analysis where based upon previous events stored in the non-volatile memory it can suggest the user of different causes which have created a fault in the past. This requires generating and storing large amount of metering data, event logs etc. in the non-volatile memory so that analysis done is accurate.
[0036] Hence to meet above requirements, electronic trip units are designed with multiple controller architecture. Primary controller is usually responsible for sensing the faults, issuing trip command, generating, and storing the event logs whereas secondary controller can be used for communicating with external world. Primary controller can provide user interface where metering, settings, events etc. can be displayed on graphical display whereas the secondary controller can provide backup/redundant protection functionality. Redundant protections are provided in case the primary controller fails due to any reason (hardware or firmware).
[0037] Redundant protections may include basic current based protections such as overload, short circuit, instantaneous or may include all the protection functionality offered by primary controller. Hence the secondary controller functions with the same set of protection settings which are configured by the user and can issue trip command in case of fault if primary controller fails to do so. Therefore, the secondary controller should have access to all the event logging, ETU settings, metering data etc. generated by primary controller and stored in non-volatile memory.
[0038] Non-volatile memory can be a type of internal data flash memory such that it needs to be accessed via primary controller. Or it can be an external memory such as EEPROM, FRAM or data flash which is accessible to both primary as well as secondary controller. The present invention proposes a shared memory architecture where an external memory is accessible to both primary and secondary controller. Primary controller is responsible for data generating and storing whereas the secondary controller can read the data from shared memory as and when required. Thus, there is no dependency of secondary controller on primary controller for reading the data. This reduces the response time whenever data is queried from SCADA as the request for data read is not routed via primary controller. In case the primary controller fails, the secondary controller can still read all the event logs, protection settings etc. from the external memory and communicate the same on SCADA. The architecture is shown in Fig. 1.
[0039] The present invention suggests a multi-master architecture for data sharing where both primary and secondary controller are master and external memory is slave. Both primary and secondary controllers are connected to external memory via serial bus which can be SPI or I2C communication based. Primary and secondary controller’s external memory access is synchronized via handshaking lines between them.
[0040] Whenever primary or secondary controller want to access the memory, chip select pin on the memory IC is pulled LOW. In order to avoid contention by two controllers, the chip select driving port pins of the two controllers are ANDED. Similarly, the MOSI lines of both primary and secondary controller are ANDED to make sure that the state of other controller’s MOSI line in unused condition does not interfere with other controller’s communication. Since primary and secondary controllers are master and external memory is slave, hence the clock for data communication is controlled by controllers. Clock signal for data read/write from external memory is controlled by primary controller using a 2:1 mux and a CLOCK_CONTROL pin. Whenever the primary controller wants to read/write data from/to external memory, it SETS the CLOCK_CONTROL pin. When CLOCK_CONTROL pin is SET, clock signal from primary controller is given to external memory. By default, the CLOCK_CONTROL pin is LOW and the clock signal from secondary controller is connected to external memory. This makes sure that even if the primary controller fails, the secondary controller’s clock signal is provided to external memory and it can read data from memory. Hardware interface for the same is shown in Fig. 2.
[0041] Amongst two controllers, primary controller is given the higher priority for accessing the external memory as it is responsible for data generation. So, whenever the primary controller wants to read/write the data in external memory it can do so and indicate the secondary controller by setting the HANDSHAKING_LINE1 (Ref. Fig. 3). Secondary controller needs to check the HANDSHAKING_LINE1 before initiating any read process. If the HANDSHAKING_LINE1 is SET, it means that external memory is being accessed by primary controller and secondary controller needs to wait. Once the HANDSHAKING_LINE1 is RESET, secondary controller can now read the data from external memory. Before initiating any read, secondary controller indicates the primary controller that external memory read access is required. It does so by setting HANDSHAKING_LINE2. If primary controller needs the memory access at this time, it can respond to secondary controller by setting the HANDSHAKING_LINE1. If HANDSHAKING_LINE1 is SET by primary controller, secondary controller RESETS HANDSHAKING_LINE2 and waits till primary controller’s operation is complete. If HANDSHAKING_LINE1 is not SET by primary controller in response to secondary controller’s request, then secondary controller can read the data from external memory. Once read is complete, it can RESET HANDSHAKING_LINE2 to indicate primary controller that external memory is now free.
[0042] Therefore, with above mentioned architecture the dependency of one controller on the other is removed and both can access the data independently. If any one of the controllers fail due to any reason (hardware or firmware), the other controller can still read the data from memory and can provide protection functionality.
[0043] Thus, the patent suggests an architecture which provides redundancy to any kind of primary controller failure using shared external memory and dual controllers.

ADVANTAGES OF THE INVENTION
[0044] The present invention provides a multi-controller architecture with shared memory for load sharing between controller, redundancy for protection, ease of data management and reduction in communication latency.
[0045] The present invention provides a multiple controller based electronic trip unit such that basic functionality of providing protection against faults is uncompromised.
[0046] The present invention provides an electronic trip unit which can communicate with SCADA and share data on mobile app using smart communication protocols such NFC, Bluetooth, IEC61850 etc.
[0047] The present invention provides an electronic trip unit which can also run various machine learning algorithms which can predict breakers health, source of faults on-line etc.
[0048] The present invention provides a dual controller-based design which can provide protection even if one of the two controllers fail due to any reason. Thus, it adds reliability in the design by providing redundant protections in secondary controller such that failure of one controller does not impact the functioning of basic protections.