Abstract: A two-stage operational amplifier (OpAmp) configured in UMC 0.18 urn CMOS integrated circuits in the unity gain close-loop configuration; the said OpAmp comprising: an input stage having a plurality of transistors; an output stage having another plurality of transistors; wherein the gate-to-source voltages of any two transistors (M1, M2) of the input stage are configured to be equal by adding an extra capacitor to one of the said two transistors (M1, M2) for reducing the EMI-induced offset and the said extra capacitor being frequency dependent, the EMI-induced offset is very low for all mid-range EMI frequencies between 1 MHz to 1 GHz. The EMI resisting OpAmp is configured for reducing the EMI-induced offset and the EMI sensitive OpAmp is configured for increasing the EMI-induced offset. The EMI immune OpAmp is deployed in EMI-immune analog circuits/ICs and EMI sensitive OpAmp is deployed for measuring EMI in the environment. Figure 8
FORM - 2
THE PATENTS ACT, 1970
(39 of 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION (See section 10 and rule 13)
Title:
AN EMI RESISTING OPERATIONAL AMPLIFIER AND AN EMI SENSITIVE OPERATIONAL AMPLIFIER.
Applicant : IITB MONASH RESEARCH ACADEMY Nationality: INDIAN Address : IIT Bombay
Powai, Mumbai 400 076, India
THE FOLLOWING SPECIFICATION PARTICULARLY DESCRIBES THE INVENTION AND THE MANNER, IN WHICH IT IS TO BE PERFORMED
FIELD OF INVENTION
The present invention relates to an Operational Amplifier (OpAmp). In particular, the present invention relates to make an OpAmp Electromagnetic Interference (EMI) immune to a wide range of frequencies. More particularly, the present invention relates to an EMI resisting OpAmp for circuits requiring constant DC bias voltage even under the presence of EMI.
BACKGROUND OF THE INVENTION
Electronic appliances have become a part of daily life, and their usage is increasing at an exponential rate. Because of this, immunity to EMI is an important design constraint in modern integrated circuits (IC). This work focusses on improving EMI immunity of OpAmps, since these OpAmps are particularly sensitive to EMI signals1.
The OpAmp2 uses inner and outer differential pairs, in which the inner differential pair is made immune to EMI by using an RC filter, which is then used to bias the outer differential pair.
This approach interrupts the propagation of EMI through the current mirror load, thus reduces the EMI-induced offset. However, it also significantly reduces the unity gain frequency, which in turn reduces the usable bandwidth of the OpAmp. The OpAmp3 is a modified version of OpAmp2. OpAmp3 has a better EMI-immunity and frequency characteristics than OpAmp2.
The Miller operational amplifier or simply OpAmp is a high gain, DC coupled amplifier, which is designed to be used with negative feedback for precisely defining a closed-loop transfer function. It has a differential input and normally a single-ended output.
Due to a negative feedback, the OpAmp circuit characteristics, for example- gain, input and output impedance, bandwidth etc. thereof, are determined by external components. These characteristics hardly depend on the temperature coefficients or manufacturing variations in the OpAmp itself.
The main characteristics of an OpAmp are as given below:
• Sufficiently large gain (determined by the signal processing accuracy),
• Differential inputs,
• Frequency characteristics allowing stable operation on applying a negative feedback,
• High-input / Low-output impedance, and
• High-speed / frequency.
Such OpAmp produces an output potential (relative to circuit ground) typically of hundreds of thousands of times larger than the potential difference between the input terminals thereof. Operational amplifiers originated in analog computers to be used for performing complex mathematical operations in many linear, non¬linear and frequency-dependent circuits. OpAmp is popular as building blocks in analog circuits because of its versatility.
OpAmps are the most widely used electronic devices, being used in a vast array of consumer, industrial, and scientific devices, for example- in signal processing circuits, control circuits, and instrumentation.
For example, aircraft control systems contain sensors for sampling environmental data, avionics systems performing flight relevant control functions and actuators controlling rudder or flap movements. Modern aircrafts are also equipped with numerous enhanced functions, like flight control and guidance systems which provide flight critical functions. These aircrafts also contain assistance services which are not critical to maintain their airworthiness, however which reduce the workload of the crew.
Due to the ever-expanding number of on-board electronics, the amount of data to be exchanged between different avionics subsystems, often, there are disruptions caused due to the EMI.
DISADVANTAGES WITH THE PRIOR ART
The following are the disadvantages with the existing OpAmps discussed above in details:
• Existing OpAmps cannot be used to measure EMI in the environment.
• EMI induced offset often hampers the working of subsequent circuits in the chain.
• Existing OpAmps are not sensitive enough.
• Existing OpAmps are susceptible to change of operating points thereof.
Until now, researchers have focused on the open-loop offset analysis to predict the closed-loop offset behavior of the Miller OpAmp4,5. Although, this approach is well suited to very high frequencies (>>unity gain frequency), statistically it falls short for mid-range frequencies. Since the gain is not very low at these frequencies, the open-loop model cannot predict the closed-loop offset behavior.
Therefore, there is an existing need for developing different OpAmp structures having a quasi-zero offset. This can be done by ascertaining the behavior of the Miller OpAmp in a closed loop by presenting a deviation of the EMI-induced offset and bv usina the closed-loop analysis of the Miller ODAITID
OBJECTS OF THE INVENTION
Some of the objects of the present invention - satisfied by at least one embodiment of the present invention - are as follows:
An object of the present invention is to provide an operational amplifier, which resists EMI.
Another object of the present invention is to provide an operational amplifier, which is highly sensitive.
Still another object of the present invention is to provide an operational amplifier, which can be used for circuits requiring constant DC bias voltage even under the presence of EMI.
Yet another object of the present invention is to provide an operational amplifier, which is immune to electromagnetic interference in a wide range of frequencies.
These and other objects and advantages of the present invention will become more apparent from the following description, when read with the accompanying figures of drawing, which are however not intended to limit the scope of the present invention in any way.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a two-stage operational amplifier (OpAmp) configured in UMC 0.18 pm CMOS integrated circuits in the unity gain close-loop configuration; the said OpAmp comprising:
• an input stage having a plurality of transistors (M1 - M5);
• an output stage having another plurality of transistors (M6 - M7);
wherein the gate-to-source voltages of any two transistors (M1, M2) of the input stage are configured to be equal by adding an extra capacitor to one of the said two transistors (M1, M2) for reducing the EMI-induced offset and the said extra capacitor being frequency dependent.
Typically, a compensation network of resistance and capacitance (Rz+Cc) is deployed for using the output stage as operational transconductance amplified in a feedback loop.
Typically, the input transfer functions or gate-source voltages of the said two input stage transistors (M1, M2) is made equal by adding an extra compensatory resistor-capacitor combination (R1, C1, C2) across the gate to source of one of the said two transistors (M1, M2) for obtaining a zero EMI-induced offset.
Typically, the EMI-induced offset is very low for all mid-range EMI frequencies between 1 MHz to 1 GHz.
Typically, the EMI-induced offset voltage is expressed as:
where,
Typically, an EMI resisting OpAmp is configured by making and
for reducing the EMI-induced offset.
Typically, the gate to source voltage of transistors M1 and M2 is given by the
equation:
where,
= gate-to-source voltage of M1
= gate-to-source voltage of M2
= input ac voltage
= gate source capacitance,
= tail capacitance, and
= time
Typically, the said operational amplifier (OpAmp) is an EMI resisting OpAmp and comprises an input operational amplifier stage comprising five metal oxide semiconductor (MOS) transistors (M1, M2, M3, M4, M5) and an output stage comprising two (MOS) transistors (M6, M7) and the compensation network of resistance and capacitance (Rz+Cc) is deployed in the circuit for using the output stage as operational transconductance amplified in a feedback loop.
Typically, the difference between the input transfer function of the said transistors M1 and M2 are increased by addition of an extra compensatory capacitor CEXT across gate to source of the transistor M1
Typically, the value of capacitor CEXT is a function of the sensitivity towards the frequency of the OpAmp circuit.
Typically, the increase in the value of the capacitance of the capacitor CEXT increases the sensitivity towards the frequency of the OpAmp circuit.
Typically, the value of CEXT is given by the equation:
where,
= gate source capacitance of transistor M2, and
= gate source capacitance of transistor M1.
Typically, the EMI immune OpAmp is deployed in EMI-immune analog circuits or integrated circuits (ICs).
Typically, an EMI sensitive OpAmp is configured by increasing the difference
between by using a capacitor for increasing the EMI-
induced offset.
Typically, an EMI sensitive OpAmp is deploy for measuring EMI in the environment.
BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS
The present invention will be briefly described with reference to the accompanying drawings, wherein:
Figure 1 shows a schematic circuit diagram of the Miller OpAmp.
Figure 2 shows a graphical representation of the offset variation with EMI frequency for EMI amplitude of 0.8 Vpp.
Figure 3 shows a graphical representation of the offset variation with EMI amplitude.
Figure 4 shows a graphical representation of the corner frequency estimation in the frequency range of 1 MHz to 10 MHz.
Figure 5 shows a schematic circuit diagram of the input stage of the Miller OpAmp with CeXl.
Figure 6 shows a graphical representation of Cext versus frequency for an input amplitude of Vpp and Vos - 0.5 mV.
Figure 7 shows a schematic circuit diagram of the input stage of the Miller OpAmp with RC network.
Figure 8 shows a schematic circuit diagram of the proposed OpAmp I configured in accordance with the present invention.
Figure 9 shows a graphical representation of the EMI induced offset variation for the proposed OpAmp I for the offset (mV) versus frequency (MHz).
Figure 10 shows a schematic circuit diagram of the EMI sensitive OpAmp configured in accordance with the present invention.
Figure 11 shows a graphical representation of the EMI induced offset variation versus frequency for the EMI sensitive OpAmp of Fig. 10.
DETAILED DESCRIPTION OF THE ACCOMPANYING DRAWINGS
In the following, the EMI sensitive OpAmp configured in accordance with the present invention will be described in the following in more details with reference to the accompanying drawings without limiting the scope and ambit of the present invention in any way.
Figure 1 shows a schematic circuit diagram of the Miller OpAmp. The first stage is considered only for deriving the offset relations, because the offset voltage is determined mainly by this stage.
The output offset current of the first stage is given byTherefore, the
input offset voltage is given by
Since in a unity gain configuration, the output offset voltage (VOS) is equal to the input offset voltage By ignoring the channel length
modulation, the current flowing through M1 and M2 can be written as:
Consider an input signal of frequency and amplitude A. The response of the circuit to this input is approximated using the following quasi-linear analysis.
Let,
Then, the EMI-induced offset voltage is expressed as:
where, (w) and are the transfer functions from input to of
transistors M1 and M2, respectively.
This is a generic offset expression which depends on the input transfer function HgS1 and Hgs2. To derive Hgs1 (w) and Hgs2 (w) in the unity gain configuration, only the output resistance of the tail transistor M5 is considered for the sake of simplicity. Consider a first-order closed- loop OpAmp model that has a 90-degree phase margin, that is, Avf{s) - 1/(1 + s/wu) Solving small signal equations results in:
(2)
where,
Rewriting (1) using (2) and (3) results in:
where,
Using the generic offset expression, an offset expression is derived for the unity gain configuration of the Miller OpAmp which is the main object of this invention.
Figure 2 shows a graphical representation of the comparison of the simulation of the offset variation plotted against the EMI frequency from 1 MHz to 1 GHz for an EMI amplitude of 0.8 Vpp. This shows a comparison of the EMI-induced offset between the model and simulation results. The Miller OpAmp is designed in UMC 0.18 pm CMOS technology with a 1.8 V supply voltage to achieve a gain of more than 60 dB, a phase margin (PM) of more than 70 and a unity gain frequency (UGF) of more than 30 MHz. The W/L ratios of all the transistors are designed to meet the
target specifications. The frequency compensation is provided by the Rz and Cc with values of 2.62 KE> and 650 fF respectively, and a capacitive load of 2 pF. The resulting specifications of the designed OpAmp are a gain of 63 dB, a PM of 75 and a UGF of 34 MHz. In order to perform offset simulations, the Miller OpAmp is connected in a unity gain configuration because it exhibits the worst offset performance1.
Figure 3 shows a graphical representation of the offset variation with EMI amplitude from 0.1 Vpp to 0.8 Vpp for two simulation EMI frequencies of 500 MHz and 1 GHz. It is observed from these figures that the model predicts the offset trend.
Figure 4 shows a graphical representation of the corner frequency estimation in the frequency range of 1 MHz to 10 MHz. The corner frequencies are defined as the points at which the offset starts to rise significantly. Here, the offset and its first derivative with respect to the frequency are shown, it is observed that there are three stationary points for the first derivative in the frequency range of 1 MHz to 10 GHz. Here, the corresponding frequencies with local maxima are shown as OJ, and w/r The corner frequency u)c is estimated through the intersection of the tangents to at iof and u)„. Here, capacitances are neglected in the derivation
of For the derivation of the tail resistance is assumed to be
very large. Accordingly, oj/ and wh are obtained as follows:
The expression for wc is obtained by using (4), as follows.
where,
Figure 5 shows a schematic circuit diagram of the Miller OpAmp with Cext added in accordance with the present invention. As derived6, at high frequencies
assuming that the gate-source capacitances of M1 and M2 are equal = the gate to source voltages of M1 and M2 can be written as follows:
This is the motivation for adding a capacitor. Since to get zero offset, the gate is to be made equal to source voltages of M1 and M2 (vgsl and vgs2). It can be observed that this can be achieved by adding an extra capacitor CT to the numerator of vgs2. This is possible only at high frequencies. As is evident from (1), in order to reduce the offset, the gate-to-source voltages of M1 and M2 should be equal. This can be achieved by adding an extra capacitor, CT, to transistor M2. For mid-range frequencies, this extra capacitance changes because the gain is not very low. Let where, is the extra capacitor between the gate-to-
source of transistor M2. Solving where V0 is the maximum
acceptable voltage and is independent of frequency, Cext (w) is obtained as follows:
where, OJC is the threshold frequency at which
This equation shows the capacitance required at each frequency and that the capacitance should be frequency dependent which in practice very hard to implement.
Figure 6 shows a graphical representation of Cexl versus frequency for an input amplitude of 0.8 Vpp and V0s = 0.5 mV. As observed from (7) above, Cext is frequency dependent. Here, the desired Cex,is shown as a function of frequency for the designed Miller OpAmp for Vos = 0.5 mV. Here, it is shown, how the above frequency dependent capacitance can be implemented using C1 and R1 itself.
Figure 7 shows a schematic circuit diagram of the input stage of the Miller OpAmp with RC network to realize frequency dependent CQXt (w > UJC). In order to emulate the frequency dependent Cext, here an RC network is used, which is connected between the gate and the source of transistor M2. Rewriting the Vos expression for the Miller OpAmp with R1, C1 and equating it with zero results in a solution in which both Ri and C1 are frequency independent, as given below:
Using R-\ directly across the gate-to-source of M2 reduces the input impedance. This problem is mitigated by using an extra capacitor Ci in the series to R*. C2
is chosen such that at f = 1GHz, the capacitive impedance is
negligible when compared to RL Using R1 reduces the input impedance which is a disadvantage. So, to mitigate this effect we use C2 in series to R1.
Figure 8 shows a schematic circuit diagram of the first embodiment of the OpAmp configured in accordance with the present invention. Here, Noise due to R1 does not have any effect on the signal band because the frequency
is greater than the signal band of interest. Usage of R1, C1, and
C2 across M2 is the innovative part. Using the model to get the values is also the innovative part.
Figure 9 shows a graphical representation of the EMI induced offset variation (mV) versus frequency (MHz) for the first embodiment of the OpAmp configured in accordance with the present invention. It is observed here that the offset is very low for all the EMI frequencies (1 MHz to 1 GHz). EMI sensitive OpAmp is an exact opposite of EMI resisting OpAmp. Here we want the EMI-induced offset to be more.
Figure 10 shows a schematic circuit diagram of the second embodiment of the EMI sensitive OpAmp configured in accordance with the present invention. In the first embodiment of an EMI resisting OpAmp, the values [Hgs1(w)| and \HgS2(w)\ are made equal to reduce the EMI induced offset. However, in contrast to the first embodiment, in the second embodiment here, the difference between |Wga1(w)| and |/-/gs2Ml must be increased to get high EMI induced offset. This is achieved by creating asymmetry using a simple capacitor. Further, this is achieved by making the difference between the transfer functions Hgs1 and Hgs2. This can be done by using an extra capacitor across gate to source of M1 transistor. Usage of Ccxl is the innovative part at across M1 is the innovative part.
Figure 11 shows a graphical representation of the EMI induced offset variation versus frequency for the EMI sensitive OpAmp of Fig. 10 having an EMI sensitive OpAmp circuit. To get a more specific EMI induced offset behavior, different passive networks can also be used. This graph shows how the effect of different values of Coxt- It can be observed that higher the value better is the sensitivity to the frequency.
POTENTIAL APPLICATIONS OF THE INVENTION
EMI Resisting OpAmps are a subset of the circuit modules required in the electronic ICs used in various industries such as automotive industry, healthcare monitoring and instrumentation and measurement and are mostly used in the circuits which need precise output voltage.
Aircraft control systems contain sensors which sample environmental data, avionics systems performing flight relevant control functions and actuators which control rudder or flap movements. Modern aircrafts are also equipped with numerous enhanced functions, like flight control and guidance systems which provide flight critical functions. Also, they contain assistance services that are not critical to maintain airworthiness, but reduce the workload of the crew.
As the amount of on-board electronics expands, so does the amount of data that is exchanged between avionics subsystems. Therefore, to avoid possible disruptions caused by EMI, the EMI Immune or EMI Resisting OpAmpsmade in accordance with the present invention could be a preferred choice.
Furthermore, an emerging and quickly growing aircraft data network is the Avionics Full Duplex Switched Ethernet (AFDX), the electrical and protocol specifications of which are defined in the ARINC 664 and the IEEE 802.3 standards. AFDX is based upon Ethernet and uses differential signaling, however, the existing AFDX implementations use outdated technology bases instead of state-of-the-art hardware and copper cabling is still predominant (e.g. in Airbus A380s and A350s networks) while the optical cabling is mostly used for the high-speed interconnection backbones. Of course, these copper cables act as antennas resulting in conductive EMI injection in the AFDX transceiver modules.
Although, twisted pair cables are immune to magnetic coupling, electrical fields exert a similar influence on both wires resulting in common-mode noise pick up, and in case it is considerable, this noise can swamp the receiver or the transmitter output. Additionally, a fiber optic cable will not pick up EMI, however, EMI is received in the electrical tracks, routing, lead frame and bond wires of the AFDX transceiver modules. Therefore, EMI Immune or EMI Resisting OpAmps could be successfully used here as well.
EMI sensitive OpAmps can also be used in a wearable device, e.g. a pacemaker, which may not otherwise work properly due to the EMI. In such situations, the patient can be made aware of the surrounding EMI using this wearable.
TECHNICAL ADVANTAGES AND ECONOMIC SIGNIFICANCE
The EMI sensitive OpAmp configured in accordance with the present invention can advantageously be used in:
• Semiconductor IC industries such as Analog Devices, NXP, Tl and Maxim Integrated Circuits.
• OEM companies and R&D labs according to cater to specific IC requirements using in EMI-immune analog circuits.
• EMI-immune analog ICs for various electronic modules of the vehicles.
• Instrumentation ICs of healthcare industry for providing EMI-immune precise instrumentation amplifiers.
• In wearable / implantable devices such as pacemakers.
• In system level realization of the abovementioned instruments using off-the-shelf components.
We claim:
1. A two-stage operational amplifier (OpAmp) configured in UMC 0.18 urn
CMOS integrated circuits in the unity gain close-loop configuration; the said
OpAmp comprising:
• an input stage having a plurality of transistors (M1 - M5);
• an output stage having another plurality of transistors (M6 - M7);
wherein the gate-to-source voltages of any two transistors (M1, M2) of the input stage are configured to be equal by adding an extra capacitor to one of the said two transistors (M1, M2) for reducing the EMI-induced offset and the said extra capacitor being frequency dependent.
2. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein a compensation network of resistance and capacitance (Rz+Cc) is deployed for using the output stage as operational transconductance amplified in a feedback loop.
3. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein the input transfer functions or gate-source voltages of the said two input stage transistors (M1, M2) is made equal by adding an extra compensatory resistor-capacitor combination {R1, C1, C2) across the gate to source of one of the said two transistors (M1, M2) for obtaining a zero EMI-induced offset.
4. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein the EMI-induced offset is very low for all mid-range EMI frequencies between 1 MHz to 1 GHz.
5. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein
the EMI-induced offset voltage is expressed as:
where,
= Output offset voltage,
= Amplitude,
= frequency of input signal,
= Output offset current (los) of the first stage,
= transconductance of transistors M1 and M2
= µn Cox(W/L)
Transfer function from input to Vgs of Transistor M1, and Transfer function from input to Vgs of Transistor M2.
6. Two-stage operational amplifier (OpAmp) as claimed in claim 5, wherein
an EMI resisting OpAmp is configured by making and for
reducing the EMI-induced offset.
7. Two-stage operational amplifier (OpAmp) as claimed in claim 6, wherein
the gate to source voltage of transistors M1 and M2 is given by the equation:
where,
= gate-to-source voltage of M1
= gate-to-source voltage of M2
= input ac voltage
= gate source capacitance,
= tail capacitance, and
= time
8. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein the said operational amplifier (OpAmp) is an EMI resisting OpAmp and comprises an input operational amplifier stage comprising five metal oxide semiconductor (MOS) transistors (M1, M2, M3, M4, M5) and an output stage comprising two (MOS) transistors (M6, M7) and the compensation network of resistance and capacitance is deployed in the circuit for using the output stage as
operational transconductance amplified in a feedback loop.
9. Two-stage operational amplifier (OpAmp) as claimed in claim 1, wherein
the difference between the input transfer function of the said transistors M1 and
M2 are increased by addition of an extra compensatory capacitor CEXT across
gate to source of the transistor M1
10. Two-stage operational amplifier (OpAmp) as claimed in claim 9, wherein
the value of capacitor CEXT is a function of the sensitivity towards the frequency
of the OpAmp circuit.
11. Two-stage operational amplifier (OpAmp) as claimed in claim 10, wherein the increase in the value of the capacitance of the capacitor CEXT increases the sensitivity towards the frequency of the OpAmp circuit.
12. Two-stage operational amplifier (OpAmp) as claimed in claim 11, wherein the value of CEXT is given by the equation:
where,
= gate source capacitance of transistor M2, and = gate source capacitance of transistor M1.
13. Two-stage operational amplifier (OpAmp) as claimed in anyone of the claims 1 to 14, wherein the EMI immune OpAmp is deployed in EMI-immune analog circuits or integrated circuits (ICs).
14. Two-stage operational amplifier (OpAmp) as claimed in claim 5, wherein an EMI sensitive OpAmp is configured by increasing the difference between
by using a capacitor for increasing the EMI-induced offset.
15. Two-stage operational amplifier (OpAmp) as claimed in claim 14, wherein an EMI sensitive OpAmp is deploy for measuring EMI in the environment.
| # | Name | Date |
|---|---|---|
| 1 | Power of Attorney [17-05-2017(online)].pdf | 2017-05-17 |
| 2 | Form 1 [17-05-2017(online)].pdf | 2017-05-17 |
| 3 | Drawing [17-05-2017(online)].pdf | 2017-05-17 |
| 4 | Description(Complete) [17-05-2017(online)].pdf_50.pdf | 2017-05-17 |
| 5 | Description(Complete) [17-05-2017(online)].pdf | 2017-05-17 |
| 6 | Form 3 [18-05-2017(online)].pdf | 2017-05-18 |
| 7 | Assignment [18-05-2017(online)].pdf | 2017-05-18 |
| 8 | 201721017315-Proof of Right (MANDATORY) [09-02-2018(online)].pdf | 2018-02-09 |
| 9 | Abstract1.jpg | 2018-08-11 |
| 10 | 201721017315-OTHERS [30-12-2021(online)].pdf | 2021-12-30 |
| 11 | 201721017315-EDUCATIONAL INSTITUTION(S) [30-12-2021(online)].pdf | 2021-12-30 |
| 12 | 201721017315-FORM 18 [31-12-2021(online)].pdf | 2021-12-31 |
| 13 | 201721017315-RELEVANT DOCUMENTS [14-01-2022(online)].pdf | 2022-01-14 |
| 14 | 201721017315-POA [14-01-2022(online)].pdf | 2022-01-14 |
| 15 | 201721017315-FORM 13 [14-01-2022(online)].pdf | 2022-01-14 |
| 16 | 201721017315-FORM-8 [24-02-2022(online)].pdf | 2022-02-24 |
| 17 | 201721017315-FER.pdf | 2022-08-03 |
| 18 | 201721017315-OTHERS [03-02-2023(online)].pdf | 2023-02-03 |
| 19 | 201721017315-FER_SER_REPLY [03-02-2023(online)].pdf | 2023-02-03 |
| 20 | 201721017315-DRAWING [03-02-2023(online)].pdf | 2023-02-03 |
| 21 | 201721017315-COMPLETE SPECIFICATION [03-02-2023(online)].pdf | 2023-02-03 |
| 22 | 201721017315-CLAIMS [03-02-2023(online)].pdf | 2023-02-03 |
| 23 | 201721017315-ABSTRACT [03-02-2023(online)].pdf | 2023-02-03 |
| 24 | 201721017315-PatentCertificate12-04-2024.pdf | 2024-04-12 |
| 25 | 201721017315-IntimationOfGrant12-04-2024.pdf | 2024-04-12 |
| 1 | searchstrategy201721017315E_01-08-2022.pdf |