Claims:We Claim:

1. An integrated circuit for providing a temperature compensation technique for PbSe detector, comprising:
at least two PbSe detectors, a primary PbSe detector and a secondary PbSe detector, wherein the primary PbSe detector is the main detector and the secondary PbSe is blackened, wherein when operating with wide temperature range, the dark resistance is generated from the secondary PbSe which will compensate the variation with respect to temperature.
2. The circuit as claimed in claim 1, wherein the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same.
3. The circuit as claimed in claim 1, wherein when an IR signal is applied to the primary PbSe, the output will go high and the secondary PbSe detector output will not vary, and in absence of the IR signal, the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same, the primary PbSe detector output will go high.
4. The circuit as claimed in claim 1, further includes a differential amplifier which is connected to the primary and the secondary PbSe detector, where the output of the primary PbSe is connected to the +ve pin of the differential amplifier through a first buffer, and output of the secondary PbSe detector is connected to the -ve pin of the differential amplifier through a second buffer.

5. The circuit as claimed in claim 1, wherein the output of the differential amplifier is connected to an amplifier which will add the gain and final output can be set.
6. The circuit as claimed in claim 1 is operated in both pulsed mode as well ascontinuous mode of operation.
7. The circuit as claimed in claim 5, wherein the output of the amplifier is connected to a comparator to compare with a predefined reference voltage, and when the amplifier output will cross the reference voltage the final output will be available, otherwise it will be zero.
8. The circuit as claimed in claim 1 is adapted to compensate at least one dependence of at least one signal of the PbSe detector on at least one parameter selected from the group consisting of: humidity, exposure to contaminants, illumination history, and temperature.
9. The circuit as claimed in claim 1 comprises at least one voltage source adapted to apply the input voltage signal across the PbSe detectors and at least one voltage output at which at least one output signal is determinable.
10. A detector, comprising:
a temperature compensation circuit including at least two PbSe detectors, a primary PbSe detector and a secondary PbSe detector, the primary PbSe detector is the main detector and the secondary PbSe is blackened,
a differential amplifier which is connected to the primary and the secondary PbSe detector, where the output of the primary PbSe is connected to the +ve pin of the differential amplifier through a first buffer, and output of the secondary PbSe detector is connected to the -ve pin of the differential amplifier through a second buffer;
an amplifier for receiving the output of the differential amplifier in order to add the gain and set the final output; and
a comparator connected with the amplifier to compare with a predefined reference voltage, and when the amplifier output will cross the reference voltage the final output will be available, otherwise it will be zero,
wherein when an IR signal is applied to the primary PbSe, the output will go high and the secondary PbSe detector output will not vary, and in absence of the IR signal, the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same, the primary PbSe detector output will go high.

Bangalore RANI MADANAN
4 May 2021 (INTELLOCOPIA IP SERVICES)
AGENT FOR APPLICANT

, Description:DETAILED DESCRIPTION OF THE INVENTION
For the purpose of promoting an understanding of the principles of the invention, reference will now be made to the embodiment illustrated in the figures and specific language will be used to describe the same. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended, such alterations and further modifications in the illustrated system, and such further applications of the principles of the invention as illustrated therein being contemplated as would normally occur to one skilled in the art to which the invention relates.
Referring to FIG. 1 which shows an integrated circuit for providing a temperature compensation technique for PbSe detector, in accordance with one embodiment of the present invention. The circuit are electrically connected by one or more section which includes a PbSe detector section, a buffer section, a differential amplifier section, an amplifier section and a comparator section. The PbSe detector section has two PbSe detector, a primary PbSe detector and a secondary PbSe detector, the primary PbSe detector is the main detector and the secondary PbSe is blackened. In an embodiment, when operating with wide temperature range,the dark resistance is generated from the secondary PbSe which will compensate the variation with respect to temperature. The differential amplifier section which is connected to the primary and the secondary PbSe detector, where the output of the primary PbSe is connected to the +ve pin of the differential amplifier through a first buffer, and output of the secondary PbSedetector is connected to the -ve pin of the differential amplifier through a second buffer. The output of the differential amplifier is connected to the amplifier section which will add the gain and final output can be set. Further, the output of the amplifier section is connected to the comparator section to compare with a predefined reference voltage, and when the amplifier output will cross the reference voltage the final output will be available, otherwise it will be zero.
In an operation, when an IR signal is applied to the primary PbSe, the output will go high and the secondary PbSe detector output will not vary, and in absence of the IR signal, the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same, the primary PbSe detector output will go high. In an embodiment, the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same.At least one voltage source adapted to apply the input voltage signal across the PbSe detectors and at least one voltage output at which at least one output signal is determinable.The circuit is adapted to compensate at least one dependence of at least one signal of the PbSe detector on at least one parameter selected from the group consisting of: humidity, exposure to contaminants, illumination history, and temperature. Moreover, the circuit is capable of operating in both pulsed mode as well as continuous mode of operation. In an example embodiment, the PbSe detector with 2 PbSe detector+ 1 in built IR LED in a single package is used.
In another embodiment of the present invention is a detector which includes, a temperature compensation circuit, a differential amplifier, an amplifier, and a comparator. The temperature compensation circuit including at least twoPbSe detector, a primary PbSe detector and a secondary PbSe detector, the primary PbSe detector is the main detector and the secondary PbSe is blackened. The differential amplifier which is connected to the primary and the secondary PbSe detector, where the output of the primary PbSe is connected to the +ve pin of the differential amplifier through a first buffer, and output of the secondary PbSe detector is connected to the -ve pin of the differential amplifier through a second buffer. The amplifier for receiving the output of the differential amplifier in order to add the gain and set the final output. And a comparator connected with the amplifier to compare with a predefined reference voltage, and when the amplifier output will cross the reference voltage the final output will be available, otherwise it will be zero. In operation, when an IR signal is applied to the primary PbSe, the output will go high and the secondary PbSe detector output will not vary, and in absence of the IR signal, the variation of the dark resistance of the both the primary PbSe detector and the secondary PbSe detector will be almost same, the primary PbSe detector output will go high.
Below are the tables (Table 1 and Table 2) which shows the output of the temperature cycling test (with pulse and with LED).

TEMPERATURE CYCLING TEST RESULTS (WITHOUT PULSE): TABLE 1

Temp
(?) PIN 1
(Main PbSe)
(V) PIN 7 (Blackened PbSe)
(V) PIN 8
(Differential Output)
(V) PIN 1
Amplifier Output (V) OUTPUT
(V)
-60 1.250 1.062 0.187 0.812 No Output,
as expected
-55 1.312 1.187 0.250 0.812 No Output,
as expected
-50 1.50 1.312 0.250 0.750 No Output,
as expected
-45 1.750 1.50 0.250 0.750 No Output,
as expected
-40 2.00 1.812 0.250 0.750 No Output,
as expected
-35 2.312 2.062 0.250 0.750 No Output,
as expected
-30 2.687 2.312 0.250 0.750 No Output,
as expected
-25 3.062 2.812 0.250 0.750 No Output,
as expected
-20 3.50 3.062 0.250 0.750 No Output,
as expected
-15 4.00 3.50 0.500 0.750 No Output,
as expected
-10 4.312 4.00 0.375 0.875 No Output,
as expected
-5 4.875 4.50 0.375 0.875 No Output,
as expected
0 5.50 5.187 0.250 0.687 No Output,
as expected,
+5 6.312 6.062 0.250 0.687 No Output,
as expected
+10 6.750 6.50 0.250 0.625 No Output,
as expected
+15 7.312 7.062 0.250 0.750 No Output,
as expected
+20 7.687 7.437 0.312 1.062 No Output,
as expected
+25 8.312 7.937 0.312 1.125 as expected
+30 8.750 8.50 0.250 0.625 No Output,
as expected
+35 9.375 9.00 0.375 0.687 No Output,
as expected
+40 9.625 9.312 0.312 0.625 No Output,
as expected
+45 10.00 9.687 0.312 0.875 No Output,
as expected
+50 10.375 10.125 0.250 0.750 No Output,
as expected
+55 10.750 10.50 0.250 0.500 No Output,
as expected
+60 11.062 10.812 0.312 0.500 No Output,
as expected

TEMPERATURE CYCLING TEST RESULTS (WITH LED): TABLE 2

Temperature
(?) PIN 1
(Main PbSe)
(V) PIN 7 (Blackened PbSe)
(V) PIN 8
(Differential Output)
(V) PIN 1
Amplifier Output (V) 0UTPUT
(V)
-60 11.50 1.0625 10.50 13.5 14.3
as expected
-55 11.750 1.250 10.437 13.5 14.3
as expected
-50 11.812 1.312 10.312 13.5 14.3
as expected
-45 11.875 1.562 10.25 13.5 14.3
as expected
-40 12.00 1.750 10.06 13.5 14.3
as expected
-35 12.00 2.00 10.00 13.5 14.3
as expected
-30 12.062 2.437 9.687 13.5 14.3
as expected
-25 12.12 2.687 9.312 13.5 14.3
as expected
-20 12.187 3.062 9.125 13.5 14.3
as expected
-15 12.312 3.500 8.812 13.5 14.3
as expected
-10 12.375 4.00 8.375 13.5 14.3
as expected
-5 12.375 4.375 7.937 13.5 14.3
as expected
0 12.375 5.187 7.312 13.50 14.3
as expected
+5 12.562 6.125 6.50 13.50 14.3
as expected
+10 12.562 6.562 6.125 13.625 14.3
as expected
+15 12.625 7.187 5.50 13.56 14.3
as expected
+20 12.750 7.50 5.187 13.00 14.3
as expected
+25 12.75 7.812 4.875 12.00 14.3
as expected
+30 12.687 8.375 4.312 10.125 14.3
as expected
+35 12.812 8.875 3.875 9.75 14.3
as expected
+40 12.812 9.250 3.50 8.625 14.3
as expected
+45 12.875 9.750 3.187 7.687 14.3
as expected
+50 12.937 10.125 2.5 6.812 14.3
as expected

It will be appreciated that whilst several different embodiments have been described herein, that the features of each may be advantageously combined together in a variety of forms to achieve advantage.
In the foregoing specification, the application has been described with reference to specific examples of embodiments. It will, however, be evident that various modifications and changes may be made therein without departing from the broader spirit and scope of the invention as set forth in the appended claims. For example, the connections may be any type of connection suitable to transfer signals from or to the respective nodes, units or devices, for example via intermediate devices. Accordingly, unless implied or stated otherwise the connections may for example be direct connections or indirect connections.
Because the circuit implementing the present invention is, for the most part, composed of electronic components and circuits known to those skilled in the art, circuit details will not be explained in any greater extent than that considered necessary as illustrated above, for the understanding and appreciation of the underlying concepts of the present invention and in order not to obfuscate or distract from the teachings of the present application.
Thus, it is to be understood that the architectures depicted herein are merely exemplary, and that in fact many other architectures can be implemented which achieve the same functionality. In an abstract, but still definite sense, any arrangement of components to achieve the same functionality is effectively "associated" such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as "associated with" each other such that the desired functionality is achieved, irrespective of architectures or intermedial components. Likewise, any two components so associated can also be viewed as being "operably connected," or "operably coupled," to each other to achieve the desired functionality. Thus for example references to a controller may be taken to include situations in which the control function is provided by a plurality of discrete elements as well as situations where it is provided as a single device such as an integrated circuit or as part of such an integrated circuit. Furthermore, those skilled in the art will recognize that boundaries between the functionality of the above described operations are merely illustrative. The functionality of multiple operations may be combined into a single operation, and/or the functionality of a single operation may be distributed in additional operations. Moreover, alternative embodiments may include multiple instances of a particular operation, and the order of operations may be altered in various other embodiments.
However, other modifications, variations and alternatives are also possible. The specifications and drawings are, accordingly, to be regarded in an illustrative rather than in a restrictive sense.
In the claims, any reference signs may placed between parentheses shall not be construed as limiting the claim. The word 'comprising' does not exclude the presence of other elements or steps than those listed in a claim. Furthermore, the terms "a" or "an," as used herein, are defined as one or more than one. Also, the use of introductory phrases such as "at least one" and "one or more" in the claims should not be construed to imply that the introduction of another claim element by the indefinite articles "a" or "an" limits any particular claim containing such introduced claim element to inventions containing only one such element, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an." The same holds true for the use of definite articles. Unless stated otherwise, terms such as "first" and "second" are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements. The mere fact that certain measures are recited in mutually different claims does not indicate that a combination of these measures cannot be used to advantage.
Reference Numerals
PbSe detector section 1
Main PbSe 2
Blackened PbSe 3
Buffer section 4
Differential Amplifier section 5
Amplifier section 6
Comparator Section 7