Abstract: The invention provides an integrated multiple voltage regulator. The integrated multiple voltage regulator includes a substrate, a plurality of resistors formed on the substrate, at least one zener diode mounted in connection with at least one resistor formed, a plurality of channels created from the resistor-zener diode combination, wherein each channel comprises at least one input and at least one output and an cavity for housing the created channels to obtain the integrated multiple voltage regulator.
Claims: We claim:
1. An integrated multiple voltage regulator comprising:
a substrate;
a plurality of resistors formed on the substrate;
at least one zener diode mounted in connection with at least one resistor formed;
a plurality of channels created from the resistor-zener diode combination, wherein each channel comprises at least one input and at least one output; and
a cavity for housing the created channels to obtain the integrated multiple voltage regulator.
2. The regulator according to Claim 1, wherein the substrate is made up of at least one material selected from a list comprising of an alumina, an aluminium nitride, and a beryllia.
3. The regulator according to Claim 1, wherein the resistors are formed using at least one technique selected from a list comprising of a thick film printing, an imprinting, a 3-D printing, a screen printing and an etching.
4. The regulator according to Claim 1, wherein the resistors within the channel can be in series combination, parallel combination or a combination thereof.
5. The regulator according to Claim 1, wherein the zener diodes are mounted using at least one technique selected from a list comprising of a surface mount, a flush mount, a stud mount, an epoxy mount and a solder mount.
6. The regulator according to Claim 1, wherein the zener diodes within the channel can be in series combination, parallel combination or a combination thereof.
7. The regulator according to Claim 1, wherein the channels are created using a technology selected from a list comprising of a thick film technology and a PCB technology.
8. The regulator according to Claim 1, wherein the cavity is a hermetically sealed cavity.
9. The regulator according to Claim 1, wherein the integrated multiple voltage regulator is a Hybrid Micro Circuit.
Bangalore NARENDRA BHATTA HL
31 December 2016 (INTELLOCOPIA IP SERVICES)
AGENT FOR APPLICANT
, Description:AN INTEGRATED MULTIPLE VOLTAGE REGULATOR
FIELD OF INVENTION
The invention generally relates to the field of voltage regulator and particularly to an integrated multiple voltage regulators.
BACKGROUND
Voltage regulators are generally used in electronic circuits to get a constant voltage level by using the electronic components. In any electronic circuit, there are numerous voltage regulators that are incorporated discretely and assembled on PCB. The discrete positioning of the numerous voltage regulators makes it difficult to draw multiple and varied outputs. There are voltage regulators known in the art that is capable of delivering a multiple output. However, the circuit is bulky and has several components. This makes the PCB bulky and heavy. There are also voltage regulators that are packaged in an insulated cavity with pins provided on the exterior of the cavity for establishing electrical connections. The packaged voltage regulator is capable of providing a dual voltage. However, the system requires a separate package for every channel, which eventually increases the space on PCB. Hence, there is a need for an integrated voltage regulator that occupies less space and is capable of delivering multiple voltages without the use of complex circuitry.
BRIEF DESCRIPTION OF DRAWINGS
So that the manner in which the recited features of the invention can be understood in detail, some of the embodiments are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
FIG.1 shows a schematic representation of a plurality of resistors formed on the substrate, according to an embodiment of the invention.
FIG.2 shows a schematic representation of a diode mounted in combination with the resistors, according to an embodiment of the invention.
FIG.3 shows a schematic representation of a channel created from the resistor- zener diode, according to an embodiment of the invention.
FIG.4 shows a representative view of an integrated multiple voltage regulator, according to an embodiment of the invention.
SUMMARY OF THE INVENTION
One aspect of the invention provides an integrated multiple voltage regulator. The integrated multiple voltage regulator includes a substrate, a plurality of resistors formed on the substrate, at least one zener diode mounted in connection with at least one resistor formed, a plurality of channels created from the resistor-zener diode combination, wherein each channel comprises at least one input and at least one output, and an cavity for housing the created channels to obtain the integrated multiple voltage regulator.
DETAILED DESCRIPTION OF THE INVENTION
Various embodiments of the invention provide an integrated multiple voltage regulator.
FIG.1 shows a schematic representation of a plurality of resistors formed on the substrate, according to an embodiment of the invention. The integrated multiple voltage regulator has a substrate 1. The substrate 1 described herein includes but are not limited to an alumina, an aluminium nitride, and a beryllia, and/or combinations thereof. In one example of the invention, the substrate 1 is an Alumina. A plurality of resistors 2 is formed on the substrate 1. Examples of method of formation of resistors include but are not limited to a thick film printing process, an imprinting, a 3-D printing, a screen printing and an etching. In one example of the invention forming of resistors 2 on the substrate 1 is the thick film printing process.
FIG.2 shows a schematic representation of a zener diode 3 mounted in combination with the resistors 2, according to an embodiment of the invention. The combination of the zener diode and resistor constitute a channel. Each channel includes at least one zener diode 3 and at least one resistor 2 combination. The zener diode 3 is mounted using at least one technique selected from a list including of a surface mount, a flush mount, a stud mount, an epoxy mount and a solder mount.
FIG.3 shows a schematic representation of a channel created from the resistor- zener diode, according to an embodiment of the invention. The resistors 2 and zener diode 3 within the channel can be in series combination, parallel combination, pi topology, delta topology or a combination thereof. In one example of the invention the resistors 2 and zener diode 3 are in the combination of a pi topology in the channel. The channel includes at least one input and at least one output. The channels are created using a technology selected from a list including of a thick film technology and a PCB technology. In one example of the invention the channels are created using the thick film technology. In one embodiment of the invention there are six channels formed on the substrate 1.
FIG.4 shows a representative view of the integrated multiple voltage regulator, according to an embodiment of the invention. The channels are the enclosed in a hermetically sealed cavity. The cavity 4 is provided with a plurality of contact pins 5 on either side of the cavity, for establishing electrical connection. Each of the contact pins can be selected for input and drawing an output. The selection of the input and the output determines the net output of the device, in terms of signal. For example, in a six channel voltage regulator device, it is desirable to have six outputs with six pairs of input, wherein each pair of input corresponds to an output. Further, the cavity is electrically insulated with the pins on the exterior of the cavity, providing the necessary electrical connections. The integrated multiple voltage regulator is a Hybrid Micro Circuit.
Thus, invention as described herein and as illustrated in the accompanying drawings provides an integrated multiple voltage regulator. The invention is reduced in mass, volume, and dimension. The integrated multiple voltage regulator is reliable for extreme environment. Further the integrated multiple voltage regulator has ability to regulate the various ranges of voltage and having better thermal performance. The invention finds its applications to control various range of voltages as per voltage requirement.
The foregoing description of the invention has been set merely to illustrate the invention and is not intended to be limiting. Since modifications of the disclosed embodiments incorporating the spirit and substance of the invention may occur to person skilled in the art, the invention should be construed to include everything within the scope of the appended claims and equivalents thereof.
| # | Name | Date |
|---|---|---|
| 1 | PROOF OF RIGHT [31-12-2016(online)].pdf | 2016-12-31 |
| 2 | Power of Attorney [31-12-2016(online)].pdf | 2016-12-31 |
| 3 | Form 5 [31-12-2016(online)].pdf | 2016-12-31 |
| 4 | Form 3 [31-12-2016(online)].pdf | 2016-12-31 |
| 5 | Drawing [31-12-2016(online)].pdf | 2016-12-31 |
| 6 | Description(Complete) [31-12-2016(online)].pdf_385.pdf | 2016-12-31 |
| 7 | Description(Complete) [31-12-2016(online)].pdf | 2016-12-31 |
| 8 | Form 9 [15-03-2017(online)].pdf | 2017-03-15 |
| 9 | Form 18 [15-03-2017(online)].pdf | 2017-03-15 |
| 10 | 201641045195-FER.pdf | 2019-11-18 |
| 11 | 201641045195-Retyped Pages under Rule 14(1) [14-02-2020(online)].pdf | 2020-02-14 |
| 12 | 201641045195-OTHERS [14-02-2020(online)].pdf | 2020-02-14 |
| 13 | 201641045195-FER_SER_REPLY [14-02-2020(online)].pdf | 2020-02-14 |
| 14 | 201641045195-DRAWING [14-02-2020(online)].pdf | 2020-02-14 |
| 15 | 201641045195-CLAIMS [14-02-2020(online)].pdf | 2020-02-14 |
| 16 | 201641045195-2. Marked Copy under Rule 14(2) [14-02-2020(online)].pdf | 2020-02-14 |
| 17 | 201641045195-PatentCertificate30-09-2020.pdf | 2020-09-30 |
| 18 | 201641045195-Marked up Claims_Granted 348404_30-09-2020.pdf | 2020-09-30 |
| 19 | 201641045195-IntimationOfGrant30-09-2020.pdf | 2020-09-30 |
| 20 | 201641045195-Drawings_Granted 348404_30-09-2020.pdf | 2020-09-30 |
| 21 | 201641045195-Description_Granted 348404_30-09-2020.pdf | 2020-09-30 |
| 22 | 201641045195-Claims_Granted 348404_30-09-2020.pdf | 2020-09-30 |
| 23 | 201641045195-Abstract_Granted 348404_30-09-2020.pdf | 2020-09-30 |
| 24 | 201641045195-RELEVANT DOCUMENTS [24-09-2021(online)].pdf | 2021-09-24 |
| 25 | 201641045195-RELEVANT DOCUMENTS [16-06-2022(online)].pdf | 2022-06-16 |
| 26 | 201641045195-RELEVANT DOCUMENTS [16-06-2022(online)]-1.pdf | 2022-06-16 |
| 27 | 201641045195-FORM FOR SMALL ENTITY [05-12-2022(online)].pdf | 2022-12-05 |
| 28 | 201641045195-EVIDENCE FOR REGISTRATION UNDER SSI [05-12-2022(online)].pdf | 2022-12-05 |
| 29 | 201641045195-RELEVANT DOCUMENTS [07-06-2023(online)].pdf | 2023-06-07 |
| 30 | 201641045195-POA [14-11-2024(online)].pdf | 2024-11-14 |
| 31 | 201641045195-FORM-26 [14-11-2024(online)].pdf | 2024-11-14 |
| 32 | 201641045195-FORM 13 [14-11-2024(online)].pdf | 2024-11-14 |
| 1 | SS_25-10-2019.pdf |