FIELD OF THE INVENTION:

The present invention relates to sensor signal acquisition and conditioning. In particular, the present invention is directed to develop a novel integrated and compact system for acquiring signal from different sensors such as accelerometers, biosensors etc. and conditioning the same for subsequent processing.

BACKGROUND ART:
The signal obtained from sensors such as accelerometers, biosensors and the like is usually very weak and may be as low as a few hundred micro volts. Hence, it is required to be conditioned for improving its quality and making it suitable for feeding to an analog-to-digital converter (ADC) for further processing.

A typical sensor signal acquisition system (Ref. [1]) as shown in the accompanying figure 1, basically consists of an instrumentation amplifier (IA) capable of providing sufficient amplification to the weak input signal, a low-pass filter (LPF) to remove high frequency noise components, and a programmable gain amplifying stage (PGA) for getting maximum output signal swing for input signals of varying strengths. An ADC is subsequently used to digitize the signal. A popular ADC type is the Delta Sigma (??) ADC most suitable for low-to-medium frequency and high precision applications. ?? ADC consists of two consecutive blocks, namely an analog ?? modulator followed by a digital decimation filter. The ?? modulator is itself made up of a loop-filter (low-pass filter or integrator) and a quantizer present in a negative feedback loop.

Reported sensor signal acquisition system architectures till date have a clear demarcation between the ADC section and the preceding signal conditioning section.

A typical discrete-time (DT) 1st order ?? modulator has a switched-capacitor integrator as the loop-filter followed by a quantizer (Reference: [2], [3], [4], [6]). This is illustrated in the accompanying figure 2.

A typical DT 2nd order ?? modulator has switched-capacitor integrators in both the 1st and 2nd stages (Reference: [2], [5], [6], [9]). This is shown in the accompanying figure 3.

A typical continuous-time (CT) 2nd order ?? modulator has CT active-RC (or, gm-C) integrators in both the 1st and 2nd stages (Reference: [4], [6], [11], [16]). This is illustrated in the accompanying figure 4.

A typical hybrid (CT with DT) ?? modulator has a CT integrator in the 1st integrator stage, followed by a DT integrator in the 2nd stage (Reference: [6], [14]). This is shown in the accompanying figure 5.

Typical differential difference amplifier (DDA) based single-ended instrumentation amplifier (IA) and programmable gain amplifier (PGA) circuits are shown in accompanying figure 6. Programmable gain is obtained by changing the resistances in the feedback loop (Reference: [1], [13]). Variants of these with fully-differential output can be similarly used.

Reference:
[1] Practical Design Techniques for Sensor Signal Conditioning, Analog Devices Inc., Norwood, MA, 1999.

[2] J. M. de la Rosa, "Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 1, pp. 1–21, Jan. 2011.

[3] S. Rabii and B. A. Wooley, “The Design of Low-Voltage, Low-Power Sigma-Delta Modulators,” Series: The Springer International Series in Engineering and Computer Science, vol. 483, Springer, New York, 1999.

[4] R. Schreier and G. C. Temes, “Understanding Delta-Sigma Data Converters,” John Wiley & Sons Ltd., United Kingdom, 2005.

[5] B. E. Boser and B. A. Woley, “The Design of Sigma-Delta Modulation Analog- to- Digital Converters,” IEEE Journal of Solid State Circuits, vol. 23, no. 6, pp. 1298–1308, Dec. 1988.

[6] J. M. de la Rosa and R. del Rio, “CMOS Sigma-Delta Converters: Practical Design Guide,” John Wiley & Sons Ltd., United Kingdom, 2013.

[7] G. Yang, L. Xie, M. Mantysalo, J. Chen, H. Tenhunen, and L. R. Zheng, “Bio-Patch Design and Implementation Based on a Low-Power System-on-Chip and Paper-Based Inkjet Printing Technology,” IEEE Transactions on Information Technology In Biomedicine, vol. 16, no. 6, pp. 1043–1050, Nov. 2012.

[8] ADS1298 (8-Channel, 24-Bit Analog-To-Digital Converter With Integrated ECG Front End) Datasheet, Texas Instruments Inc., Dallas, TX, Revised Jan 2014, Available: http://www.ti.com/lit/gpn/ads1298.

[9] Delta-Sigma Modulator with Switch Capacitor Implementation, by K. Shenoi and B. P. Agrawal. Patent publication no. US4439756 A, date: Mar 27, 1984.

[10] Oversampled High-Order Modulator, by J. Heikkila and L. Lipasti. Patent publication no. US 5805093 A, date: Sep 8, 1998.

[11] Time-Continuous Sigma/Delta Analog-To-Digital Converter, by D. Draxelmayr. Patent publication no. US7142143 B2, date: Nov 28, 2006.

[12] Continuous Time Sigma-Delta ADC with Embedded Low-Pass Filter, by M. Sosio et al. Patent publication no. US 8581762 B2, date: Nov 12, 2013.

[13] E. Sackinger and W. Guggenbuhl, “A Versatile Building Block: The CMOS Differential Difference Amplifier,” IEEE Journal of Solid State Circuits, vol. SC-22, no. 2, pp. 287–294, Apr. 1987.

[14] P. Morrow et al., “A 0.18µm 102dB-SNR mixed CT SC audio-band ?S ADC,” IEEE International Solid- State Circuits Conference Dig. Tech. Papers, pp. 178–179, Feb. 2005.

[15] V. Srinivasan, V. Wang, P. Satarzadeh, B. Haroun, and M. Corsi, “A 20mW 61dB SNDR (60MHz BW) 1b 3rd-Order Continuous-Time Delta-Sigma Modulator Clocked at 6 GHz in 45nm CMOS,” IEEE International Solid- State Circuits Conference Dig. Tech. Papers, pp. 158–160, Feb. 2012.

[16] F. Gerfers, M. Ortmanns, and Y. Manoli, “A 1.5-V 12-bit Power-Efficient Continuous-Time Third-Order S? Modulator,” IEEE Journal of Solid State Circuits, vol. 38, no. 8, pp. 1343–1352, Aug. 2003.

It would be apparent from the above that the reported sensor signal acquisition system architectures include separate ADC section and preceding signal conditioning section. Therefore, the whole signal acquisition system becomes a long chain of successive circuit blocks performing different functionalities. Such signal acquisition systems with different circuits for performing different functionalities require significant amount of power and implementation area. Thus, there has been a need for developing novel power and area efficient signal acquisition system architecture with reduced hardware/circuitry.

OBJECTIVE OF THE INVENTION:
Thus, the basic objective of the present invention is to develop a power and area efficient precision sensor signal acquisition and conditioning system with reduced hardware/circuitry.

Another objective of the present invention is to develop a sensor signal acquisition and conditioning system which would be adapted to integrate and execute all signal conditioning related functionalities in a single circuit embodiment.

Another objective of the present invention is to develop an integrated delta sigma based precision signal acquisition system architecture where the loop filter of the ?? modulator is realized using a differential difference amplifier (DDA) that also serves the purpose of an instrumentation amplifier.

Another objective of the present invention is to develop a delta sigma modulator based sensor signal acquisition and conditioning system which would be adapted to incorporate all functionalities related to signal acquisition such as amplifying the weak signal as received from the sensor, filtering the amplified signal to remove high frequency noise components, programmable gain amplification of the filtered signal for getting maximum output signal swing for input signals of varying strength, filtering the signal with anti-aliasing filter and then digitization of the signal.

SUMMARY OF THE INVENTION:
Thus, according to the basic aspect of the present invention, there is provided an integrated signal acquisition cum conditioning system comprising
delta sigma modulator to receive input signal directly from the sensor and subsequently digitize the signal. The said delta sigma modulator comprises
a differential difference amplifier (DDA) based integrator in the frontend, having primary input port to receive the input signal from the sensor and also acting as the loop filter of the delta sigma modulator;
RC network pair connected in feedback port of the differential difference amplifier, isolated from the primary input port;
adjustable voltage source connected to the feedback port to adjust feedback voltage level to said differential difference amplifier; and
a quantizer.

According to another aspect in the present integrated signal acquisition cum conditioning system, the quantizer receives the DDA based integrator output and quantizes the same generating 1 bit digital values that represent the input signal.

According to a further aspect in the present invention, there is provided an integrated signal acquisition cum conditioning system comprising
second order delta sigma modulator to receive input signal directly from the sensor and subsequently digitize the signal for higher dynamic range. The said second order modulator comprises
first stage integrator to receive input signal from sensors having
a differential difference amplifier based continuous time integrator having primary input port to receive the input signal from the sensor;
an RC network pair connected in feedback port of the differential difference amplifier, isolated from the primary input port;
adjustable voltage source connected to the feedback port to adjust feedback voltage level;
second stage integrator having either (i) discrete time switched capacitor based integrator or (ii) continuous time integrator with a sampler.

According to another aspect in the present integrated signal acquisition cum conditioning system, the second stage integrator comprises adjustable voltage source connected to its feedback port to adjust the feedback voltage level.

According to a further aspect in the present integrated signal acquisition cum conditioning system, the RC network serves as feeding point for the modulator digital output required for difference (?) operation of the modulator.

According to yet another aspect in the present integrated signal acquisition cum conditioning system, a dedicated differential input port (distinct from the feedback port) of the DDA is used for the input signal coming from the sensor. Thus, the primary input signal is kept isolated from the integrating RC network ensuring balanced high impedance for fully differential input signal from the sensor and providing sufficient amplification to weak signals received from the sensors. Thus, the DDA is customized for the dual purpose roles namely, as Instrumentation Amplifier and as Integrator of the ?? modulator.

According to another aspect in the present integrated signal acquisition cum conditioning system, the differential difference amplifier based RC-integrator provides low-pass filtering function of the amplified sensor signal to remove high frequency noise components and simultaneous integrator functionality required in the delta-sigma modulator.

According to another aspect in the present integrated signal acquisition cum conditioning system, the adjustable voltage sources for adjusting feedback voltage of the differential difference amplifier enable programmable gain of the amplifier for getting maximum output signal swing for input signals of varying strengths.

According to yet another aspect in the present integrated signal acquisition cum conditioning system, the differential difference amplifier based RC-integrator enables anti-aliasing property by involving continuous-time loop-filter without involving any anti-aliasing filter.

According to yet another aspect in the present integrated signal acquisition cum conditioning system, the delta sigma modulator need to be followed by a digital decimation filter to complete the operation of analog to digital conversion.

According to a further aspect in the present integrated signal acquisition cum conditioning system, the sensors include accelerometers, biosensors and like.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS:
Figure 1 shows a schematic illustration of a typical sensor signal acquisition system architecture.
Figure 2 shows a first order discrete-time ?? modulator.
Figure 3 shows a second order discrete-time ?? modulator.
Figure 4 shows a second order continuous-time ?? modulator.
Figure 5 shows a second order hybrid ?? modulator.
Figure 6 shows schematic diagrams of DDA based IA, and PGA.
Figure 7 shows schematic diagram of first-order modulator in accordance with the present invention.
Figure 8 shows a schematic diagram of a second-order modulator in accordance with the present invention.
Figure 9 shows a transient simulation of the present first-order ?? modulator using Simulink.
Figure 10 shows at transient simulation of the present second-order ?? modulator using Simulink.
Figure 11 shows transient simulation of the present second-order ?? modulator using Cadence.

DETAILED DESCRIPTION OF THE INVENTION WITH REFERENCE TO THE ACCOMPANYING DRAWINGS:
Reference is first invented from the accompanying figure 7 which shows a system for integrated sensor signal acquisition cum conditioning. As shown in the referred figure, the integrated signal acquisition system basically includes delta sigma modulator to receive input signal directly from the sensor and subsequently digitize the signal after conditioning the signal.

The novel delta-sigma modulator of the present signal acquisition cum conditioning system provides an integrated solution which is compact and has lower area and power requirement.

The delta-sigma modulator of the present signal acquisition cum conditioning system is particularly developed to incorporate all functionalities related to signal conditioning such as amplifying the weak signals as received from the sensors, filtering the amplified signal to remove high frequency noise components, programmable gain amplification of the filtered signal for getting maximum output signal swing for input signals of varying strengths, filtering the signal with anti-aliasing filter and then digitizing the signal.

To realize the loop filter of the present delta sigma (??) modulator, instead of a conventional differential amplifier, a differential difference amplifier (DDA) is used which also serves the purpose of the instrumentation amplifier. The simple first-order modulator (due to only one integrator stage) based architecture of the compact signal acquisition system as shown in the accompanying figure 7, clearly reveals that the ?? modulator preferably includes a differential difference amplifier (DDA) based RC-integrator (1) which serves the purpose of both amplifying the weak signals as received from the sensors, and also acts as the ?? loop-filter.
The differential difference amplifier based RC-integrator (1) of the present ?? modulator includes a primary input port (2) to receive the input signal from the sensor. The integrating RC network pair (5) connected to feedback port (3) of the differential difference amplifier (1) remains isolated from the primary input signal port (2). Due to the isolation of the primary input port (2) from the RC network (5), the input signal source does not face the RC network. This ensures balanced high impedance for fully differential input signal from the sensor and provides sufficient amplification to weak signals received from the sensor.
The DDA based RC integrator (1) provides low-pass filtering function of the amplified sensor signal to remove high frequency noise components and simultaneous integrator functionality required in the delta-sigma modulator of an ADC. The RC network (5) also serves as the feeding point for the modulator digital output required for the difference operation (?-operation) of the modulator.
Further to the above, the differential difference amplifier (1) also includes adjustable voltage sources (4). The voltage sources (4) are used for adjusting feedback voltage of the delta sigma modulator which enables programmable amplification for getting maximum output signal swing for input signals of varying strengths. Thus, the feature of programmable gain as required in a signal conditioning system is obtained from this ?? modulator by adjusting the feedback voltage levels (Vfp, Vfn).
The inherent anti-aliasing property of the continuous-time loop-filter (along with oversampling) of the present modulator negates the need of separate anti-aliasing filter (AAF).
Thus, resulting compact acquisition system has only one stage (?? block) in contrast to five stages of the conventional signal acquisition architecture.
The present system also comprises a quantizer (6) in the negative feedback loop (8) to receive the DDA based integrator’s output and generate 1 bit digital output (9) that represents the input signal. The quantizer (6) is driven by using a sampling clock (7).
Reference is next invited from the accompanying figure 8, which shows a preferred embodiment of the present system for integrated signal acquisition cum conditioning for higher dynamic range. The present system has a second order delta sigma modulator topology and comprises two integrators followed by a quantizer.
The first stage integrator is the same DDA based continuous-time (CT) RC-integrator as described hereinbefore and the second stage integrator is a discrete-time (DT) switched-capacitor (SC) based integrator. Similar to the abovementioned first order delta sigma modulator, the modified first stage of this circuit performs the function of an IA as well as the ?? loop-filter action. Other aspects of this topology, such as PGA and high input impedance, are also same as that of the first order system.

Additionally, it can be stated that instead of the SC based integrator in the second stage, a CT integrator (like, active-RC or gm-C) followed by a sampler can also be used in the proposed second order delta-sigma modulator. Further, the proposed DDA-based first stage integrator can be used in other topologies like higher-order/multi-bit single-loop modulators and cascade (or multi-loop) ?? modulators as well.
The operation of the present system has been verified using MATLAB Simulink and Cadence Virtuoso simulation platforms. A system level simulation result for the present first order structure (as shown in the figure 7) in MATLAB Simulink is shown in accompanying figure 9. The output is of expected pulse-density modulated nature having relatively more number of ‘1’ bits (than ‘0’ bits) when the input is high, more number of ‘0’ bits when the input is low, and almost equal number of ‘1’s and ‘0’s when the signal is in-between. Thus, the local average of the modulator output tends to track the analog input.

System level simulation result for the proposed second order structure (as shown in the figure 8) in MATLAB Simulink is similarly provided in accompanying figure 10.

Transistor level circuit simulation data and corresponding output FFT spectrum for the proposed second order modulator structure in Cadence Virtuoso are shown in figure 11. The FFT confirms a desirable peak at the applied input frequency. This representative simulated modulator yielded an in-band peak SNR of 67 dB using a sampling clock frequency of 10 kHz at an oversampling ratio of 50 and input sine signal amplitude of 14.142 mV (and feedback voltage level of 20 mV).

It is thus in the present system for signal acquisition cum conditioning, the use of RC feedback network for the front-end DDA provides integration action which is utilized for ?? modulator. The customized DDA for the dual purpose roles namely, as instrumentation amplifier and as integrator of the ?? modulator along with implementation of other functionalities like programmable gain amplification and filtering are leading to a compact and power efficient system in comparison to existing prior art.
The above description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of exemplary embodiments of the invention as defined by the claims and their equivalents. It includes various specific details to assist in that understanding but these are to be regarded as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.
The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.

WE CLAIM:

1. An integrated signal acquisition cum conditioning system comprising
delta sigma modulator to receive input signal directly from sensor and subsequently digitize the signal, said delta sigma modulator comprises
a differential difference amplifier (DDA) based integrator in frontend having primary input port to receive the input signal from the sensor and acting as loop filter of the delta sigma modulator;
RC network pair connected in feedback port of the differential difference amplifier, isolated from the primary input port;
adjustable voltage source connected to the feedback port to adjust feedback voltage level to said differential difference amplifier; and
a quantizer.

2. The integrated signal acquisition cum conditioning system as claimed in claim 1, wherein the quantizer receives the DDA based integrator output and quantize the same generating 1 bit digital values that represent the input signal.

3. An integrated signal acquisition cum conditioning system comprising
second order delta sigma modulator to receive input signal directly from the sensor and subsequently digitize the signal for higher dynamic range, said second order delta sigma modulator comprises
first stage integrator to receive input signal from the sensor having
a differential difference amplifier based continuous time integrator having primary input port to receive the input signal from the sensor;
an RC network pair connected in feedback port of the differential difference amplifier, isolated from the primary input port;
adjustable voltage source connected to the feedback port to adjust feedback voltage level;
second stage integrator having either (i) discrete time switched capacitor based integrator or (ii) continuous time integrator with a sampler.

4. The integrated signal acquisition cum conditioning system as claimed in claim 3, wherein the second stage integrator comprises adjustable voltage source connected to its feedback port to adjust the feedback voltage level.

5. The integrated signal acquisition cum conditioning system as claimed in anyone of the claim 1 to 4, wherein the RC network serves as feeding point for the modulator digital output required for difference (?) operation of the modulator.

6. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 5, wherein a dedicated differential input port distinct from the feedback port of the DDA is used for the input signal coming from the sensor; and thus the primary input signal remains isolated from the integrating RC network ensuring balanced high impedance for the fully differential input signal from the sensor and providing sufficient amplification to weak signals received from the sensors, and thus facilitating the DDA to operate as Instrumentation Amplifier and as Integrator of the delta sigma modulator.

7. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 6, wherein the differential difference amplifier based RC-integrator provides low-pass filtering function of the amplified sensor signal to remove high frequency noise components and simultaneous integrator functionality required in the delta-sigma modulator.

8. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 7, wherein the adjustable voltage sources for adjusting feedback voltage of the differential difference amplifier enable programmable gain of the amplifier for getting maximum output signal swing for input sensor signals of varying strengths.

9. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 8, wherein the differential difference amplifier based RC-integrator enables anti-aliasing property by involving continuous-time loop-filter without involving any anti-aliasing filter.

10. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 9, wherein the delta sigma modulator need to be followed by a digital decimation filter to complete the operation of analog to digital conversion.

11. The integrated signal acquisition cum conditioning system as claimed in anyone of the claims 1 to 10, wherein the sensors include accelerometers, biosensors and the like.