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An Over Power Detection System

Abstract: An over power detection system which comprises: transformer adapted to scale down an input signal to measure power signal; gain amplifier adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a first conditioned signal; attenuator adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a second conditioned signal; Analog to Digital Convertor with two input channels adapted to sample said first conditioned signal to obtain a first sampled signal and to sample said second conditioned signal to obtain a second sampled signal, said sampling done at a pre-determined frequency rate; and Digital Signal Processing means adapted to receive said first sampled signal and said second sampled signal for detecting over power conditioned based on said first sampled signal and said second sampled signal, thereby acknowledging signal amplitude increase or decrease at every sample.

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Notices, Deadlines & Correspondence

Patent Information

Application #
Filing Date
31 March 2011
Publication Number
45/2011
Publication Type
INA
Invention Field
ELECTRICAL
Status
Email
Parent Application

Applicants

CROMPTON GREAVES LIMITED
CG HOUSE, 6TH FLOOR, DR. ANNIE BESANT ROAD, WORLI, MUMBAI 400030,MAHARASHTRA,INDIA.

Inventors

1. PARDESHI SURAJ
CROMPTON GREAVES LIMITED, ELECTRIONIC DEVELOPMENT CENTER, CG GLOBAL R&D CENTRE, KANJUR MARG (E), MUMBAI-400 042 MAHARASHTRA,INDIA

Specification

FORM 2
THE PATENTS ACT, 1970
(39 of 1970) As amended by the Patents (Amendment) Act, 2005
AND
The Patents Rules, 2003
As amended by the Patents (Amendment) Rules, 2005
COMPLETE SPECIFICATION
(See section 10 and rule 13)
TITLE OF THE INVENTION
An over power detection system.
APPLICANTS :
Crompton Greaves Limited, CG House, Dr Annie Besant Road, Worli, Mumbai 400 030, Maharashtra, India, an Indian Company
INVENTOR (S):
Pardeshi Suraj D of Crompton Greaves Ltd, Electronics Development Center, CG Global R&D Centre, Kanjurmarg (E), Mumbai - 400 042, Maharashtra, India, an Indian National.
PREAMBLE TO THE DESCRIPTION:
The following specification particularly describes the nature of this invention and the manner in which it is to be performed:

FIELD OF THE INVENTION:
This invention relates to the field of analog and digital electronic circuit systems.
Particularly, this invention envisages an over power detection system.
BACKGROUND OF THE INVENTION:
For the purposes of this specification, the term, 'power' relates to current or voltage. Hence, 'over power detection systems' relate to 'over voltage detection systems' or over current detection systems'.
An over power detection system is required in signaling systems where a fairly accurate signal is required to control the system. Aberrant signals due to over voltage or over current may damage the signaling system or may result in faulty signals.
An over power detection system of the prior art is shown in Figure 1 of the accompanying drawings.
In the system of the prior art, the input signal is scaled down to a measurable power using a transformer (T) and then given to a programmable gain amplifier (PGA). The output of the programmable gain amplifier (PGA) is adjusted to obtained the maximum resolution of an Analog to Digital Converter (ADC) channel. The output from the Analog to Digital Converter (ADC) channel is given to a signal processing circuit, typically to a Digital Signal Processing (DSP) circuit.

There if a feedback loop (F/B) from the Digital Signal Processing (DSP) circuit to the programmable gain amplifier (PGA).
In case the signal is low, the gain is increased by the Digital Signal Processing (DSP) circuit and similarly if the signal amplitude is more the gain is reduced by the Digital Signal Processing (DSP) circuit.
The problem with this system and technique is that, whenever the gain is increased or reduced, there is a small interval of time lapse during which no measure (of the signal) is taken and the system experiences a rate of change of the signal continuously. Due to this the response is delayed by 1/fs, where lfs' is the rate at which the input signal is sampled. This delay needs to be avoided for a robust system.
OBJECTS OF THE INVENTION:
An object of the invention is to provide a robust over power detection system.
Another object of the invention is to provide an over power detection system which provides rapid response.
Yet another object of the invention is to provide an over power detection system which compensates during delays caused during sampling.

SUMMARY OF THE INVENTION:
According to this invention, there is envisaged an over power detection system which comprises:
a) transformer adapted to scale down an input signal to measure power signal;
b) gain amplifier adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a first conditioned signal;
c) attenuator adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a second conditioned signal;
d) Analog to Digital Convertor with two input channels adapted to sample said first conditioned signal to obtain a first sampled signal and to sample said second conditioned signal to obtain a second sampled signal, said sampling done at a pre-determined frequency rate; and
e) Digital Signal Processing means adapted to receive said first sampled signal and said second sampled signal for detecting over power conditioned based on said first sampled signal and said second sampled signal, thereby acknowledging signal amplitude increase or decrease at every sample.
According to one embodiment, said over power detection system is an over current detection system.
According to another embodiment, said over power detection system is an over voltage detection system.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS:
An over power detection system of the prior art is shown in Figure 1 of the accompanying drawings.
The invention will now be described in relation to the accompanying drawings, in which:
DETAILED DESCRIPTION OF THE ACCOMPANYING DRAWINGS:
According to this invention, there is envisaged an over power detection system.
Figure 2 illustrates an over power detection system (100), according to this invention.
In accordance with an embodiment of this invention, there is envisaged a transformer (T) adapted to scale down an input signal to measure power signal.
In accordance with another embodiment of this invention, there is envisaged a gain amplifier (PGA) adapted to receive scaled down transformer signal in order to condition the signal to obtain a first conditioned signal.
In accordance with yet another embodiment of this invention, there is envisaged an attenuator (ATN) adapted to receive scaled down transformer signal in order to condition the signal to obtain a second conditioned signal.

In accordance with still another embodiment of this invention, there is envisaged an Analog to Digital Convertor (ADC) with two input channels. The two input channels of the ADC are used to sample these two (first and second) conditioned signals. At every 1/fs, both the input samples are sampled and the sampled data is given to a Digital Signal Processing (DSP) circuit. As a result, if the signal amplitude increases or decreases, it is known at every sample and this reduces the delay that occurs at every sample.
Such a system is useful, particularly, in the case of over-voltage detection and over-current detection. Since the technique is applied to the signal, it is advantageous to both the voltage and the current signal. Due to the envisaged system and technique, the system does not experience rate of increase of the voltage/current and hence time required for the necessary action that needs to be taken can be drastically reduced.
Hence, it provides a sample by sample approach for over power detection using dual amplifier approach.
While this detailed description has disclosed certain specific embodiments of the present invention for illustrative purposes, various modifications will be apparent to those skilled in the art which do not constitute departures from the spirit and scope of the invention as defined in the following claims, and it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the invention and not as a limitation.

We claim,
1. An over power detection system comprising:
a) transformer adapted to scale down an input signal to measure power signal;
b) gain amplifier adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a first conditioned signal;
c) attenuator adapted to receive scaled down transformer signal in order to condition said scaled down signal to obtain a second conditioned signal;
d) Analog to Digital Converter with two input channels adapted to sample said first conditioned signal to obtain a first sampled signal and to sample said second conditioned signal to obtain a second sampled signal, said sampling done at a pre-determined frequency rate; and
e) Digital Signal Processing means adapted to receive said first sampled signal and said second sampled signal for detecting over power conditioned based on said first sampled signal and said second sampled signal, thereby acknowledging signal amplitude increase or decrease at every sample.

2. An over power detection system wherein, said over power detection system is an over current detection system.
3. An over power detection system wherein, said over power detection system is an over voltage detection system.

Documents

Orders

Section Controller Decision Date

Application Documents

# Name Date
1 1044-MUM-2011-FER_SER_REPLY [21-09-2017(online)].pdf 2017-09-21
1 1044-MUM-2011-US(14)-HearingNotice-(HearingDate-01-09-2020).pdf 2020-07-30
2 1044-mum-2011-abstact(10-6-2011).doc 2018-08-10
2 1044-MUM-2011-CLAIMS [21-09-2017(online)].pdf 2017-09-21
3 1044-MUM-2011-ABSTRACT(10-6-2011).pdf 2018-08-10
3 1044-MUM-2011-ABSTRACT [21-09-2017(online)].pdf 2017-09-21
4 1044-MUM-2011-FORM 9(22-7-2011).pdf 2018-08-10
5 1044-MUM-2011-FORM 5(10-6-2011).pdf 2018-08-10
5 1044-MUM-2011-CLAIMS(10-6-2011).pdf 2018-08-10
6 1044-mum-2011-form 3(31-3-2011).pdf 2018-08-10
6 1044-MUM-2011-CORRESPONDENCE(10-6-2011).pdf 2018-08-10
7 1044-MUM-2011-FORM 26(12-8-2011).pdf 2018-08-10
7 1044-MUM-2011-CORRESPONDENCE(12-8-2011).pdf 2018-08-10
8 1044-mum-2011-form 2(title page)-(31-3-2011).pdf 2018-08-10
8 1044-MUM-2011-CORRESPONDENCE(21-4-2011).pdf 2018-08-10
9 1044-MUM-2011-CORRESPONDENCE(22-7-2011).pdf 2018-08-10
9 1044-MUM-2011-FORM 2(TITLE PAGE)-(10-6-2011).pdf 2018-08-10
10 1044-mum-2011-correspondence(31-3-2011).pdf 2018-08-10
10 1044-mum-2011-form 2(provisional)-(31-3-2011).pdf 2018-08-10
11 1044-MUM-2011-DESCRIPTION(COMPLETE)-(10-6-2011).pdf 2018-08-10
11 1044-mum-2011-form 2(10-6-2011).pdf 2018-08-10
12 1044-mum-2011-description(provisional)-(31-3-2011).pdf 2018-08-10
13 1044-MUM-2011-DRAWING(10-6-2011).pdf 2018-08-10
13 1044-MUM-2011-FORM 18(22-7-2011).pdf 2018-08-10
14 1044-MUM-2011-FER.pdf 2018-08-10
14 1044-mum-2011-form 1(31-3-2011).pdf 2018-08-10
15 1044-MUM-2011-FORM 1(21-4-2011).pdf 2018-08-10
16 1044-MUM-2011-FER.pdf 2018-08-10
16 1044-mum-2011-form 1(31-3-2011).pdf 2018-08-10
17 1044-MUM-2011-FORM 18(22-7-2011).pdf 2018-08-10
17 1044-MUM-2011-DRAWING(10-6-2011).pdf 2018-08-10
18 1044-mum-2011-description(provisional)-(31-3-2011).pdf 2018-08-10
19 1044-MUM-2011-DESCRIPTION(COMPLETE)-(10-6-2011).pdf 2018-08-10
19 1044-mum-2011-form 2(10-6-2011).pdf 2018-08-10
20 1044-mum-2011-correspondence(31-3-2011).pdf 2018-08-10
20 1044-mum-2011-form 2(provisional)-(31-3-2011).pdf 2018-08-10
21 1044-MUM-2011-CORRESPONDENCE(22-7-2011).pdf 2018-08-10
21 1044-MUM-2011-FORM 2(TITLE PAGE)-(10-6-2011).pdf 2018-08-10
22 1044-MUM-2011-CORRESPONDENCE(21-4-2011).pdf 2018-08-10
22 1044-mum-2011-form 2(title page)-(31-3-2011).pdf 2018-08-10
23 1044-MUM-2011-CORRESPONDENCE(12-8-2011).pdf 2018-08-10
23 1044-MUM-2011-FORM 26(12-8-2011).pdf 2018-08-10
24 1044-MUM-2011-CORRESPONDENCE(10-6-2011).pdf 2018-08-10
24 1044-mum-2011-form 3(31-3-2011).pdf 2018-08-10
25 1044-MUM-2011-CLAIMS(10-6-2011).pdf 2018-08-10
25 1044-MUM-2011-FORM 5(10-6-2011).pdf 2018-08-10
26 1044-MUM-2011-FORM 9(22-7-2011).pdf 2018-08-10
27 1044-MUM-2011-ABSTRACT(10-6-2011).pdf 2018-08-10
27 1044-MUM-2011-ABSTRACT [21-09-2017(online)].pdf 2017-09-21
28 1044-MUM-2011-CLAIMS [21-09-2017(online)].pdf 2017-09-21
29 1044-MUM-2011-US(14)-HearingNotice-(HearingDate-01-09-2020).pdf 2020-07-30
29 1044-MUM-2011-FER_SER_REPLY [21-09-2017(online)].pdf 2017-09-21

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