Abstract: A device 100 for detecting a pre-defined state transition of a sensor having a converter unit 110 configured to receive an input signal VIN from a sensor 144 in a sensor unit 140, the sensor unit 140 being coupled to the converter unit 110; the converter unit 110 being supplied with a constant reference voltage VREF; and the converter unit 110 configured to determine of a pre-defined state transition of the sensor 144 via the input voltage VIN received from the sensor 144, and the converter unit 110 on determination of the pre-defined state transition of the sensor 144 is configured to provide an indicator 150. Other embodiments are also disclosed.
Description:DISCLAIMER
[0001] Portions of this patent document may contain material that may be subject to copyright OR Trademark protection. The applicant has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office file or on records, but otherwise reserves all copyright and trademarks rights whatsoever. All copyrights and/or trademarks are owned by Indian Institute of Science, Bangalore.
TECHNICAL FIELD
[0002] This disclosure relates generally the use of analog-to-digital converters that may be used as a switch and in particular a user of analog-to-digital converters for readout electronics in sensors and in sensor related technologies.
BACKGROUND
[0003] Typically, ADCs follow a particular sequence when converting analog signals to digital signals. Such devices first sample the signal, then quantify the signals to determine the resolution of the signals, and finally set binary values to the signals and send the converted signals to a system, which is capable of reading a converted signal, which is now a digital signal. Two important aspects of the ADCs are its sampling rate and its resolution. Some applications where ADC find importance are cell phones that are operating on the digital voice signal. In another example, images and videos captured using camera that are stored in any digital device, are also converted into digital form using an ADC. In other examples, technological areas like Medical Imaging such as digital x-ray and MRI also uses ADC to convert images into a digital form before any modifications are made to the images. In recent times, ADCs have found importance in being used in sensors and sensor related technologies or sensor related applications.
[0004] Analog sensors are often used with analog-to-digital converters (ADCs). Understanding an interface between the two devices will help a designer achieve better measurement accuracy with these devices where such sensors are used. Generally, Analog-output sensors are popular because of their low cost, small size, and low power requirements. In many systems that use analog sensors, the sensor's output is measured with an analog-to-digital converter (ADC).
[0005] An important consideration for sensors and devices using ADCs is that they should operate with low power consumption, have a low operational voltage, and also be miniature in size, preferably in micrometers or lesser. For example, considering the case of an ADC, which usually includes multiple transistors involving high power consumption, complexity of the circuit design, signal conditioning, etc., methods that are currently used in fabrication of such devices including high vacuum deposition techniques, chemical vapor deposition etc., include huge costs and complex steps, which make products using such components or the sensors very expensive and time consuming to build. Hence, it’s an object of the present disclosure to ameliorate at least some of the well know disadvantages and produce sensors and/or circuits on a large scale at with high efficiency and low cost.
SUMMARY
[0006] Embodiments of the present disclosure are related generally to sensors and sensor technologies and particularly to the use of analog-to-digital converters (hereinafter broadly referred to as a converter unit or converter) that may be used as a switch and the use of ADCs in sensor technologies and also the use of such ADCs in sensors and sensor technologies for readout electronics. In particular embodiments of the present disclosure more generally relate to detection of signal limits and to sensors and sensor technologies that can detect the measuring parameter boundaries of a sensor, and also be used at a sensor interface or as sensors in readout electronics or readout circuits. Embodiments of the present disclosure relates to fully printed self-powered sensor patches with printed readout electronics/circuitry, having a specific design of a converter unit that is designed with four (4) components, wherein the converter unit may be configured to perform actions like a switch and determine important threshold parameters associated with of a sensor that is being monitor. In an embodiment the converter unit is signed to be a 1-bit converter that may be treated as a single switch, and there could be multiple such 1-bit converters that may be connected to form a multi-bit converter unit (a multi-bit ADC) that can be treated as a single unit configured in different ways to perform the role of multiple switches.
[0007] In an embodiment, the 1-bit converter unit or a multi-bit converter unit or a sensor that includes a 1-bit converter unit or multi-bit converter unit wherein the converter unit forms a part of a sensor may be designed and printed for example using jetting or replication type techniques, in order to fabricate the sensor and/or the device including the sensor. In an embodiment, the components in the converter unit may preferably be semiconductor material that can be amorphous or crystalline oxide and is obvious to a person of ordinary skill in the art. In another exemplary embodiment, an insulator of the converter unit may be made of an organic material (for example PVA or PMMA or PVP) or inorganic dielectric (for example SiO2, HfO2, Al2O3), solid electrolytes etc., as is obvious to a person of ordinary skill in the art.
[0008] In an embodiment in accordance with the present disclosure an improved converter unit (a 1-bit converter unit or a multi-bit converter unit) is disclosed, which may be also referred to as a Analog to Digital converter (ADC), which may be used in sensor and sensor related technologies for example in readout electronics, and such a converter unit, i.e., a 1-bit converter unit in accordance with the present disclosure includes at least four (4) components, wherein the at least four components are transistors or TFTs or MOSFETS, and the at least four components are coupled (connected) together in a pre-determined manner to form a device, such that for a fixed or constant reference voltage (VREF) provided or supplied to the device, for which the output voltage switches from an OFF state (0 Volts) to an ON state (2 Volts) corresponding to a fixed input voltage,. In an exemplary embodiment, varying the reference voltage will result in changing the transition point where the output voltage switches its state.. In an exemplary embodiment, the reference voltage provided to the converter unit is key to determining the transition point for the converter unit. The continuous input voltage supplied to the device may be discretized into multiple levels with respect to the reference voltage for each of the components, and with respect to differing reference voltage, a continuous input voltage can be discretised.
[0009] Furthermore, in a different state, i.e., an additional amplifier may be added to the device (1-bit converter unit), where the output from the amplifier may be fed as input to the converter unit, which may make the converter unit to be more efficient in terms of switching. In an embodiment of the present disclosure, the operating voltage for the whole device, comprising the converter unit and the amplifier, may be as low as 2 Volts, which advantageously may render such a device possible for battery compatible applications and/or supercapacitor compatible applications and/or battery operated applications and/or supercapacitor operated applications, which require low power supply at the OFF state, for example in the order of a few nano Watts, and in the ON state, for example may vary to a few micro Watts, during operation of devices that may be embedded with a converter unit or a sensor including the converter unit, for example wearable electronics, portable electronics, and sensor patches. Other embodiments are also disclosed.
BRIEF DESCRIPTION OF THE DRAWINGS
[0010] For a better understanding of the nature and desired objects of the present disclosure, reference is made to the following detailed description taken in conjunction with the accompanying drawing figures wherein like reference character/numerals denote corresponding parts throughout the several views. Objects, features, and advantages of embodiments disclosed herein may be better understood by referring to the following description in conjunction with the accompanying drawings. The drawings are not meant to limit the scope of the claims included herewith. For clarity, not every element may be labeled in every Figure. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating embodiments, principles, and concepts. Thus, features and advantages of the present disclosure will become more apparent from the following detailed description of exemplary embodiments thereof taken in conjunction with the accompanying drawings in which:
[0011] Figure 1 a schematic of an exemplary device 100 for detecting a transitions state in accordance with the present disclosure.
[0012] Figure 2 illustrates a preferred embodiment of a device illustrated in Figure 1 in accordance with the present disclosure.
[0013] Figure 3A illustrates an exemplary 1-bit converter unit (ADC) in accordance with the present disclosure.
[0014] Figure 3B illustrates an exemplary voltage transfer curve (VTC), which is a plot of the input voltage versus the output voltage for a 1-bit converter unit with a given VREF1 for the exemplary converter unit of Figure 3A in accordance with the present disclosure.
[0015] Figure 3C illustrates another exemplary voltage transfer curve (VTC) a plot of the input voltage versus the output voltage for an ADC with a given VREF2, wherein VREF2 is different from VREF1 for the exemplary converter unit of Figure 3A in accordance with the present disclosure.
[0016] Figure 4A illustrates a schematic of an exemplary design of a converter unit with an amplifier having a defined device aspect ratio for each transistor/component in accordance with the present disclosure.
[0017] Figure 4B illustrates an exemplary voltage transfer curve (VTC), which is a plot of the input voltage versus the output voltage for an ADC with a given VREF1 for the exemplary converter unit with an amplifier of Figure 4A in accordance with the present disclosure.
[0018] Figure 4C illustrates another exemplary voltage transfer curve (VTC), which is a plot of the input voltage versus the output voltage for an ADC with a given VREF2, wherein VREF2 is different from VREF1 for the exemplary converter unit with an amplifier of Figure 4A in accordance with the present disclosure.
[0019] Figure 5A illustrates an exemplary voltage biasing of the amplifier of the converter unit by varying an input voltage from 0 Volts - 2 Volts where input voltage is represented as circle and output voltage is represented as square.
[0020] Figure 5B illustrates an exemplary voltage biasing of the amplifier of the converter unit by varying an input voltage of 0 Volts -2 Volt after 10 minutes relaxation period where input voltage is represented as circle and output voltage is represented as square.
[0021] Figure 5C illustrates an exemplary voltage biasing of the amplifier of the converter unit by varying an input voltage of 0 Volts - 1 Volt where input voltage is represented as circle and output voltage is represented as square.
[0022] Figure 5D illustrates an exemplary AC measurement of the converter unit with an amplifier at VREF of 1 Volt in accordance with the present disclosure.
[0023] Figure 5E illustrates an exemplary output voltage recorded for the converter unit with an amplifier at a VREF of 1 Volt connected to voltage divider circuit in accordance with the present disclosure.
[0024] Figure 5F illustrates an exemplary VTC and current characteristics of the device of Figure 1A in accordance with the present disclosure.
[0025] Figure 5G illustrates an exemplary biasing of the device with an input voltage swing between 0V and 1 V while measuring the output voltage of converter unit as well as current passing through the circuit of the device in Figure 2, in accordance with the present disclosure.
[0026] Figure 6 illustrates an exemplary three-bit ADC circuit fabricated in accordance with the present disclosure.
[0027] Figure 7A illustrates the exemplary device prepared as a patch or a tag that may be used on a product.
[0028] Figure 7B illustrates an exemplary embodiment of the patch of Figure 7A used on a product.
DETAILED DESCRIPTION
[0029] Hereinafter, various exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings, where it should be understood that all these drawings and description are only presented as exemplary embodiments and should not be construed as a limiting aspect of the present disclosure. It is to be noted that based on the subsequent description and drawings provided herein, several alternative embodiments may be conceived that may have a structure similar to that disclosed herein and/or formed by a method as disclosed herein, and all such alternative embodiments may be used without departing from the principle and scope of the disclosure as claimed herein, and hence all such alternative embodiments are construed to fall within the scope of the present disclosure.
[0030] All references in the specification made to “one embodiment,” “an embodiment,” “a preferred embodiment,” “a specific embodiment,” “an exemplary embodiment” etc., indicate that the embodiment described herein may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases may not be necessarily referring to the same embodiment. It should also be understood that various terminology used herein is for the purpose of describing a particular embodiment or specific embodiments only, and the use of such terminology is not intended to be limiting with respect to the scope and spirit of the present disclosure. As used herein, the singular forms “a,” “an” and “the” may also include the plural forms, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “has,” “consisting of,” “consists of,” “includes,” and “including” used herein, specify the presence of stated features and/or elements and/or components etc., but do not preclude the presence of one or more other features and/or elements and/or components and/or a combination thereof. For example, the term “multiple” used here may indicate “two or more;” the term “and/or” used here may comprise any or all combinations of one or more of the items listed in parallel. Definitions of other terms will be specifically provided in the following description. Furthermore, in the following description, some functions, or structures well-known to those skilled in the art will be omitted in order not to obscure embodiments of the disclosure in the unnecessary details. Reference to transistors in the present disclosure generally refers to TFTs and/or MOSFETs. In an exemplary embodiments disclosed in the present disclosure, the TFT or MOSFETs or transistors may include a passive source and a passive drain with an ITO (Indium Tin Oxide) substrate, and the semiconducting material used may be Indium Gallium Zinc Oxide (IGZO) with about 10% wt. of Ga, and the processing temperature for preparing the transistor is about 350° Centigrade, wherein the insulator is an electrolyte (CSPE) and the top electrode may preferably be a PEDOT:PSS conducting polymer. It should be obvious to a person of ordinary skill in the art that other elements and/or materials and/or alloys, wherein the materials may include organic materials and inorganic materials or a combination thereof, may be used to prepare the TFT or MOSFETs and all such materials, elements or alloys fall within the scope of the present disclosure.
[0031] It may be appreciated that these exemplary embodiments are provided only for enabling those skilled in the art to better understand and then further implement the present disclosure, and not intended to limit the scope of the present disclosure in any manner. Besides, in the drawings, for a purpose of illustration, optional steps, modules, and units may be illustrated in dotted-line blocks.
[0032] Embodiments of the present disclosure are related generally to a converter unit, for example a 1-bit converter unit, which is also referred to as a converter or switch in the present disclosure, which may be used to determine a transition state or a change of state of any device which it may be a part of or may be integrated with and/or integrated into. In an exemplary embodiment, an improved converter unit will be illustrated, which includes at least four (4) components, wherein the four components are coupled (connected) together in a certain pre-determined format in order to form the converter unit, wherein for each different constant reference voltage (VREF) that is provided or supplied to the converter unit, which is built with the four components, there is a corresponding input voltage for which the output voltage of the converter unit displays a sharp transition in state as it switches from an OFF state (0 Volts) to an ON state (2 Volts). Therefore, in an exemplary embodiment, a continuous input voltage VIN supplied to the converter unit may be discretized into multiple levels with respect to the reference voltage VREF for each of the components that is used to make the converter unit.
[0033] Furthermore, in another exemplary embodiment, which may define another state for the converter unit, the converter unit may be provided with an additional amplifier unit, wherein an input voltage is first received at the amplifier unit and is amplified and the amplified input voltage from the amplifier unit may be fed as an input voltage to the converter unit. In an exemplary embodiment, the voltage received at the amplifier unit may be a few nano volts and the converter unit may not be able to process such low input voltages by itself as a standalone, hence the input voltage may be first routed to the amplifier unit and then the output from the amplifier unit, which is essentially the amplified input voltage may be provided to the converter unit. In the disclosure the words Voltage and Signal are used interchangeably, but essentially mean the same and refer to Voltage. In such a case when the output signal from the amplifier unit, which is essentially the amplified input signal, is fed to the converter unit the converter unit may become more efficient in terms of switching between the two discrete states, wherein a first state may be treated as the OFF state and a second state may be treated as the ON state. These states being discrete may also be considered as a bit representation wherein the OFF state corresponds to 0 and the ON state corresponds to 1.
[0034] Because of this property, any device containing the converter unit as disclosed herein may be used advantageously as a switch, and multiple such converter units coupled to each other in parallel may form a larger converter unit, also referred to as a multi-bit converter unit, which may be used as multiple switches, and such a converter unit may be fabricated as per design requirements based on the application or use of such a converter unit. In an embodiment of the present disclosure, an operation voltage for the whole converter unit may be relatively low, for example as low as 2 Volts, which advantageously may render such the converter unit possible for low ratio power supply operation, such as battery compatible applications or battery-operated applications, which may require low power supply in the range of a few micro-Watts (µW) or a few nano-Watt for operation. In an exemplary embodiment, devices using such a converter unit may include and not be limited to wearable electronics, portable electronics, sensor patches etc.
[0035] In an exemplary embodiment a device for detecting a transition state of a sensor coupled to the device, consisting of the converter unit, is disclosed, wherein the sensor may be part of the device for example embedded into the device or the sensor may be external coupled to the device consisting of the converter unit. In an exemplary embodiment the device as disclosed in the present disclosure includes at least a converter unit, which is configured to receive an input signal VIN directly from a sensor and because the voltage is relatively low, the input signal may be routed to an amplifier coupled to the converter unit for better performance. In an exemplary embodiment, the sensor unit comprises a sensor which is to be monitored for a transition or a change of state. The sensor unit is coupled to the converter unit via an amplifier unit. In an exemplary embodiment, the input signal VIN from the sensor unit is routed via the amplifier unit to the converter unit, wherein the amplifier unit is configured to amplify the input signal and the amplified input signal is then provided for processing to the converter unit. In an exemplary embodiment, the input signal from the sensor is a very low voltage signal of the order of micro volts or nano Volts and hence needs to be amplified before being provided to the converter unit as the converter unit is not designed to process such low voltages that may be received from a sensor in the sensor unit.
[0036] In an exemplary embodiment, the amplifier unit in the device may be configured to amplify the input signal VIN received from the sensor in the sensor unit, and the amplifier unit may be then configured to provide the amplified input signal VIN_AMP to the converter unit for further processing. In an exemplary embodiment, the amplified input signal VIN_AMP may be provided to the converter unit from the sensor, and the converter unit may be maintained at a constant reference voltage VREF, wherein the converter unit may be set at a pre-determined constant reference voltage VREF. In an exemplary embodiment, the converter unit when provided with the amplified input signal VIN_AMP, which may be received from the sensor in the sensor unit via the amplifier unit, the converter unit displays a sharp transition in the output voltage VOUT from the converter unit for the predetermined input voltage VIN at the constant reference voltage VREF.
[0037] In an exemplary embodiment, the converter unit may be further coupled to a current drive unit, wherein the current drive unit may be configured to receive the output voltage signal VOUT from the converter unit and convert the output voltage signal VOUT into a current signal, wherein the current signal can then be measured for example in terms of the power. In an exemplary embodiment, the current drive unit may include a plurality of components, wherein the plurality of components may be configured to significantly increase a power factor associated with the current signal.
[0038] In an exemplary embodiment, the amplifier unit may include at least two components, wherein a first component and a second component are coupled in series. Each of the components and/or element will have a first end and a second end (not shown in the Figure), and the first end and the second end may be interchangeably used. For example, a first end of a first component and/or element may be different to a first end of a second component and/or element, and it should be obvious to a person of ordinary skill in the art that first end and second end is used only for the purpose indicating that the components and/or elements are connected in a prescribed manner. A first end of a first component that may be coupled to a first end of a second component in series across a node. A second end of the first component may be connected to a constant voltage supply VSUPPLY and a second end of the second component may be maintained at a ground potential. In an exemplary embodiment, the input signal VIN may be supplied from the sensor in the sensor unit to the second component of the amplifier unit via a node N5 of the sensor unit. In an exemplary embodiment, the input signal VIN received from the sensor of the senor unit may be low voltage and therefore needs to be amplified before being sent to the converter unit. The input signal VIN may be amplified at the amplifier unit and the amplified signal VIN_AMP, which is now the amplified input signal from the sensor may be provided to the converter unit via node N4 of the amplifier unit.
[0039] In an exemplary embodiment, the converter unit may include a first element and a second element coupled in series, wherein a first end of a first element may be coupled in series to a first end of a second element across a node N1 forming a first module. A second end of the first element may be connected to the constant supply voltage VSUPPLY and a second end of the second element may be connected to a ground potential. In an exemplary embodiment, the converter unit may include a third component coupled in series to a fourth component forming a second module, wherein a first end of the third component is coupled to a first end of the fourth component across a node N2. A second end of the third component may be connected to the constant supply voltage VSUPPLY and a second end of the fourth component may be connected to a ground potential. In an exemplary embodiment, the converter unit comprises a fifth component coupled in series to a sixth component forming a third module, wherein a first end of the fifth component is coupled to a first end of the sixth component across a node N3. A second end of the fifth component may be connected to the constant supply voltage VSUPPLY and a second end of the sixth component may be connected to a ground potential. The first module, second module and the third module may be connected in parallel to form the converter unit.
[0040] In an exemplary embodiment, the reference voltage VREF provided or supplied to the third component of the converter unit is determined by a pre-determined ratio of the first element and the second element of the first module of the converter unit, which may also be referred to as a voltage divider module. In an exemplary embodiment, the reference voltage VREF may be supplied to the controller unit via the node N1 of the first module, i.e., the voltage divider module. In an exemplary embodiment, the reference voltage VREF may be computed as a product of the resistance value of second element times the value of the supply voltage VSUPPLY divided by the sum of the resistance of the first element and the second element in the first module of the converter unit. In an exemplary embodiment, by controlling the values of the first element and the second element in the first module of the converter unit, the reference voltage VREF may be suitably chosen or set to a pre-determined value and may be maintained such that it is kept constant at the pre-determined value.
[0041] In an exemplary embodiment, the input signal VIN from the sensor in the sensor unit may be first amplified at the amplifier unit, and the amplified input signal VIN_AMP from the amplifier unit may be provided to the fourth component of the converter unit from node N4 of the amplifier unit. In an exemplary embodiment, the converter unit may be configured to process the input signal from the sensor, which is amplified, where for a given reference voltage VREF, which is fixed or constant and is predetermined, the output signal VOUT from the converter unit displays a sharp transition from an OFF state to an ON state at a particular value of the input signal supplied to the converter unit, where the output signal VOUT from the converter unit may be drawn across the node N3 connecting the fifth component and the sixth component and then provided to the current drive unit.
[0042] In an exemplary embodiment, the sensor unit may include a third element and a fourth element coupled across a node N5 forming a voltage divider module. A first end of a third element may be coupled to a first end of the fourth element at node N4 and a second end of the third element may be connected to the constant voltage supply voltage VSUPPLY and a second end of the fourth element may be connected to a ground potential. In an exemplary embodiment, the sensor unit may be powered by an external battery source that may be attached to the sensor unit or may be self-powered with a built-in powering system. In an exemplary embodiment, the current drive unit may be configured to convert the voltage signal (output voltage signal from the converter unit) into a current signal and provide a power factor, which may be translated as an indicator, indicating a change of state of a fourth element or the sensor in the sensor unit. In an exemplary embodiment such an indicator may include at least one of text message and/or an audio signal and/or a visual signal and/or a microware signal and/or an electrochemical reaction and/or combination thereof.
[0043] In an exemplary embodiment. the components in the device may be either a TFT or a MOSFET. In an exemplary embodiment, the elements in the device may be resistors, which may either be a constant resistor or a variable resistor. In an exemplary embodiment, the device including the converter unit, the amplifier unit, the current drive unit and the sensor unit may be printed as in printed electronics. In an exemplary embodiment, each of the controller unit, the amplifier unit, the current drive unit and the sensor unit may be printed separately and may be combined to form the device or different elements may be combined together to form parts of the device, for example the converter unit and the amplifier unit may be combined to form a single unit and the single unit may then be coupled to a sensor unit. It should be obvious that various other combinations are possible when each of the units are printed separately, and all such combination fall within the scope of the present disclosure.
[0044] Reference is made to Figure 1, which illustrates a schematic of an exemplary design of a device that is configured to detect a transition state of a sensor attached to the device in accordance with the present disclosure. The main part of the device 100 as illustrated in Figure 1, is a converter unit 110, which in an exemplary embodiment may be referred to as an analog-to-digital converter, and the illustration shows a 1-bit converter unit or a 1-bit ADC. The converter unit 110 as illustrates may be made up of three (3) modules, a first module 110A, a second module 110B and a third module 110C.
[0045] The first module 110A of the converter unit 110 consisting of a first element coupled to a second element in series. A first end of a first element 111 coupled in series to a first end of a second element 113 across a node N1. A second end of the first element 111 is connected to a constant voltage supply VSUPPLY and a second end of the second element 113 is connected to a ground potential. In an exemplary case, the first element 111 and the second element 113 may be resistors. In an exemplary case, a reference voltage VREF is supplied to the third component 112 of the converter unit 110, which is a constant voltage, and the pre-determined voltage is fixed by choosing the values of the first element 111 and the second element 113. In an exemplary embodiment, if the first element 111 has a value of 9 kilo ohm and the second element 113 has a value of 1 kilo ohm, the reference voltage VREF supplied to the converter unit 110 will be 0.2 Volts. Therefore, essentially by changing the values or by choosing appropriate values for the first element 111 and the second element 113, a desired or pre-determined reference voltage VREF may be provided to the third component of the converter unit, and the reference value is maintained to be constant.
[0046] The converter unit 110 further consists of a second module 110B, which has a third component 112 coupled in series to a fourth component 114 across a node N2. A first end of the third component 112 is coupled to a first end of the fourth component 114 across the node N2. A second end of the third component 112 is connected to the constant supply voltage VSUPPLY and a second end of the fourth component 114 is connected to a ground potential. The converter unit 110 further consists of a third module 110C, which has a fifth component 116 coupled in series to a sixth component 118 across a node N3. A first end of the fifth component 116 is coupled to a first end of the sixth component 118 across the node N3. A second end of the fifth component 116 is connected to the constant supply voltage VSUPPLY and a second end of the sixth component 118 is connected to a ground potential. The first module 110A, the second module 110B and the third module 110C are connected in parallel, forming the converter unit 110 or generally also referred to as an analog to digital converter (ADC). The output voltage of the converter unit 110 is measured across Node N3.
[0047] An input voltage supply VIN is supplied to the second component 114 of module 110B where the first component 112 is supplied with a constant reference voltage VREF. For a given reference voltage VREF at a particular value of the input voltage V1, the output voltage VOUT measured across the node N3 of the converter unit 110 displays a sharp transition from an OFF state (0 Volts) to an ON state (2 volts). Noticeably, the input voltage received by the converter unit 110 is typically in the range of micro volts or milli volts, and hence needs to be amplified before being provided to the converter unit 110.
[0048] The device 100 additionally has an amplifier unit 120 connected to the converter unit 110. The amplifier unit 120 includes a first component 122 coupled in series to a second component 124 across a node N4. A first end of the first component 122 and a first end of the second component 124 are connected at node N4, and a second end of the first component 122 is connected to a constant voltage supply VSUPPLY and a second end of the second component 124 is connected to a ground potential. An input signal VIN from the sensor unit 140 is supplied to the amplifier unit 120, and the amplifier unit 120 is configured to amplify the input signal and supply the amplified input signal to the converter unit 110. The sensor unit 140 includes a third element 142 and a fourth element 144 coupled in series across a node N5, wherein a first end of the third element 142 and a first end of the fourth element 144 is connected across a node N4, and a second end the third element 142 connected to the constant supply voltage VSUPPLY and a second end of the fourth element 144 is connected to a ground potential. The sensor unit 140 may further consists of a battery that is configured to power the sensor unit 140. The fourth element 144 may be typically the sensor and the voltage, i.e., the input signal from the sensor 144 in the sensor unit 140 is supplied to the second component 124 of the amplifier unit 120 as input. The input signal is in the order or milli volts or micro volts and needs to be amplified before being processed by the converter unit 110. The amplifier unit 120 amplifies the input signal from the sensor 144 and supplies an amplified input signal VIN_AMP to the fourth component 114 of the converter unit 110 via node N4 of the amplifier unit 120.
[0049] The output voltage VOUT from the converter unit 110 is then routed to a current drive unit 130, which includes a plurality of components 132-1, …, 132-N, connected in parallel, and the output signal is converted to a current signal from which an output power is provided as an indicator 150, which indicates that a transition has occurred at the sensor 144 in the sensor unit 140. For a given reference voltage VREF which is pre- determined and set to be a constant depending on the ratio of the first element 111 and the second element 113 of the converter unit 110, for a given input voltage (signal) VIN, the output signal (voltage) from the converter unit 110 displays a sharp transition from an OFF state (0 volts) to an ON state (2 Volts), wherein the output signal (voltage) is drawn across node N3 of the converter unit 110. The indicator 150 includes at least one of text message and/or an audio signal and/or a visual signal and/or a microware signal and/or an electrochemical reaction and/or combination thereof.
[0050] In a preferred embodiment, the first element 111, the second element 113, the third element 142 and the fourth element 144 may be resistors, whose values may be pre-determined. In another preferred embodiment, the third element 142 and the first element 111 may be variable resistors. In a preferred embodiment, the module 110A of the converter unit 110 and the sensor unit 140 may be referred to as voltage divider units. In a preferred embodiment, the fourth element 144 may be a sensor attached modules of the device 100 as applicable, for example, the sensor 144 may be attached to the amplifier unit 120 or the converter unit 110, and the sensor 144 may be powered by a battery unit 145, which may be built into the sensor unit 140 and/or may be external to the sensor unit 140. In a specific embodiment, the first component 122 and the second component 124 in the amplifier unit 120, the third component 112, the fourth component 114, the fifth component 116 and the sixth component 118 in the converter unit 110 and the plurality of components 132-1, …, 132-N in the current drive unit 130 may be transistors and/or TFTs and/or MOSFETS, as will be discussed below. The converter unit 110 formed by the two element (first element and second element) and the four components may be generally referred to as 1-bit converter unit or also referred to as a 1-bit ADC.
[0051] Reference is made to Figure 2, which illustrates an exemplary embodiment of a device 200 that is configured to indicate a transition state in accordance with the present disclosure. The device 200 as illustrated herein may be a specific or preferred implementation of the device as 100 illustrated in Figure 1. Each unit of the device will be specifically described. The transistors referenced to herein with respect to This figure and in the present disclosure may be TFTs and/or MOSFETs. These TFTs and/or MOSFETS most commonly fabricated by the controlled oxidation of silicon, which has an insulated gate, and the voltage of which determines the conductivity of the MOSFET, and it should be obvious that TFTs and MOSFETS made using other techniques also fall within the scope of the present disclosure.
[0052] The device 200 as illustrated in Figure 2, has a converter unit 210 (a 1-bit ADC) which is the main unit of the device 200. The exemplary converter unit 210 (hereinafter also referred to as an ADC) illustrates an exemplary design of a 1-bit analog-to-digital converter (ADC) which may have a defined device aspect ratio for each transistor (hereinafter the word transistor would broadly refer to TFTs or MOSFETs). As illustrated the simplified design of the converter unit 210 consists of four (4) transistors arranged in a particular sequence forming the 1-bit converter unit or the 1-bit ADC unit 210. Additionally, the converter unit 210 has two resistors coupled to the four transistors in a particular sequence, such that the reference voltage supplied to the transistors may be determined by a value of the resistors. The four transistors are connected in a manner such that, for each different and constant reference voltage (VREF) supplied to the converter unit 210, there is a corresponding input voltage VIN at which the output voltage (VOUT) of the converter unit 210 switches from an OFF (0 Volts) state to an ON state (2 Volts), essentially making the converter unit behave as a switch between two binary states.
[0053] As illustrated in exemplary Figure 2, four (4) transistors are connected to form an ADC 210, which for example may be used as a switching device. The converter unit 210 consists of 3 modules, a first module 210A, a second module 210B and a third module 210C. The first module 210A is formed by connecting a first resistor 211 and a second resistor 213 in series across a first node N1, wherein a first end of the first resistor 211 and a first end of the second resistor are connected at the node N1. A second end of the first resistor 211 is connected to a common supply voltage VSUPPLY, and a second end of the second resistor 213 is maintained at a ground potential. The reference voltage VREF supplied to the converter unit 210 is determined by a pre-determined ratio of the value of the first resistor 211 and the value of the second resistor 213 of the first module 210A. The first module 210A may also be referred to as a voltage divider module. In an exemplary embodiment, the reference voltage VREF is for the controller unit 210 is supplied to the via the node N1 of the first module 210A, i.e., the voltage divider module, in the controller unit 210.
[0054] In an exemplary embodiment, the reference voltage VREF may be computed using the formula - resistance value of second resistor 213 multiplied with the value of the supply voltage VSUPPLY divided by (sum of the resistance value of the first resistor 211 and the second resistor 213), which may be represented as symbolically as [(R213 * VSUPPLY) / (R211 + R213)]. Therefore, it should be obvious to a person of ordinary skill in the art that by controlling or appropriately selecting the value of the first resistor 211 and the value of the second resistor 213 the reference voltage VREF may be suitably determined and set to the pre-determined value. In an exemplary case when R211 = 1 kilo Ohm and R213 = 9 kilo ohm, the reference voltage computed using the above formula may be around 0.2 Volts.
[0055] The converter unit 210 further consists of a second module 210B, which consists of two transistors, a first transistor 212 coupled in series to a second transistor 214. A source terminal of the first transistor 212 is connected to a drain terminal of the second transistor 214 across a node N2. A source terminal of the second transistor 214 is connected to the ground potential and a drain terminal of the first transistor 212 is connected to a common supply voltage VSUPPLY. The converter unit 210 further consists of a third module 210C consisting of two transistors, a third transistor 216 coupled in series to a fourth transistor 218. A source terminal of the third transistor 216 is connected to a drain terminal of the fourth transistor 218 across a node N3. A source terminal of the fourth transistor 218 is connected to the ground potential and a drain terminal of the third transistor 216 is connected to the common supply voltage VSUPPLY. The first module 210A, the second module 210B and the third module 210C are now connected in parallel to form the converter unit 210, which is the 1-bit converter unit or the 1-bit ADC. In the present disclosure, hereafter reference to source means source terminal of the transistor, reference to drain means drain terminal of the transistor and reference to gate means gate terminal of the transistor.
[0056] In an exemplary embodiment, in the absence of the amplifier unit 220, the reference voltage for the converter unit 210 is provided from the node N1 to a gate of the first transistor 212, and the reference voltage may be predetermined as discussed previously and can be preset to be at a constant value. An Input voltage (signal) VIN may be provided to a gate of the second transistor 214, which may be received directly from a sensor 244 (directly to the transistor 214, in the absence of the amplifier unit 220). However, since the input voltage is in the order of milli volts or micro volts, the input voltage to the transistor 214 of the converter unit 210 requires to be amplified, which may be done by an amplifier unit 220 attached to the converter unit 210, between the converter unit 210 and the sensor unit 240, and will be discussed later. Node N2 connects a source of transistor 212 and a drain of transistor 214 in the second module is further connected to a gate of transistor 218 of the third module 210C of the converter unit 210. An output voltage from the converter unit 210 is taken from node N3 of the third module 210C of the converter unit 210.
[0057] Since the input signal (also referred to as input voltage) VIN from a sensor 244 or the sensor unit 240 is in the order of milli volts or micro volts or lesser, the input signal from the sensor 244 in the sensor unit 240 needs to be amplified for the converter unit 210 to be able to process the input signal, and hence the input signal is amplified by an amplifier unit 220, and the amplified signal is supplied to the converter unit 210. The sensor unit 240 consists of a first resistor 242 and a second resistor 244 coupled across a node N5, wherein a first end of the first resistor 242 and a first end of the second resistor 244 is coupled to the node N5. A second end of the first resistor 242 is connected to a common supply voltage VSUPPLY, and a second end of the second resistor 244 is maintained at a ground potential. In a preferred exemplary embodiment, the second resistor 244 may be a variable resistor or may be a sensor, which is being monitored. The sensor 244 may include and not be limiting to a temperature sensor or any kind of other sensor like a humidity sensor, a proximity sensor, a gas sensor, a gas leakage sensor, a fire sensor, a smoke sensor etc, and it should be obvious to one of ordinary skill in the art that any type of sensor may be used and all such illustration and embodiments fall within the scope of the present disclosure. The sensor 244 may be connected to a battery source 245 which powers the sensor 244, or in an alternate exemplary embodiment may be self-powered.
[0058] The input signal (input voltage) from the sensor VIN is provided to a gate of the first transistor 224 of the amplifier unit 220 across node N5 of the sensor unit 240. The output, i.e., the amplified input signal from the amplifier unit 220 VIN_AMP (which is the amplified input voltage from the sensor) and may be provided to the gate of the second transistor 214 of the converter unit 210, wherein the amplified input signal may be taken across Node N4 of the amplifier unit 220. A reference voltage is provided to the gate of the first transistor 212 of the converter unit 210 from the Node N1. An output voltage VOUT of the device comprising the amplifier unit 220 and the converter unit 210 may be measured across Node N3 of the converter unit 210. As mentioned previously, the reference voltage can be preset and is a constant, and for a given fixed or constant reference voltage, at a given input voltage, the output voltage displays a sharp transition from an OFF state to an ON state.
[0059] The output voltage from the converter unit 210 may be provided to a current drive unit 230, wherein the output voltage VOUT is converted into a current signal and then measured in terms of a power factor or as an indicator, wherein the indicator may indicate that a transition has occurred, The current drive circuit 230 has a plurality of transistors coupled in parallel, wherein a gate of the transistor 232-1 is connected to the node N3 which provides the output voltage VOUT, a drain of the transistor 232-1 is connected to the constant voltage supply VSUPPLY, and a source of the transistor 232-1 is connected to the ground and maintained at a ground potential. Each multiple transistor in the current drive unit 230 is connected to the previous transistor wherein a gate of each of the previous transistor 232-1 is connected to a gate of the next transistor 232-2, a drain of each of the plurality of transistors 232-1, …,232-n is connected to the constant voltage supply VSUPPLY, and a source of each of the plurality of transistors 232-1, …, 232-n, until all the plurality of transistors are connected in parallel forming the current drive unit 230 and the current drive unit 230 may be connected to an indicator at one end and the other end of the indicator is connected to the ground and kept at a ground potential. The indicator may include and not be limited to at least one of a text message and/or an audio signal and/or a visual signal and/or a microware signal and/or a electrochemical reaction signal and/or combination thereof. As illustrated the TFTs/MOSFETS and resistors may be once specific or preferred embodiment that may be implemented in the manner illustrated, and it must be obvious to a person or ordinary skill in the art that these may be replaced by other suitable components having an equivalent functionality and all such variations to the device fall under the scope of the present disclosure.
[0060] Reference is now made to Figure 3A, which illustrates a preferred or specific schematic of an exemplary design of a 1-bit converter unit, also referred to as a 1-bit an analog-to-digital converter (ADC) 310, which is same as the converter unit 110 of Figure 1 and converter unit 210 of Figure 2 having a defined device aspect ratio for each transistor in accordance with the present disclosure, illustrating a preferred embodiment. A simplified design of preferred embodiment of the 1-bit ADC 310 consists of four (4) transistors (T1, T2, T3 and T4), wherein the four transistors coupled together in a particular or specific format forms the 1-bit ADC 310. The transistors (T1, T2, T3 and T4) are connected in a manner that, for each different reference voltage (VREF), which is a constant, that is supplied to the 1-bit ADC 310, there is a corresponding different input voltage at which the output voltage of the 1-bit ADC 310 switches from an OFF (0 Volts) state to an ON state (2Volts).
[0061] As illustrated in exemplary Figure 3A, the four (4) transistors T1, T2, T3 and T4 connected in the prescribed format to form a 1-bit ADC 310, which for example may be used as a switching device. The transistors T1, T2, T3 and T4 referenced herein may be TFTs or MOSFETs. The most commonly fabricated by the controlled oxidation of silicon, which has an insulated gate, and the voltage of which determines the conductivity of the MOSFET. A first module 310A if formed by connecting two resistors R1 and R2 in series. A first end of resistor R1 is coupled to a first end of resistor R2 across node N1. A second end of resistor R1 is connected to the constant voltage supply and a second end of resistor R2 is connected to the ground and maintained at a ground potential. The reference voltage VREF is determined by varying the resistors R1 and R2 as has been described previously. A second module 310B is formed by connecting two transistors T1 and T2 in series wherein a source of transistor T2 is connected to a drain of transistor T1. A third module 310C is formed by connecting two transistors T3 and T4 in series, wherein a source of transistor T4 is connected to a drain of transistor T3. A drain of transistor T2 is connected to a drain of transistor T4, and a common VSUPPLY (biasing voltage) is supplied/provided to the connected point of the drain of Transistor T2 and the drain of Transistor T4. Similarly, a source of transistor T1 is connected to the source of the transistor T3, and the source of the transistors T3 and a source of transistor T4 are maintained at a ground potential. The first module 310A, second module 310B and third module 310C are connected in parallel forming the 1-bit ADC.
[0062] In the second module 310B, a source of transistor T2 is connected to a drain of transistor T1 such that transistor T1 and transistor T2 are connected in series. The node N2 between a source of Transistor T2 and a drain of transistor T1 in the second module 310B is connected to a gate of transistor T3 in the third module 310C. A drain of transistor T2 in the second module 310B is connected to a drain of transistor T4 in the third module 310C, across which a constant supply voltage VSUPPLY may be provided. A source of transistor T1 in the second module 310B and a source of transistor T3 in the third module 310C are connected and maintained at a ground potential. A drain of transistor T2 in the second module 310B is connected to a drain of transistor T4 in the third module 310C are connected maintained at the constant voltage supply. The second module 310B comprising two transistors T1 and T2, which are connected in series, is then connected in parallel to the third module 310C, which comprises transistors T3 and T4, where transistors T3 and T4 are connected in series, and the second module 310B and the third module 310C are connected to the voltage divider module, the first module 310A in parallel. Therefore, the first module 301A, the second module 310B and the third module 310C are connected in parallel to form the 1-bit ADC or 1-bit converter unit.
[0063] A gate of transistor T4 in the third module 310C is connected to a node N3 between a source of transistor T4 and a drain of transistor T3 in the third module 310C. An output voltage VOUT of the 1-bit ADC 310 or the converter unit 310 may be measured across the node N3 connecting the source of transistor T4 and the drain of transistor T3 in the third module 310C. The source of transistor T2 is connected to the drain of transistor T1 in the second module 310B, and the node N2 forming the connection between the source of transistor T2 and the drain of transistor T1 in the second module 310B is connected to the gate of transistor T3 in the third module 310C. An input Voltage VIN is supplied/provided to the gate of transistor T1 in the second module 310B and the gate of transistor T2 in the second module 310B is maintained at a constant reference voltage VREF, which may be kept constant for every given case and the input voltage may be varied to determine the transition point. The reference voltage may be varied depending on the value of the resistors R1 and R2 of the first module 310A.
[0064] In an exemplary embodiment the W/L ratio (µm/µm), where L is the length of the channel and W is the width of the channel for the transistors may be as follows, for transistor T1 the W/L may be around 20/50, for transistor T2 the W/L may be around 50/50, for transistor T3 the W/L may be around 20/50 and for transistor T4 the W/L may be around 50/20. The W/L ratio for the TFT’s may determine the current carry capability of the circuit. It should be obvious that different W/L ratios may be used for the transistors, and it may be imperative to maintain the W/L ratio as specified above for the transistors, and the use W/L ratios to create a 1-bit ADC switch falls within the scope of the present disclosure.
[0065] As illustrated the transistor T1 and the transistor T2 are coupled in series forming the second module 310B and similarly the transistor T3 and the transistor T4 are coupled in series forming the third module 310C, and the resistor R1 and the resistor R2 are coupled in series forming the voltage divider unit first module 310A, wherein the resistor R1 and the resistor R2 can be varied to fix the reference voltage that is input to the 1-bit ADC. The first module 310A, the second module 310B and the third module 310C are connected in parallel to form the 1-bit ADC 310, which can act for example and not limiting to as a switch or a gate in accordance with the present disclosure.
[0066] An Input voltage VIN is supplied to the gate of transistor T1 of the second module 310B, and a reference voltage VREF is provided to the gate of transistor T2 of the second module 310B. As described previously, the transistor T1 and the transistor T2 are coupled in series, forming the second module 310B. The second module 310B is coupled to the third module 310C in parallel, where the third module 310C has the transistor T3 and the transistor T4 coupled in series. An output Voltage VOUT for the 1-bit ADC 310 may be measured across a node N3 connecting the drain of transistor T3 is connected to the source of transistor T4.
[0067] In an exemplary embodiment, the output voltage VOUT may be indicated by different means, such as providing an alert when the state changes from OFF state (0 Volts) to ON state (2 Volts) by means of an indicator or any other means that may be devised by a person of ordinary skill in the art essentially showing that a transition has occurred. The indicator may include and not be limiting to at least one of providing a text message and/or providing an audio signal and/or providing a visual signal and/or an audio-visual signal and/or a microware signal and/or a combination thereof. In an exemplary embodiment, the 1-bit ADC may be configured to work for different reference voltages VREF by varying the resistance values of the resistor R1 and the resistor R2 in the first module 310A, such that when the refence voltage is at a preset or fixed at particular value, then for that fixed value of the reference voltage, for a particular input voltage VIN there is a sharp change in the output voltage VOUT displayed by the 1-bit ADC and the change in the output voltage may be indicated by any one of the means as indicated above.
[0068] For example, when reference voltage VREF is fixed to be constant at 0.5 volts, the visual indication provided by the circuit may be a green light and when the reference voltage VREF is fixed to be a constant at 0.7 volts the visual indication may be a red light. In an exemplary embodiment, the output voltage VOUT may be connected to two LEDs such that for a given reference voltage VREF which is constant, the visual indicator provided by the 1-bit ADC may be that a yellow LED glow indicating that the output voltage VOUT is 0 Volts, and when there is a state of change or transition, i.e., when the output voltage VOUT switches from 0 Volts to 2 Volts, a green LED may glow. Various other permutations and combinations may be possible with the circuit, and it should be obvious to one of ordinary skill in the art that all these different permutations and combinations related to providing an indication for a change of state with respect to the circuit fall within the scope of the present disclosure.
[0069] Reference is now made to Figure 3B, which illustrates an exemplary voltage transfer curve (VTC), a plot of the input voltage versus the output voltage for a 1-bit ADC with a given VREF for the exemplary -bit ADC of Figure 3A, which is the converter unit of the device of Figure 1 and Figure 2. The illustration in Figure 3B schematically shows a plot 350 of the input Voltage VIN along the x-axis in Volts versus the VOUT on the y-axis in Volts, wherein the reference voltage is kept at a pre-determined value. When the reference Voltage VREF is kept constant at 0.1 Volt and the input voltage VIN is varied from 0 Volts to 2 Volts, the output voltage VOUT from the 1-bit ADC is fairly constant until the input voltage VIN reaches about 0.52 Volts, and when the input voltage VIN reaches the point around 0.52 Volts, a sharp jump or sharp transition is noticed in the output voltage VOUT from 0 Volts to 2 Volts and beyond the transition state of 0.52-0.53 Volts, the output voltage VOUT remains constant at 2 Volts. Therefore, the 1-bit ADC behaves as a switch when there is a constant reference voltage VREF applied to the 1-bit ADC and input voltage VIN is varied within a fixed range from V1 volts to V2 volts. At an input voltage VIN of around 0.52 – 0.53 Volts, the 1-bit ADC shows a dramatic effect of a steep increase or a sharp spike in the output voltage VOUT, from an initial state of 0 Volts to 2 Volts, for a varying VIN and a constant VREF. The sharp increase noticed in the output voltage is not a gradual increase but is a sudden transition or a change of state, thereby allowing the 1-bit ADC (converter unit) to behave as a switch, wherein 0 Volts may represent the OFF state and 2 Volts may represent the ON state, or in binary form 0 Volts may correspond to or be mapped to the binary digit 0 and 2 Volts may correspond to or be mapped to binary digit 1. Therefore, for a reference voltage VREF of 0.1 volts, a transition is observed in the output voltage VOUT from 0 Volts to 2 Volts in the 1-bit ADC when the input voltage VIN is in the range of about 0.52 Volts, thus making the 1-bit ADC behave as a switch.
[0070] Again, the reference voltage VREF is kept constant at about 0.2 Volts and the input Voltage VIN is varied from 0 Volts to 2 Volts. The output voltage VOUT is constant at about 0 Volts when the input voltage VIN varies from 0 Volts till about 0.6 Volts. When the input voltage VIN is about 0.6 Volts there is a sharp and distinct transition or change in the output voltage VOUT from to 0 Volts to 2 Volts. Variation of the input voltage VIN beyond 0.6 Volts to 2 Volts does not show any change or transition in the output voltage VOUT, which is almost constant at 2 Volts, for the circuit. Therefore, for a reference voltage VREF of 0.2 volts, a transition is observed in the output voltage VOUT from 0 Volts to 2 Volts when the input voltage VIN is about 0.6 Volts, making the 1-bit ADC behave as a switch.
[0071] Again, the reference voltage VREF is kept constant at about 0.3 Volts and the input Voltage VIN is varied from 0 Volts to 2 Volts. The output voltage VOUT is constant at about 0 Volts when the input voltage VIN varies from 0 Volts to about 0.65 Volts. When the input voltage VIN is about 0.65 Volts there is a sharp and distinct transition or change in the output voltage VOUT from 0 Volts to 2 Volts. Variation of the input voltage VIN beyond 0.65 Volts to 2 Volts does not show any change or transition in the output voltage VOUT, which is almost constant at 2 Volts, for the circuit. Therefore, for a reference voltage VREF of 0.3 volts, a transition is observed in the output voltage VOUT from 0 Volts to 2 Volts when the input voltage VIN is about 0.65 Volts, making the 1-bit ADC behave as a switch.
[0072] Again, the reference voltage VREF is kept constant at about 0.4 Volts and the input Voltage VIN is varied from 0 Volts to 2 Volts. The output voltage VOUT is constant at about 0 Volts when the input voltage VIN varies from 0 Volts to about 0.69 Volts. When the input voltage VIN is about 0.69 Volts there is a sharp and distinct transition or change in the output voltage VOUT from to 0 Volts to 2 Volts. Variation of the input voltage VIN beyond 0.69 Volts to 2 Volts does not show any change or transition in the output voltage VOUT, which is almost constant at 2 Volts, for the 1-bit ADC. Therefore, for a reference voltage VREF of 0.3 volts, a transition is observed in the output voltage VOUT from 0 Volts to 2 Volts when the input voltage VIN is about 0.69 Volts, making the 1-bit ADC behave as a switch.
[0073] Again, the same process is repeated in steps of changing VREF in steps of 0.1 Volts, and the reference voltage VREF is kept constant at the changed VREF, for example 0.5 Volts, 0.6 Volts until 0.9 Volts and the input Voltage is varied from 0 Volts to 2 Volts. The output voltage VOUT is constant at about 0 Volts but when the input voltage VIN varies from 0 Volts to about 0.72 to 0.75 Volts. When the input voltage is between 0.72 and 0.74 Volts for a reference voltage VREF range of 0.5 to 0.9 Volts, there is a sharp and distinct transition or change in the output voltage VOUT from to 0 Volts to 2 Volts. Therefore, at higher reference voltage VREF, typically in the order of 0.7 Volts to 1.0 Volt, it appears that the transition in the output voltage VOUT is much closer and happens when the input voltage is in the range of 0.72 to 0.75 Volts. Therefore, for a constant reference voltage VREF (in the range of 0.1 to 0.9 Volts) a sharp and distinct transition is observed in the output voltage VOUT from 0 Volts to 2 Volts when the input voltage VIN, is in the range of about 0.52 to 0.74 Volts, making the 1-bit ADC behave as a switch, switching from an OFF state to an ON state of in binary form this could be related to 0 and 1.
[0074] Reference is now made to Figure 3C, which illustrates another exemplary voltage transfer curve (VTC) a plot 360 of the input voltage versus the output voltage for an ADC with a given VREF, wherein VREF is different from VREF for the exemplary ADC of Figure 3A. The reference voltage VREF is kept constant at about in the range of about 1.0 Volts to 2.0 Volts and increased in steps of 0.1 Volts, and the input Voltage is varied from 0 Volts to 2 Volts. The output voltage VOUT is constant at about 0 Volts but when the input voltage VIN varies from 0 Volts to about 0.74 Volts. When the input voltage is about 0.74 Volts to about 0.79 Volts, for each reference voltage VREF (incremented in steps of 0.1 Volt) there is a sharp and distinct transition or change in the output voltage VOUT from to 0 Volts to 2 Volts. Variation of the input voltage VIN beyond 0.79 Volts to 2 Volts does not show any change or transition in the output voltage VOUT, and VOUT is almost constant at 2 Volts, for the circuit. Therefore, for a constant reference voltage VREF, which is incremented in steps of 0.1 Volts from 0 Volts to 2 Volts, a sharp transition or a change in state is observed in the output voltage VOUT from 0 Volts to 2 Volts when the input voltage VIN is in the range of 0.52 Volts till about 0.79 Volts depending on the reference voltage VIREF making the 1-bit ADC behave as a switch. Since the increase noticed in the output voltage VOUT is not gradual but a sudden transition for a constant reference voltage VREF and for a given input voltage VIN, the 1-bit ADC behaves as a switch, wherein 0 Volts may represent the OFF state and 2 Volts may represent the ON state, or in binary form 0 Volts may correspond to 0 state and 2 Volts may correspond to 1 state. Because of this sharp transition or change of state, the 1-bit ADC or converter unit of Figure 3A may be advantageously used as a switch.
[0075] Reference is now made to Figure 4A, which illustrates a schematic of an exemplary design of an amplifier along with a 1-bit ADC with a defined device aspect ratio for each transistor in the amplifier unit and the converter unit in accordance with the present disclosure. As illustrated in exemplary Figure 4A, a 1-bit ADC 410, along with an additional amplifier 420. The need for the amplifier 420 arises because the input voltage or input signal received from a sensor coupled to the 1-bit ADC is of the order of a few micro or milli volts and hence needs to be amplified before being supplied to the 1-bit ADC.
[0076] The 1-bit ADC 410 is the same as the 1-bit ADC described in exemplary Figure 3A and hence discussion of the 1-bit ADC or the 1-bit converter unit will be omitted here, and reference to this part is made to Figure 3A. It should be obvious to a person of ordinary skill in the art that the 1-bit ADC referred to in Figure 4A is similar to the 1-bit ADC of Figure 3A and works in the same way as the ADC of Figure 3A, which includes four (4) transistors T1, T2, T3 and T4 connected together as described in Figure 3A. However, in the illustration of Figure 4A, the 1-bit ADC 410 is provided with an additional amplifier unit 420, which consists of two transistors, a first transistor T5 and a second transistor T6 connected in series forming a single amplifier unit 420, and the amplifier unit 420 is then connected in parallel to the converter unit 410.
[0077] A drain of the second transistor T6 of the amplifier unit 420 is provided with a VSUPPLY, a source of first transistor T6 of the amplifier unit 420 is connected to drain of Transistor T5. A source of transistor T5 is kept at ground potential. The amplifier unit 420 including the transistor T5 and the transistor T6 is connected in parallel to the 1-bit ADC 410, wherein a gate of second transistor T6 of the amplifier unit 420 is connected to a gate of transistor T1 of the converter unit 410. An input voltage VIN is supplied to the gate of first transistor T5 of the amplifier unit, and the amplified voltage from the amplifier unit 420 is supplied to the gate of transistor T1 of the converter unit 410. The amplifier unit 420 and the converter unit 410 are connected or coupled in parallel forming the 1-bit converter unit with an amplifier.
[0078] In an exemplary embodiment the W/L ratio (µm/µm), where L is the length of the channel and W is the width of the channel for the transistors may as follows, where for transistor T1 the W/L may be around 20/50, for transistor T2 the W/L may be around 50/50, for transistor T3 the W/L may be around 20/50, for transistor T4 the W/L may be around 50/20, for transistor T5 the W/L may be around 20/50, and for transistor T6 the W/L may be around 50/20. The W/L ratio for the TFT’s determines the current carry capability of the circuit. It should be obvious that different ratios may be used for the W/L ratio of the transistors, however it may be imperative to maintain the W/L ratio as specified above, and the use of W/L ratios to create a 1-bit ADC switch using a similar element falls within the scope of the present disclosure.
[0079] Reference is now made to Figure 4B, which illustrates an exemplary voltage transfer curve (VTC), a plot of the input voltage versus the output voltage for a given reference voltage VREF for the exemplary ADC circuit of Figure 4A, and wherein the reference voltage VREF varies from 0.1 volt to 2 volts in steps of 0.1 Volts. The plot illustrates input voltage VIN on the x-axis versus output voltage VOUT on the y-axis, wherein the reference voltage VREF to the 1-bit ADC/1-bit converter (herein reference to the 1-bit ADC or the 1-bit converter means the converter unit and the amplifier unit as illustrated in exemplary Figure 4A) is increased in step of 0.1 volt, and measurement are made for reference voltage VREF from 0.1 Volt to 0.9 Volt. When the reference voltage VREF is at a constant voltage of 0.1 volts, and input voltage VIN is gradually increased from 0 Volts to 2 Volts, at an input voltage of 0.24 Volts, there is a sharp transition, where the output voltage VOUT changes state from 2 Volts to 0 Volts. Similarly, for a constant reference voltage VREF of 0.2 volts, the transition in the output voltage VOUT is noticed at an input voltage VIN of 0.39 volts and for a constant reference voltage of VREF 0.3 volts the transition in the output voltage VOUT is noticed at an input voltage VIN of 0.45 volts and for a constant reference voltage VREF of 0.4 volts the transition in the output voltage VOUT is noticed at an input voltage VIN of 0.48 volts, for a constant reference voltage VREF of 0.5 volts the transition in the output voltage VOUT is noticed at an input voltage VIN of 0.5 volts, and so on, and for constant reference voltage VREF of 0.9 volts the transition in the output voltage VOUT is noticed at input voltage VIN of 0.57 volts. For a constant reference voltage VREF of 0.5 volts to 0.9 volts the transition in the output voltage VOUT from 2 volts to 0 volts, i.e., a state change occurs in a relatively narrow band in the range of 0.5 volts to 0.58 volts, wherein at a low reference voltage VREF between 0.1 volt to 0.4 volts the transition in the output voltage VOUT is spread over a wider region between 0.2 Volts to about 0.48 Volts. In contrast to the 1-bit ADC of Figure 3A without an amplifier, when the reference voltage VREF varies between 0.1 volts to 0.9 volts, wherein the output voltage VOUT transition is noticed between an input voltage of 0.52 volts to 0.75 volts, in the ADC circuit with the amplifier of Figure 4A, the output voltage VOUT transition is between noticed an input voltage VIN of 0.23 volts to 0.55 volts.
[0080] Reference is now made to Figure 4C, which illustrates another exemplary voltage transfer curve (VTC) a plot of the input voltage VIN versus the output voltage VOUT for a given reference voltage VREF, wherein reference voltage VREF varies from 1 Volt to 2 Volts for the 1-bit ADC (the converter unit with an amplifier as illustrated in Figure 4A). The reference voltage VREF is kept constant and varied in steps of 0.1 Volt between 1 Volt and 2 Volts for an input voltage VREF that is varied from 0 Volts to 2 Volts. At a reference voltage VREF of 1 Volt, a transition in the output voltage VOUT is observed at an input voltage VIN of 0.59 Volts, and for a reference voltage VREF of 1.1 Volts transition in the output voltage VOUT occurs at an input voltage VIN of 0.595 Volts, and so on for a reference voltage VREF of 2 Volts the transition in the output voltage VOUT is noticed at when the input voltage VIN is at 0.67 Volts. The range is narrower when the reference voltage VREF is varied between 1 Volt and 2 Volts, where the transition in the output voltage VOUT occurs between an input voltage VIN of 0.59 Volts to 0.67 Volts vis-à-vis the earlier 1-bit ADC of Figure 3A, where the transition of this region occurs between an input voltage VIN of 0.74 volts to 0.79 volts. Notice that in measurement plots illustrated in Figure 4B and Figure 4C, because of the use of an amplifier unit 420, the output voltage VOUT is initially at 2 Volts and then drops to 0 Volts at the transition point and remain at 0 Volts after that. Again, this indicates a transition in a state where in the output voltage VOUT at 2Volts can be referred to the ON state and the output voltage VOUT at 0 Volts may be referred to as the OFF state, or vice-versa. Essentially the 1-bit ADC operates as a switch and may be advantageously used in devices especially low powered battery-operated devices.
[0081] Again, as illustrated in Figures 4A, Figures 4B and Figures 4C, the 1-bit ADC with amplifier of Figure 4A acts an inverse switch, wherein when the input voltage VIN varies from 0 Volts to 2 Volts, a sharp transition is observed for a given reference voltage VREF where the output voltage VOUT drops from 2 Volts to 0 Volts, making the circuit act as a switch. In an exemplary embodiment, the output voltage VOUT may be indicated by various different means, such as providing an alert when the state changes, i.e., the output voltage may drop from 2 Volts to 0 Volts and/or by providing a text message and/or providing an audio signal and/or providing a visual signal and/or a combination thereof. In an exemplary embodiment, the 1-bit ADC with an amplifier may be configured for different reference voltages VREF, such that when the refence voltage VREF is at a particular value and the output voltage VOUT changes at the transition point, an external indication may be provided.
[0082] For example, when reference voltage VREF is 0.5 volts, a visual indication may be a green light and when the reference voltage VREF is 0.7 volts the visual indication may be a red light. In an exemplary embodiment, the output voltage VOUT may be connected to two LEDs such that for a given reference voltage VREF when the output voltage VOUT is 2 Volts a yellow LED glows and when there is a state of change or transition, wherein the output voltage VOUT switches from 2 Volts to 0 Volts, a green LED may glow. In an exemplary embodiment, a single LED may be configured to change its color, being yellow when the output voltage VOUT is 2 Volts and change its color to green when the output voltage VOUT drops to 0 Volts, or in other words when the LED changes color indicating that there is a state change or a transition in the output voltage VOUT. Various other combinations are possible, and it should be obvious to one of ordinary skill in the art that all these different combinations of providing an indication of a change of state fall within the scope of the present disclosure.
[0083] In an exemplary embodiment, a simplified design of a 1-bit ADC consisting of four transistors connected as disclosed in Figure 3A, where for each different reference voltage VREF, there is a corresponding different input voltage VIN at which the output voltage VOUT switches from OFF (0 Volt) to ON (2 Volts) as illustrated in Figure 3B and Figure 3C. Therefore, the continuous input voltage VIN can be discretized into multiple levels with respect to the reference voltage VREF, i.e., by changing the reference voltage VREF. Furthermore, with an additional amplifier unit 420 (amplifier) whose output is fed as input to the 1-bit ADC 410, make the 1-bit ADC with the amplifier more efficient in terms of switching as illustrated in Figure 4B and Figure 4C. The operation voltage for the whole 1-bit ADC with or without the amplifier is as low as 2 Volts, which makes it possible for low power operating devices such as battery compatible device applications or battery-operated devices such as wearable electronics, portable electronic devices, and sensor patches where the requirement of power supply is quite low operating typically in the range of a few micro-Watt (µW).
[0084] Reference is now made to Figure 5A, which illustrates an exemplary voltage biasing of the amplifier of an ADC circuit by varying an input voltage of from 0 Volts - 2 Volts, where the circle symbols represent the input voltage and the squares represents the output voltage. The figure illustrates time on the x-axis versus a response of output voltage VOUT with respect to input voltage VIN. The measurement illustrates that at a particular reference voltage VREF, the output voltage VOUT changes its state from 0 Volts to 2 Volts with respect to input voltage VIN swing from 2 Volts to 0 Volts for over 5 hours. After that the states of output voltage VOUT slowly become indifferent and can become unreliable.
[0085] Reference is now made to Figure 5B, which illustrates an exemplary voltage biasing of the amplifier of an ADC circuit by varying an input voltage of 0 Volts - 2 Volt. After 10 minutes of relaxation period, where the circle symbols represent the input voltage and the squares represents output voltage in accordance with the present disclosure. Therefore, with a relaxation period of about 10 minutes the 1-bit ADC with an amplifier performs reliably again.
[0086] Reference is now made to Figure 5C, which illustrates an exemplary voltage biasing of the amplifier of an ADC circuit by varying an input voltage of 0 Volts - 1 Volt, where the circle symbols represent the input voltage and the squares represents output voltage. The illustration is of time on the x-axis versus a response of output voltage VOUT with respect to input voltage VIN. In this case the measurements illustrate that at a particular reference voltage VREF where it indicates the output voltage VOUT changes its state from 0 Volts to 2 Volts with respect to input voltage VIN swing from 0 Volts to 1 Volt, indicating that the same 1-bit ADC performs in an excellent condition more than 18 hours, i.e., a relatively long period of time when the applied input voltage VIN is limited to between 0 Volt and 1 Volt.
[0087] Reference is now made to Figure 5D, which an exemplary AC measurement of an ADC circuit the converter unit with an amplifier at VREF of 1 Volt for an exemplary AC measurement of a 1-bit ADC with amplifier, at a constant reference voltage VREF of 1 Volt. For AC measurement, a triangular waveform is provided as input voltage VIN at the transistor T5 of the 1-bit ADC with amplifier, an expected square wave output voltage waveform VOUT is observed. The triangular input voltage waveform varies between -1 Volt to 2 Volts across the input of 1-bit ADC with amplifier, and at a particular reference voltage VREF, the output voltage VOUT varies back and forth from 0 Volts to 2 Volts forming a square wave voltage waveform (digital pulse output) showing a perfect working phenomenon of 1-bit ADC with an amplifier. With an applied reference voltage of 1 V, the output voltage varies from 0 Volts to 2 Volts when input voltage VIN falls below 0.6 V, and it goes back to 0 Volts when input voltage VIN rises above 0.6 Volts.
[0088] Reference is now made to Figure 5E, which illustrates an exemplary output voltage recorded for an ADC with an amplifier at a VREF of 1 Volt connected to voltage divider circuit for an exemplary output voltage recorded for an 1-bit ADC with an amplifier and the sensor unit 140, wherein the sensor unit 140 comprises a variable resistor 144 and a fixed resistor 142 at a reference voltage VREF of 1 Volt, wherein the device includes a 1-bit ADC, an amplifier and a resistance unit 140 (sensor unit). At a particular defined reference voltage VREF, the output voltage VOUT changes its state from 2 Volts to 0 Volts, especially when the voltage drops across the variable resistance 144 becomes higher. Similarly, when the voltage drops across the variable resistance 144 becomes lower, the output voltage goes from 0 Volts to 2 Volts. This change of voltage drops across the variable resistor `144 may be obtained by varying the resistance of the variable resistor 144. In an exemplary case, when the reference voltage VREF is 0.4 Volts and the variable resistance is set to about 2.1 Kilo Ohms for which a transition point is noticed, when the output voltage VOUT changes its state. Similarly, in an exemplary case, when the reference voltage VREF is 0.6 volts and the variable resistance is about 3.3 Kilo Ohms the transition point is noticed and the output voltage VOUT changes its state. Similarly, in an exemplary case, when the reference voltage VREF is 0.8 volts and the variable resistance is about 3.8 Kilo Ohms the transition point is noticed and the output voltage changes VOUT its state. Similarly, in an exemplary case, when the reference voltage VREF is 1.0 volt and the variable resistance is about 3.9 Kilo Ohms the transition point is noticed and the output voltage VOUT changes its state. These indicated exemplary cases where the circuit behaves as a switch, because as the resistance increases in the sensor unit, the voltage drop across the 1-bit ADC with amplifier and sensor unit also increases. Thus, the proposed 1-bit ADC design works on the principle of voltage variation across the input of the circuit due to change in resistance of sensor, advantageously this circuit may be useful across numerous real time sensors-based applications like gas leak detector, smoke detector, anti-counterfeit patch, proximity detector, temperature detector etc.
[0089] Referring back to Figure 2, the 1-bit ADC, an amplifier with a voltage divider integrated with a temperature sensor (sensor unit). The 1-bit ADC and the amplifier have been discussed previously and will not be discussed here again. Additionally, the sensor unit 240 has one resistor 242 and a temperature sensor 244 connected in series, wherein a standard resistor of fixed resistance 242 is connected to the supply voltage and a temperature sensor 244 connected to resistor 242 in series and providing the input voltage VIN from node N5 to the gate of transistor T5 in the amplifier unit 220. The other end of the fixed resistor 242 is connected to one end of the temperature sensor 244, and the other end of the Temperature sensor 244 is connected to the common ground potential. Input to the circuit is supplied via the temperature sensor 244 and the output voltage is measured across the source of transistor 216 and the drain of transistor 218, and the output voltage is noticed to be in digital form as a square pulse.
[0090] The resistance part to the device 200 with the fixed resistors 242 and temperature sensor 244, which are both connected in series, and the resistance part of the sensor unit 240 is connected in parallel to the amplifier unit 220. The schematic of 1-bit ADC connected to a voltage divider circuit (sensor unit) 240 where the sensor 244 may be an exemplary temperature sensor and resistor 242 may be a fixed resistance. It should be obvious to one of ordinary skill in the art that the in the resistance part of the unit, the embodiment illustrated is a temperature sensor 244, however other sensors like gas sensor, humidity sensor, proximity sensor, etc may be used here and all such embodiments using any form of a sensor would fall within the scope of the present disclosure.
[0091] The exemplary embodiment illustrates a practical application compatibility of the 1-bit ADC circuit in accordance with the present disclosure, wherein the 1-bit ADC with the amplifier is connected to a temperature sensor 244. With the connection of a temperature sensor 244 to ADC circuit, the output voltage VOUT changes its state from 0 Volts to 2 Volts at a particular or a defined temperature (i.e., when the temperature increases) and similarly the output voltage VOUT goes to 0 Volts from 2 Volts with a decrease in temperature. This temperature set point can be decided in two ways by changing the resistance of the resistor 242 and reference voltage VREF. From the above observation, it may be possible to replace the temperature sensor with any kind of other sensor like a humidity sensor, a proximity sensor, a gas sensor, a gas leakage sensor, a fire sensor, a smoke sensor etc, and it should be obvious to one of ordinary skill in the art that any type of sensor may be used and all such illustration and embodiments fall within the scope of the present disclosure.
[0092] After observing the performance with the 1-bit ADC, it can be deduced that the device 200 is compatible to any sensor in which the resistance changes with respect to any kind of stimulation that leads to change in voltage drop across the input voltage resulting the change in state of output voltage. It should be obvious to one of ordinary skill in the art that any other form of material can be used to make any type of sensors such as humidity sensors, heat sensors, proximity sensors, gas leak sensors, fire sensors, smoke sensors, ad any other know sensors, and all such sensors and materials will fall within the scope of the present disclosure.
[0093] Reference is now made to Figure 5F, which illustrates an exemplary VTC and current characteristics of the device of Figure 1. As illustrated the exemplary VTC and current characteristics of ADC with a current drive unit of Figure 2. The device has been measured with supplied potential of VDD = 2 Volts, while the input voltage VIN is swept from 0 Volts to 2 Volts at a reference voltage VREF of 1 Volt. Under these conditions, the value of current through the circuit changes from a high to a low with respect to the output voltage VOUT. When the output voltage VOUT of ADC is high for example at 2 Volts, the same voltage is being applied to the next transistor of current drive unit connected to it, resulting in the transistor switching to an ON state, which allows more current to flow in the circuit.
[0094] Reference is now made to Figure 5G, which illustrates an exemplary biasing of the circuit device with an input voltage swing between 0V and 1 V while measuring the output voltage of ADC as well as current passing through the circuit, where the circle symbols represent output voltage and the squares represents the current. As illustrated an exemplary biasing of the ADC with an input voltage VIN swing between 1 V and 0 V while measuring the output voltage as well as current passing through the current drive unit of the device 200. While the output voltage VOUT is low, for example at 0 Volts, the current value in the device 200 also decreases. So, the ADC controls the flow of current via controlling the switching characteristics of transistors. To study the biasing behavior of the circuit, the input voltage VIN has been swept from 0 Volts to 1 Volt at the interval of 60 sec while keeping the supply voltage VDD = 2 Volts and reference voltage VREF = 1 Volt as a constant. It is observed that the total current through the circuit follows the similar pattern as VTC curve with respect to input voltage VIN without deteriorating in performance for more than 3 hours.
[0095] In an exemplary embodiment ADC with an amplifier with a sensor unit integrated with a current drive unit coupled with 1 M solution of HCl with a 3 wt. % of PVA. to the current drive unit may be connected to an electrochemical setup where one silver wire is connected to source of the transistor and another silver electrode is connected to ground and both the silver electrode are dipped in a solution of 3 wt.% PVA in 1 M HCl solution. A 1-bit ADC as discussed previously is connected in parallel with an amplifier which is also described previously. The amplifier is connected to a resistance part (sensor unit) which has also been discussed previously. In the device the indicator 150 is replaced with an electrochemical setup EC1, which comprises a 1M HCL solution containing PVA and 2 silver electrodes. All features of the ADC, the amplifier, the resistance remain the same as discussed previously, and the 1-bit ADC on change of its state will change color of the silver electrode of the electrochemical setup thereby providing a visual indication when the state of the output voltage VOUT changes from an OFF state to an ON state or vice versa. When the output voltage VOUT for the device goes high with respect to input voltage VIN, the device switches the transistor to an ON state and allows more current to flow through the circuit. After a few minutes of operation, one of the silver electrodes connected to source of the transistor changes its color to black, which acts like visual indication. As discussed previously, the visual indicator may be a LED connected to the device which may change color or switch colors or may be a chemical reaction that occurs as a visual indicator or an electrochromic visual indication or any other form of visual indicator or an audio signal such as a sound all of which fall within the scope of the present disclosure. The use of electrodes was only an illustrative example and should not be construed to be a limitation of the present disclosure.
[0096] The current drive unit 230 comprising a series of transistors connected in parallel, wherein the drain of the transistors 232-1, …,232-n are coupled to the circuit and provided with a VDD, and the source of the transistors 232-1, …,232-n are coupled together to draw large amount of current equal to n times the current provided by single transistor. The source of the transistors 232-1, …,232-n are coupled together and connected to a load which can be LED, Electrochromic or any kind of visual indication. The gate of transistor 232-1 connected to the gate of the next transistor until all the gates are connected till 232-n. The current drive unit 230 has been added in addition in order to increases the versatile nature of the 1-bit ADC. The current drive unit 230 is a simple transistor whose gate is connected to the output of the 1-bit ADC with an amplifier, whereas drain of the transistors is connected to VSUPPLY and Source of the transistors is connected to common ground. The state of current drive unit i.e., ON state and OFF state is controlled by the output of 1-bit ADC. This modification in the device 200 with the current drive unit 230 gives an advantage to control the current passing through the current drive unit, that being reflected on the VTC plot of the circuit. The current passing through the circuit is high and roughly around 800 µA when the output voltage of ADC is high around 2 Volts and vice versa.
[0097] With a constant supply voltage at 2 Volts, when the input voltage is being swept continuously from 0 Volts to 1 Volt and 1 Volt to 0 Volts at a repetition rate of about 60sec, the corresponding output voltage changes its state from 2 Volts to 0 Volts and 0 Volts to 2 Volts respectively, resulting in the value of current also changing with respect to output voltage. The circuit performs relatively good over 3 hours without any deterioration in its performance and the circuit may perform in a similar manner for more than 18 hours, similar to the ADC circuit provided that the input voltage is 0 - 1 Volts as described previously. The value of current can be increased by adding multiple number of transistors in parallel where the gate of all the transistors of current drive circuit will be commonly connected to the output of ADC circuit 210 whereas all the drain electrodes will be connected to VDD supply voltage and the source electrodes will be connected to common ground. Hence, the drawing current from the current drive circuit 230 will be equal to the integer multiple “n” with current provided by single transistor and where “n” is the number of transistors connected parallelly in current drive circuit.
[0098] Reference is now made to Figure 6, which illustrates an exemplary design of a multi-bit ADC circuit in accordance with the present disclosure. For an n-bit ADC means the number of bits to be generated is 2n. Therefore, similarly, in the exemplary case considering the voltage transfer characteristics, a 3-bit ADC (8-bits) had been designed. Now, if each 8 ADC circuit are connected in parallel with common voltage supply and common ground, the circuit 600 will function as a 3-bit ADC, where the reference voltage VREF and input voltage VIN have been provided to each ADC circuit. The output voltage VOUT is a digital pulse, which may be fed directly for example to a microprocessor. Similarly, 16 individual 1-bit ADCs need to be connected in parallel obtain a 4-bit ADC. Higher bit ADC circuits may be designed and formed on similar methodology and it should be obvious that these higher bit ADC circuits fall within the scope of the present disclosure. It should also be obvious to a person or ordinary skill in the art that an ADC with any number of bits may be designed as long as 2N ADCs are connected in parallel, wherein N is an integer indicating the number of bits.
[0099] Figure 7A illustrates an exemplary embodiment of the device 100 being prepared as a patch to be used in a product to determine the authenticity of the product or in other words device 100 may be used as an anti-counterfeit tag/patch. The anti-counterfeit tag market is substantively large and in Indian alone amounts to about lakhs of crores in Indian rupees and spans in different products and sectors of manufacturing that may be covered from consumables, FMCG, pharmaceuticals etc. In a specific embodiment, the device which is a tag or a patch may include a photo-detector to indicate the end-user that the product is not a counterfeit product. In an exemplary embodiment, the sensor 144 of the sensor unit 140 may be a photo-detector placed between two sheets such that the device is covered from light. When the top cover (sheet) is removed by an end-user, light falls onto the device which is now a photo-detector and the photo-detector may change its state, i.e., the analog signal may be converted to digital signal and the indicator unit 150 would detect the change of state and indicate the change of state to the end-user. The sensor unit may comprise various other type of sensors other than photo-detector and all such forms fall within the scope of the present disclosure.
[0100] As illustrated in Figure 7A a dark sheet 710, for example a black paper or any other material is chosen, as the background. The device 720, the same device as illustrated in Figure 1, wherein the sensor is a photo-detector is placed on the dark sheet 710. The device 720 includes the photo-detector, amplifier, ADC, current drive and the indicator unit. When the photo-detector (sensor) is exposed to light it will change its state which through the state change of the ADC will produce a change in the indicator unit, which can be a color change material, or glowing a logo of the product etc. The device 720 which is placed on the sheet 710 and is covered with another dark sheet 730 forming a patch or a tag that may be attached to a product. In an exemplary embodiment, the top sheet (top cover) 730 may be peeled off by the customer/end-user such that the device 720 is exposed to light, and the sensor 720 (the photo-detector), which is sensitive to light will produce a state change detected by the ADC and the indicator unit is configured to display the state change which can be used to determine the authenticity of the product. The sensor unit placed within 720 can be a photodetector, and it should be obvious that other form of sensors may also be used for determining a state change and all such fall within the scope of the present disclosure.
[0101] Figure 7B illustrates an exemplary embodiment of the patch of Figure 7A used on a product. The patch 740 is pasted on the product box or the patch 745 may be placed on the product itself. The patch as illustrated in Figure 7A may be prepared and pasted on the box 745 or on the product 740 (the bottle), and the buyer may be provided with an option to remove the outer sheet 730 which can then indicate to the buyer if the product is authentic or counterfeit. The device 720 includes a photodetector to determine that the product is not counterfeit. When the sheet 730 is peeled off by the customer/ end-user, the sensor within the device 720, which can be a photo-detector will cause a change in the ADC state, which then changes the indicator unit in front of the customers eye to cause a color change of the color change material, showing a hologram or glowing a logo of the product.
[0102] Although the operations of the method according to the embodiments of the present disclosure are described in a specific order in the drawings, it does not require or imply that these operations have to be performed in that specific order, or a desired result can only be achieved by performing all of the illustrated operations. On the contrary, the steps illustrated in the flow diagrams may change their execution order. Additionally, or alternatively, some steps may be omitted, a plurality of steps may be combined into one step for execution, and/or one step may be decomposed into a plurality of steps for execution. It should also be noted that the features and functions of two or more modules according to the embodiments of the present disclosure may be embodied in one module. In turn, features and functions of one module described above may also be further divided into a plurality of modules for embodiment.
[0103] Although the present disclosure has been described with reference to several preferred embodiments, it should be understood that the present disclosure is not limited to the preferred embodiments disclosed here. Embodiments of the present disclosure intend to cover various modifications and equivalent arrangements within the spirit and scope of the appended claims. Although the foregoing disclosure has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Examples of the present disclosure have been described in language specific to structural features and/or methods. It should be noted that there are many alternative ways of implementing both the process and apparatus of the present invention. Accordingly, the present embodiments are to be considered illustrative and not restrictive, and the invention is not to be limited to the details given herein but may be modified within the scope and equivalents of the appended claims. It should be understood that the appended claims are not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed and explained as examples of the present disclosure.
, Claims:
1. A device 100 provided for detecting a pre-defined state transition of a sensor, the device comprises:
- a converter unit 110 configured to receive an input signal VIN from a sensor 144 of a sensor unit 140, wherein the sensor unit 140 is coupled to the converter unit 110;
- a component 112 of the converter unit 110 being supplied with a constant pre-define threshold reference voltage VREF, wherein the reference voltage VREF determines a value of an input voltage VIN, where the state transition takes place;
- the converter unit 110 configured to display a sharp transition in the output voltage VOUT when VIN equals the pre-defined threshold voltage defined by VREF, and provides an indication of the state transition via an indicator unit 150.
2. The device as claimed in claim 1, wherein an amplifier unit 120 is sandwiched between the converter unit 110 and the sensor unit 140, wherein the amplifier unit is configured to amplify the input signal VIN received from the sensor 144 of the sensor unit 140 and further configured to provide the amplified input signal, VIN_AMP to the converter unit 110.
3. The device as claimed in claim 1, wherein the converter unit 110 is coupled to a current drive unit 130, and the current drive unit 130 is configured to receive the output signal VOUT from the converter unit 110 and converts the output voltage signal VOUT into a combined voltage signal close to VSUPPLY and a large current signal.
4. The device as claimed in claim 3, wherein the output current signal from the current drive unit 130 ranges from 10 µA to 10 A.
5. The device as claimed in claim 3, wherein the current drive unit 130 comprises a plurality of components 132-1, 132-2…132-N, and wherein the plurality of components 132-1, 132-2…132-N is configured to increase the total output current and output power.
6. The device as claimed in claim 1, wherein the amplifier unit 120 comprises a first component 122 coupled in series to a second component 124 across a node N4, wherein the first component 122 is connected to a constant voltage supply VSUPPLY and the second component 124 maintained at a ground potential.
7. The device as claimed in claim 6, wherein the input signal VIN from the sensor 144 in the sensor unit 140 is supplied to the second component 124 of the amplifier unit 120 via node N5 of the sensor unit 140.
8. The device as claimed in claim 1, wherein the converter unit 110 comprises
- a first element 111 coupled in series to a second element 113 across a node N1 forming a first module 110A, wherein the first element 111 is connected to the constant supply voltage VSUPPLY and the second element 113 is connected to a ground potential.
9. The device as claimed in claim 8, wherein the reference voltage VREF supplied to the first component 112 of the converter unit 110, and the reference voltage VREF is determined by a pre-determined ratio of the first element 111 and the second element 113.
10. The device as claimed in claim 1, wherein the converter unit 110 comprises:
a third component 112 coupled in series to a fourth component 114 forming a second module 110B across a node N2, wherein the third component 112 is connected to the constant supply voltage VSUPPLY and the fourth component 114 is connected to a ground potential.
11. The device as claimed in claim 1, wherein the converter unit 110 comprises:
a fifth component 116 coupled in series to a sixth component 118 forming a third module 110C across a node N3, wherein the fifth component 116 is connected to the constant supply voltage VSUPPLY and the sixth component 118 is connected to a ground potential.
12. The device as claimed in claim 1, wherein the sensor unit 140 comprises a third element 142 coupled in series to a fourth element 144 across a node N5, wherein the third element 142 is connected to the constant supply voltage VSUPPLY and the fourth element 144 is connected to a ground potential.
13. The device as claimed in claim 1, wherein the amplified input signal VIN_AMP is taken across node N4 of the amplifier unit 120 and supplied to the fourth component 114 of the converter unit 110.
14. The device as claimed in claim 1, wherein the output signal VOUT is drawn across the node N3 from the converter unit 110 and supplied to the current drive unit 130.
15. The device as claimed in claim 1, wherein
- the plurality of components 132-1, 132-2…132-N of the current drive unit 130;
- the first component 122 and the second component 124 of the amplifier unit 120; and
- the third component 112, the fourth component 114, the fifth component 116 and the sixth component 118 of the converter unit 110,
comprise transistors or MOSFETs.
16. The device as claimed in claim 1, wherein the first element 111, the second element 113 of the converter unit 110, and the third element 142 of sensor unit 140 are resistors, and the fourth element 144 of the sensor unit is a variable resistor or a sensor.
17. The device as claimed in claim 9, wherein the reference voltage VREF is computed as:
(a product of a resistance value of second element 113 and a value of the supply voltage VSUPPLY) divided by (a sum of a resistance value of the first element 111 and the resistance value of second element 113).
18. The device as claimed in claim 5, wherein the current output “I” is connected to an indicator unit 150, wherein the indicator unit 150 is configured to indicate a pre-defined state transition of the fourth element 144 of the sensor unit 140.
19. The device as claimed in claim 18, wherein the indicator 150 includes at least one of an audio signal and/or a visual signal and/or an electromagnetic signal and/or a chemical reaction and/or an electrochemical reaction and/or combination thereof.
20. The device as claimed in claim 1, wherein the sensor unit 140 is powered by a supercapacitor and/or an external battery source and/or is self-powered.
21. A method of constructing an analog-to-digital detecting a pre-defined state transition of a sensor comprising the device as claimed in claims 1 to 20.
22. The device as claimed in claims 1 to 20, wherein the device 100 is produced by a commercial printing technique.
23. A product comprising a device 720 as claimed in claims 1 to 20 is placed between a first dark sheet 710 and a second dark sheet 730 wherein the sensor element of the device comprises a photodetector, wherein upon first time exposure of the sensor unit to light, the device displays a change of state via the indicator unit validating authenticity of the product.
24. A product comprising a patch as claimed in claim 23, wherein a change of state of the indicator unit is a color change of a material and/or a glowing of a light and/or a hologram and/or glowing of a logo when the change of state of the photodetector occurs on exposure to light.
| # | Name | Date |
|---|---|---|
| 1 | 202341048987-STATEMENT OF UNDERTAKING (FORM 3) [20-07-2023(online)].pdf | 2023-07-20 |
| 2 | 202341048987-REQUEST FOR EARLY PUBLICATION(FORM-9) [20-07-2023(online)].pdf | 2023-07-20 |
| 3 | 202341048987-POWER OF AUTHORITY [20-07-2023(online)].pdf | 2023-07-20 |
| 4 | 202341048987-FORM-9 [20-07-2023(online)].pdf | 2023-07-20 |
| 5 | 202341048987-FORM FOR SMALL ENTITY(FORM-28) [20-07-2023(online)].pdf | 2023-07-20 |
| 6 | 202341048987-FORM 1 [20-07-2023(online)].pdf | 2023-07-20 |
| 7 | 202341048987-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [20-07-2023(online)].pdf | 2023-07-20 |
| 8 | 202341048987-EVIDENCE FOR REGISTRATION UNDER SSI [20-07-2023(online)].pdf | 2023-07-20 |
| 9 | 202341048987-EDUCATIONAL INSTITUTION(S) [20-07-2023(online)].pdf | 2023-07-20 |
| 10 | 202341048987-DRAWINGS [20-07-2023(online)].pdf | 2023-07-20 |
| 11 | 202341048987-DECLARATION OF INVENTORSHIP (FORM 5) [20-07-2023(online)].pdf | 2023-07-20 |
| 12 | 202341048987-COMPLETE SPECIFICATION [20-07-2023(online)].pdf | 2023-07-20 |
| 13 | 202341048987-FORM 18A [24-07-2023(online)].pdf | 2023-07-24 |
| 14 | 202341048987-EVIDENCE OF ELIGIBILTY RULE 24C1f [24-07-2023(online)].pdf | 2023-07-24 |
| 15 | 202341048987-Proof of Right [02-08-2023(online)].pdf | 2023-08-02 |
| 16 | 202341048987-FER.pdf | 2023-10-31 |
| 17 | 202341048987-FER_SER_REPLY [27-04-2024(online)].pdf | 2024-04-27 |
| 18 | 202341048987-CORRESPONDENCE [27-04-2024(online)].pdf | 2024-04-27 |
| 19 | 202341048987-CLAIMS [27-04-2024(online)].pdf | 2024-04-27 |
| 20 | 202341048987-US(14)-HearingNotice-(HearingDate-01-08-2024).pdf | 2024-07-18 |
| 21 | 202341048987-FORM-26 [29-07-2024(online)].pdf | 2024-07-29 |
| 22 | 202341048987-Correspondence to notify the Controller [29-07-2024(online)].pdf | 2024-07-29 |
| 23 | 202341048987-Written submissions and relevant documents [13-08-2024(online)].pdf | 2024-08-13 |
| 24 | 202341048987-Annexure [13-08-2024(online)].pdf | 2024-08-13 |
| 25 | 202341048987-PatentCertificate04-11-2024.pdf | 2024-11-04 |
| 26 | 202341048987-IntimationOfGrant04-11-2024.pdf | 2024-11-04 |
| 1 | SearchHistory(1)(1)E_30-10-2023.pdf |