The subject of the invention concerns an interface architecture for
digital radio frequency transmission equipment, that is to say an equipment
5 using a digital subassembly coupled to a radio frequency subassembly.
It can be used for any type of transmission (modem, radar,
navigation, etc.), all frequency bands (VLF, high frequency HF, very high
frequency VHF, ultra high frequency or UHF, etc.). It is used for all types of
equipment: portable, aeronautical, vehicle, etc. It is used more particularly for
1 o software radio equipment, better known by the term "software defined radio"
(SDR).
Interconnection patterns between a digital baseband module and a
radio module are specific to each industrialist and/or are dedicated to a given
application. The baseband portion (BB) must have precise knowledge of the
15 design and the real-time operation of the radio frequency equipment (RF)
with which it is associated. The baseband and radio frequency
subassemblies have a high level of interdependence on one another. In fact,
they are not or not very reusable. Moreover, the architectures are not
modular.
20 The known architectures of the applicant are based on the use of
analog signals on intermediate frequency IF or otherwise and/or specific
digital signals and/or a set of discrete signals, bearing all or some of the realtime
and functional constraints linked to the design of the radio subassembly
(trigger, specific timings, characteristic frequencies, clock, command signals,
25 etc.). The known systems and architectures of the applicant are not modular
and do not easily allow themselves to be developed. Because of the high
level of coupling that exists between the BB and RF subassemblies of the
prior art, the existing structures provide no opportunities for interchangeability
or development of one or other of the subassemblies without resorting to a
30 repeat of the events.
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The functional and behavioral specifics, the capabilities, the
performances and notably the real-time sequencing to be observed that are
associated with the RF subassembly need to be taken into account in precise
fashion in the field of baseband BB. Even in the most accomplished prior
5 architectures, the exchange mechanisms between the BB and RF are
synchronous, which puts constraints on the hardware and software design of
the BB; control over real time must be implemented finely in the BB.
The patent EP 2 1 07 684 describes an interface architecture
according to which the processing times for the various commands of the
1 o radio module must be known from baseband and integrated into the
operation of the baseband application that is executed thereon.
To compensate for this feature rendering the Baseband/Baseband
application/Radio frequency subassemblies dependent, the principle of the
present invention consists notably in providing a better level of independence
15 among these subassemblies, notably by concealing from baseband and its
application the need to know the events peculiar to the radio module, the
number of timings and their associated precise values. It suffices to comply
with the use of functional commands by observing a single anticipation time
for any exchange with the radio module.
20 One of the objects of the present invention is to define an
architecture based on a breakdown of functional and technical perimeters to
be complied with by the two baseband BB and radio frequency RF
subassemblies, a generic physical interconnection pattern between
baseband and radio frequency that does not call on specific physical signals
25 linked to the design of one or other of the BB and RF subassemblies, and
that is not associated with a particular physical implementation solution. The
architecture according to the invention uses an exchange protocol for dated
messages that travel over an interface that has become commonplace and is
therefore generic, complying with the real time constraints of the transmission
30 systems.
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The propagation of the messages is deterministic so as to ensure,
notably, the synchronization between the two clock domains BB and RF.
As such, the generic link verifies the following features:
• absence of dedicated physical signals having a direct link to
5 knowledge of the hardware design of one or other of the
subassemblies BB or RF (with the exception of the interface
controller),
10
• the link does not integrate discrete physical command signals
corresponding to the control of a specific element that is present on
the BB or the RF,
• the signals do not comply with a frequency, a particular voltage that
would be induced by the design of one of the two BB or RF
subassemblies (with the exception of the interface controller).
The subject of the invention concerns an interface architecture
15 between a first digital baseband subassembly BB and at least one second
radio subassembly RF that is connected by means of a link L, the
architecture is characterized in that it has at least the following elements:
20
• at the digital BB subassembly,
• a signal processing application module, the operation of which is
based on the operation of a time Hs, said application module is
adapted for generating and/or receiving messages MSG(H, data)
comprising a time of implementation H and data, parameters or IQ
samples, which are associated with the operation of the second
radio subassembly, and works with a generic interface controller,
25 • at the radio subassembly comprising a digital portion and an analog
portion,
• an interface controller linked to a module for processing the
messages MSG(H, data), said module for processing the
messages is adapted to operate on the basis of a time HR, and
30 transmitting control signals to the digital portion and the analog
5
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portion of the radio subassembly, transmitting and/or receiving
messages to/from baseband,
• a memory for storing the messages awaiting processing, a table
for anticipating messages, a module adapted to compare a time of
implementation of a message with a time that is necessary for
execution thereof and to provide a signal for triggering the
processing of the message for the message processing module
generating control/command signals to said digital/analog
portions, and a time-setting module,
10 • said interface controllers are adapted to synchronize the time of the
digital subassembly and the time of the radio subassembly,
• said link L is adapted for conveying the dated messages between a
radio subassembly and a digital BB subassembly. The time for routing
the messages is deterministic.
15 By way of example, the BB module has a simplified functional and
temporal view of the radio subassembly, the second radio subassembly RF is
seen from the BB module and from the application BB as having a latency,
passage and processing time from the application BB to the antenna plane,
which is single whatever the command. The RF module is seen from the BB
20 module and from the application BB as providing developed commands that
do not require, at the BB, execution of a series of microcommands in order to
perform a fundamental function of the RF module (transmission, reception,
etc.). The execution of this series of microcommands is taken care of
autonomously by the RF module itself.
25 The architecture has, by way of example, a return chain and an
acquisition chain at the digital BB subassembly or at the analog RF
subassembly.
The interface controller of the digital subassembly is, by way of
example, adapted to generate messages having the following format: a field
30 address, followed by a time of implementation of a message, the type of
message, the size of the data and a field for the data.
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The radio subassembly may be a radio frequency subassembly
RF.
The invention also concerns a rnethod for guaranteeing the
independence of a baseband application BB in relation to a radio module RF,
5 implemented in the aforementioned architecture, characterized in that it has
the following steps: controlling one or more radio subassemblies comprising
at least one interface controller, from a digital BB subassembly comprising an
interface controller and an application TS, and the method is characterized in
that it involves at least the processing of the following actions:
10 • configuring the radio submodule{s) and determining the specific
anticipation time with which the application TS has to work,
• synchronizing the times between the digital BB subassembly and the
radio subassembly{ies ),
• transmitting, from the baseband subassembly and to a radio
15 subassembly, messages MSG(H, data) having the parameters
indicating to the radio submodule the processing operations to be
performed,
• storing the message in memory and, as soon as the period of memory
storage has finished, executing the message by configuring the radio
20 sub-module and by activating the content of the data of the message
for the operation of the antenna.
The method advantageously allows the hardware and functional
abstraction of the radio submodule RF to be guaranteed for the application in
baseband, allowing the independence of the baseband application in relation
25 to the radio module or submodule to be guaranteed.
According to a variant embodiment, on startup, the method
involves at least the following steps:
• a first phase for determining the passage time of the interface between
a radio subassembly and the BB subassembly,
30 • a second phase of synchronization of the time HR of a radio
subassembly RF and the time H8 of the BB subassembly,
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• a third phase, in which the BB subassembly retrieves the minimum
anticipation time used by the application TS for transmitting the dated
messages from the BB subassembly to the radio subassembly,
• a fourth phase, in which the latency between the BB subassembly and
5 the radio assembly RF is used to deduce the single minimum
anticipation time that will need to be used by the BB subassembly for
controlling the RF.
The method may have at least the following steps:
• a first phase, in which a transmission/reception loop is implemented by
10 executing the following steps,
• at the instant t=H, the interface controller BB sends a message
MSG(request (1:)) to the interface controller RF in order to retrieve the
time required by the RF to produce a return message MSG(1:) that
contains the transit time 01 for replying, 1: is the time for producing the
15 message,
• the departure t and arrival t' = H+2D1+ 1: instants of the loop are
measured at the BB subassembly in order to determine the transit
time o~,
• a second phase, in which the BB subassembly transmits, at the instant
20 Hs, a message MSG(time setting [Hs+D1]) to the RF subassembly
containing the time H8 increased by the transit time 01, or the time HR
increased by the transit time 0 1, the period necessary for routing the
message to the time module of the radio subassembly,
• a third phase, in which the application TS sends, by rneans of a
25 message MSG(Config RF), all of the configurations and/or
configuration information that is/are necessary for operation thereof,
notably the digital configuration and the analog configuration,
• in return, the radio subassembly returns the message MSG(DR). the
anticipation period DR necessary for processing the messages,
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• the BB interface controller then accumulates the anticipation periods
DA=D1+DR, and provides this minimum anticipation value DA for the
application TS in order to converse with the RF.
At transmission, a message of IQ samples that is created by the
5 BB comprises, by way of example, the date indicating the instant of output of
the first sample on the antenna plane, so that they are deduced from the realtime
time Ha of the BB subassembly. The chronological generation of the
dated commands by the application TS is not necessary in order to
guarantee that they are implemented on the date required on the antenna
10 plane.
At reception, a message of IQ samples that is created by the radio
subassembly can comprise the date indicating the instant of consideration of
the first sample on the antenna plane, and that is deduced from the real-time
time HR of the radio subassembly. The chronological generation of the dated
15 commands is not necessary in order to guarantee that they are implemented
on the date required on the antenna plane.
A message for configuring the radio subassembly, which message
is created by the BB, comprises, by way of example, the date indicating the
instant at which the radio subassembly needs to be configured for the
20 incoming/outgoing samples, and the date is deduced from H8 for the BB
subassembly. The chronological generation of the dated commands is not
necessary in order to guarantee that they are implemented on the date
required on the antenna plane.
A control or monitoring message created by the RF comprises, by
25 way of example, the date indicating the instant at which the measurements
are taken, and the date is deduced from the real-time time HR of the radio
subassembly.
30
For example, the method is implemented in a radio frequency
subassembly RF.
The method according to the invention can also be used:
5
10
15
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• on a system integrating the BB and the RF within one and the same
housing,
• on a system in which the BB and the RF are accommodated in two
housings that are physically separate and remote.
It can also be used in one or more of the following applications:
radar system, tactical (portable radio and vehicle radio), aeronautical and
naval transmission system, goniometry system, sensor/reflector system,
jamming system, infrastructure transmission system, instrumentation
equipment, test bench, navigation system, spectrum monitoring system.
Other features and advantages of the device according to the
invention will become better apparent on reading the description that follows
for an exemplary embodiment that is provided by way of illustration and is in
no way limiting, with the appended figures, in which:
• figure 1 shows a diagram representing the functional architecture
according to the invention,
• figure 2 uses a timing diagram to show a comparison between the
synchronization constraints for physical events between BB and RF in
a system according . to the prior art and the logical substitution
mechanism according to the invention,
20 • figure 3 shows a representation of the architecture according to the
invention,
• figure 4 shows a representation of the operating range of the
application,
• figure 5 shows a representation for a MODEM application,
25 • figure 6 shows an illustration of the processing operations of the RF
portion,
• figure 7 shows an example of message structure corresponding to the
principle of the invention,
• figure 8 shows the computation of the passage time for a message,
30 • figure 9 shows the synchronization of the times,
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• figure 10 shows a functional representation of the processing
operations of the interface according to the invention,
• figure 11 shows an example of the digital processing operations of the
RF portion,
5 • figure 12 shows an example of a sequence diagram between BB and
RF corresponding to the method,
• figure 13 shows an example of a sequence diagram between modules
corresponding to the startup of the system according to the method,
• figure 14 shows a sequence diagram corresponding to the
10 transmission of a packet of samples with the associated RF
configuration,
15
• figure 15 shows a sequence diagram corresponding to the reception of
a packet of samples with the associated RF configuration, and
• figure 16 shows a sequence diagram corresponding to the processing
of the messages.
Figure 1 schematically shows the concept on which the
architecture according to the invention is based. A first baseband
subassembly BB, 1, is interconnected and converses with a second, radio
frequency, subassembly RF, 2, by means of a generic link L that is based on
20 the use of dated logic messages. The BB module has a simplified functional
and temporal view of the radio module:
25
30
- the RF module is seen from the baseband subassembly BB (or
BB module) and from a baseband Application BB as having a
single latency (passage and processing time for the Application
BB to the antenna plane) whatever the command,
- the RF module is seen from the BB module and from the
Application BB as providing developed commands that do not
require the execution of a series of microcommands at the BB
in order to implement a fundamental function of the RF module
(transmission, reception, etc.). The execution of this series of
5
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microcommands is taken care of autonomously by the RF
module itself.
The baseband subassembly BB integrates the digital processing
operations that implement the physical layer of a digital radio system.
The radio frequency subassembly RF is adapted to implement all
of the real-time digital and analog shaping and control processing operations
that are necessary for correct transmission or reception of the radio signal.
The generic link L is adapted for implementing the interconnection
between the BB module and the RF module without involving specific
10 physical signals linked to the design of one or other of the BB or RF
subassemblies. The overall system may be simplex, half-duplex or fullduplex,
the link being duplex.
Figure 2 uses a timing diagram to illustrate, in the upper portion,
the principle of event flow for an architecture according to the prior art. On a
15 given date t, synchronism exists between a specific signal controlling the
execution of an event and the real-time signals that implicitly bear the instant
of the event.
The upper portion of figure 2 illustrates, using a like timing
representation, the principle of message exchange that is used within the
20 context of the invention. It can be seen in the figure that there may in that
case be either synchronism or asynchronism between the message and the
event itself. For that purpose, the message notably has the date of the event
and the description of the event itself as information.
Figure 3 shows an example of architecture according to the
25 invention and reveals the characteristic periods to be taken into account.
The baseband portion (BB) has, by way of example, a signal
processing application module 30, or Application BB, which uses a local time
or real-time time H8 . 31, to clock its operation. The local time is maintained by
a local oscillator OL8 , 32. The application module TS implements all of the
30 functional and specific processing operations on the physical layer of a radio
system. The application module can generate the messages intended for the
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radio subsystem chronologically or otherwise. By way of example, the
application corresponds to the application that can be used for the SCA or
SDR, or to the loadable or reloadable application in conventional
architectures. The application manipulates one or more signals at minimum
5 sampling frequency in a complex baseband 1/Q format. The signal carried
may also be real, however (non-centered spectrum at the zero frequency).
The application TS of the BB during normal operation does not
need to know the exact passage times of the RF, but only needs to know the
minimum and single anticipation times for sending a command to the RF; it is
10 the RF module itself that takes charge of executing at the correct moment the
command(s) necessary for the action of the command to be able to be
implemented at the correct moment on the antenna plane. The RF module
therefore performs the adjustment that is necessary for the moment at which
the command or the event are triggered, according to the nature of the
15 command or event and the physical implementation of the RF module.
At transmission, the signal and the commands from the signal
processing application are transmitted to a generic interface controller 33, via
an encapsulation in formatted messages. The signals are dated messages
MSG(H, [ei]), where the "ei" correspond to the succession of samples to be
20 transmitted. The commands are likewise dated messages. Examples will be
given in the remainder of the description. The reverse is identical at
reception.
The RF portion comprises a generic interface controller 34 linked
to a message processing module 35. The message processing module uses
25 a local time or real-time time HR. 36, that is supplied with power by a local
oscillator 37, OLR. At transmission, the message processing module 35
transforms the messages into digital control signals for the digital portion 38
of the RF portion and analog control signals for the analog portion 39 of the
RF portion, and extracts the IQ samples. A transmission antenna 10
30 transmits the signals associated with the radio application. The reverse is
identical at reception.
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The generic interface controller 33 of the BB portion and the
generic interface controller 34 of the RF portion implement the exchange
protocol and the medium for control of the physical link. The function of the
protocol is notably to control the routing times and the timing synchronization
5 between the two clock domains BB and RF (H8 , HR)- According to the
capabilities of the physical protocol used, the generic link is made up solely
of data signals, for example, or it may be complemented by two specific
discrete signals (not compulsory, depends on the design):
• a signal for the timing synchronization HR/H8 ,
1 o • a signal for propagating and sharing the same local oscillator OL
between BB and RF, this local oscillator signal can also be delivered
directly to the BB and the RF if the architecture so requires.
To allow implementation of the architecture according to the
invention, the signal processing application module must operate on an
15 anticipatory basis in relation to the real-time time and must use a dated
messaging system for exchanges with the radio RF.
In order to ensure control of the times and to guarantee correct
real-time operation, the two BB and RF subassemblies forming the
architecture according to the invention implement a time function. The two
20 subassemblies use the same format for the time. According to one mode of
implementation, the baseband module will act as the time master vis-a-vis
the radio module RF, which is a slave. Without departing from the scope of
the invention, it is also possible to imagine an application in which the radio
module is a time master and the application module is a slave.
25 The application TS uses a minimal temporal anticipation value DA
to be complied with in relation to the real-time clock H8 .
A first portion DR of the value DA is obtained from the RF itself, for
example before the application is started up. This value DR is unique for each
RF, or for each configuration that the RF is able to manage. A multiband
30 radio (VHF/UHF), for example, can have different time constants in VHF or
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UHF configuration. DR corresponds to the maximum latency of the longestlasting
radio frequency RF capability to be executed.
The second portion of the anticipation value o, is obtained either
through design of the hardware interface between the BB and the RF
5 (constant) or by virtue of explicit measurement _of the transit time between the
controller of the generic interface of the BB and the controller of the interface
of the radio frequency module, which measurement is taken in the startup
phase of the system. This transit time value 0 1 is unique for a given physical
interconnection pattern.
10 The values DR, DA, 01 are deterministic values. The minimum
anticipation period OA with which the application will work is obtained from
the sum of 0 1 + DR. In order to avoid a significant increase in the radio
frequency hardware resources RF, the application TS must likewise comply
with a maximum anticipation period OM.
15 Under these conditions, the application TS can operate in an
operating time window defined by [OA. OM] in relation to the real-time clock
H8 , allowing it to de-restrict its dependency on the RF, and to be able notably
to operate with a temporal jitter. The range of application operation of TS is
shown on a time axis in figure 4.
20 The BB and RF subassemblies communicate by means of
25
30
exchanges of dated messages bearing several types of information, for
example:
• commands for controlling the capabilities of the RF subassembly, for
example, in order to synchronize the times HR and H8 , the
transmission, the reception, the carrier frequency (f0), the output
power (PTx), etc.,
• 1/Q samples: sampled baseband signal to be transmitted, or that are
received,
• data: used for the purposes of configuring one or other of the
subassemblies, or for control or monitoring purposes (temperature,
local time, locked OL, activities, etc.).
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Sending of the dated messages by the application of the BB to the
RF will comply with the minimum anticipation value DA. The messages
received by the BB from the RF arrive with a delay DA', the value of which
corresponds to the implementation of the system. This delay value is of the
5 same order of magnitude as the minimum value DA, but it may be different
because the processing operations on the data path may be different. For the
sake of a balance between transmission and reception, it is possible to
envisage making the values of DA and DA· correspond by design, for
example, by making DA equal to Max(OA and DA-).
10 At transmission, a packet of samples needs to be sent before the
current time (H-DA) in a message for which the date of implementation is H,
that is to say that the first sample of the packet must be present at the
antenna output of the radio module RF exactly at the time H.
At reception, a packet of samples is received at least after the time
15 of implementation H, in a message for which the date of implementation is H,
that is to say that the first sample of the packet has been acquired on the
reception antenna of the radio module RF exactly at the time H. The
expression "time of implementation of a message" defines the date or time at
which the RF module or subassembly will have had to perform an action
20 described in the parameters of the message. The time of implementation of a
command on the antenna plane corresponds to the instant of presentation of
the data on the antenna plane.
25
In the case of a signal processing application of MODEM type,
figure 5 illustrates the principle of operation of the application TS.
At transmission, the data to be transmitted 501 are transmitted to
a processing chain comprising, by way of example, a channel coding module,
followed by a modulation module, the coded and modulated signals are sent
to a module that is adapted to insert reference sequences, and then the
signals are transmitted to a spectral shaping module. The control for the
30 elements of the radio that are associated with the signal is likewise
generated, containing the sampling frequency, the transmission instant, the
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output power, the quantization of the samples, etc. The spectral shaping can
be followed by an optional restoration chain. At the output of the transmission
chain, there are only messages leaving for the RF. The radio control
messages 502 from the transmission chain are dated and have the
5 parameters that characterize the radio controls or the events. The 1/Q
samples, 503, to be transmitted are also in the form of dated messages.
At reception, the application TS generates messages for
controlling radio signal acquisitions and obtaining IQ samples. These
messages are of outgoing type only, 505. The signal 1/Q samples are
10 received by the application TS in dated messages of incoming type, 503.
They are transmitted to a reception processing chain comprising, for
example, an acquisition chain, and then an adapted filter, and to a
synchronization module, and then to an equalizer, the samples are then
demodulated and then decoded. One output of the reception processing
15 chain comprises the received data 504. Another output corresponds to the
radio controls 505 that are in the form of dated messages.
The signal processing application TS does not need to know the
design elements of the RF module. The messages generated by the
application in order to control the radio operation notably have the following
20 parameters: the sampling frequency, the reception frequency, the reception
instant, the gain, etc.
In the case outlined in figure 5, for example, the RF portion
comprises, as in figure 6, a generic interface controller 34, a message
processing module 35 for the messages from the generic interface controller
25 34, which receives a time HR from a TIME module 36 linked to a local
oscillator 37. The result of the messages processed at the output of the
message processing module are control signals that have the aim of
controlling the digital portion 38 of the RF, control signals that will control the
analog portion 39 of the RF portion and IQ samples. At transmission, the
30 analog portion receives the signals from the processing operations of the
digital portion and has the aim of implementing the functions allowing the
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signals to be transmitted to the transmission/reception antenna 10 (and viceversa
for reception).
In the case in figure 6, the digital portion of the radio integrates
capabilities for changing sampling frequency up or down in terms of
5 frequency or DUC for digital up converter/DOC 50 for digital down converter,
said capabilities being adapted for implementing the interface with the
analog/digital or ADC converters and the digital/analog or DAC converters. It
is not, within the context of the invention, recommended that this function be
processed by the BB device. The principle is that the RF will adapt to its level
1 o in order to avoid the application being dependent on the design of the
conversion chain that is in the RF and that is therefore specific thereto.
The structure of the messages is important for unambiguously
identifying the nature of the information contained in the messages. The
architecture will therefore use a typing system for the messages that is
15 preferably systematic, unique and implemented on a message-by-message
basis. Each message will bear a value of unique type. Without departing from
the scope of the invention, it will also be possible to create messages bearing
a plurality of types, with, consequently, an extension of the duration of the
messages and an extension of the latency of the exchanges.
20 Figure 7 shows an example of structure that is used for the
messages 70. By way of example, the message is made up of a first fixed
portion and of a second portion of variable size.
The first portion comprises an address, 71, followed by the time of
implementation 72 of a message, the type 73 of a message and the size of
25 the data 7 4. The second portion of variable size comprises a field 75 of
variable size for the data. The chronological generation of the dated
commands 502, 503 by the application 30 is not necessary in order to
guarantee that said commands are implemented on the date required or the
time of implementation 72 on the antenna plane 10.
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The time of implementation can be deduced from the value H8 if
the message is sent from the BB, or from the value HR if the message is sent
from the RF structure.
The message type may be: a single packet of 1/Q samples,
5 multiple packets of IQ samples (indication: startup, in progress, stop), an RF
configuration (time synchro/maintenance, RF capabilities, etc.).
The size of the data corresponds to the number of data that the
second data portion contains.
Within the context of a "long" transmission or reception of 1/Q
10 samples (continuous transmission/reception of infinite or unknown duration,
or of very significantly great duration in relation to the duration of the
samples), the packet of samples exchanged between the BB portion and the
radio portion will be segmented into a plurality (n) of messages m;, in order to
optimize the required speed, only the first message m1 contains a date or
15 time that will be used by the RF. The other messages m2, ... mn contain a
piece of continuity or end-of-sequence information. The type of the message
allows segmentation to be performed, for example. The messages allow a
plurality of quantization values to be carried for the IQ samples. By way of
example, it is recommended that the following quantizations be retained:
20 Q=1, 8, 12, 16 and 24. The variable quantization of the IQ samples notably
allows the speed on the generic link transmitting the messages to be limited.
This allows a wider frequency band to be processed when a great dynamic
range is not required, which is the case when the automatic gain control AGC
is performed by the RF.
25 The dates contained in the messages correspond to the instants at which the
content of the associated message is implemented:
• at transmission, in an IQ sample message created by the BB, the date
indicates the instant of output of the first sample on the antenna plane,
said date is deduced from the time H8 ,
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• at reception, in an IQ sample message created by the RF, the date
indicates the instant at which the first sample is taken into account on the
antenna plane, said date is deduced from the time HR.
• in an RF configuration message created by the BB, the date indicates
5 the instant at which the RF needs to be configured for the
incoming/outgoing samples, said date is deduced from Ha,
10
• in a control or monitoring message created by the RF, the date
indicates the instant at which the measurements are taken, said date is
deduced from HR.
When a plurality of RF subassemblies need to be addressed with
one and the same BB, or a plurality of BB for one or more RF, it is possible to
use the idea of header address.
When an RF natively integrates a plurality of transmission and
reception channels, an idea of channel coupled to the type of messages will
15 be used.
The addressing and channel system allows all the necessary
flexibility to be able to process SIMO/MIMO systems implemented using a
single or multiple RF module.
Figure 8 schematically shows the loop implemented from the BB
20 allowing computation of the transit time between the two generic interface
controllers. To guarantee overall real-time operation, this time needs to be
taken into account. The transit time 0 1 must be deterministic and
reproducible. By way of example, the value of this time can be measured on
startup of the system by implementing a transmission/reception loop from the
25 BB module. The loop is implemented from the BB and consists in sending a
request message for loop response generation time 1: to the RF. This time 1:
corresponds to the time that is necessary for the RF to send back its
response to the BB.
t0 corresponds to the instant of transmission of a message from
30 the BB to the RF, (t0+t1) to the instant of reception of this message MSG by
the RF, (t0+t1+1:) to the instant at which the RF generates the response
WO 2014/154821 PCT/EP2014/056193
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message, 't: the time for generating a message and t2c to+2J1+t to the instant
at which the BB receives the message from the RF, The transit time 01 is
equal to [(to-t2)/2]- 1:.
The generic interface controller 33 (BB) or 34 (RF) must allow
5 synchronization of the times Hs and HR. For that purpose, it uses a specific
message MSG(time[Hs+D1]) sent from the BB, the time master for the
system, to the RF, which plays a slave role. This message is sent by the BB
at a precise instant so that this message arrives exactly at the instant of time
setting corresponding to the time message that it carries. The time HR of the
1 o RF is kept identical to H8, by virtue of the periodic maintenance performed by
the interface controller 34. The maintenance procedure is, by way of
example, carried out by exchanging dedicated periodic messages between
the BB and the RF. The BB and RF resynchronization frequency is
dependent on the precision difference of the local oscillators OL, if they are
15 different. BB and RF share one and the same time value (H8 =HR).
The generic link L corresponds to the physical (hardware)
interface between the subassemblies BB and RF. The generic link verifies
the following features:
• the absence of physical signals having a direct link to knowledge of
20 the hardware design of one or other of the BB or RF subassemblies,
• the link does not integrate discrete signals for commands
corresponding to the control of a specific element that is present on
the RF,
• the signals do not comply with a frequency, a specific voltage that
25 would be induced by the design of the RF subassembly,
• the propagation of the messages is deterministic so as to ensure,
notably, the synchronization between the two time domains BB and
RF,
• the speed that it supports meets the needs of the applications of the
30 system.
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The physical generic link is adapted for conveying the dated
messages. The link is chosen according to, notably, consumption constraints,
the distance separating the BB and the RF and the speeds necessary for the
application TS. By way of example, in order to cover a complex sampling
5 frequency range up to 20 MHz, with 16-bit quantization, according to the
speed surplus required by the message headers, a speed of 640 Mbps is
required. However, a large number of applications do not require more than 8
quantization bits, especially when the digital portion of the RF takes care of
the DUC/DDC function and the automatic gain control or AGC. By way of
10 example, it is possible to use Gigabit Ethernet technology for the physical
portion of the generic link.
Figure 10 is a functional overview of the elements implemented by
the interface according to the invention. As in figure 2, the BB portion has a
local oscillator, a clock, an application TS and an interface controller.
15 According to one implementation variant, it is possible to add an acquisition
and restoration chain (DUC/DDC), which are known to a person skilled in the
art.
By way of example, the RF portion has a generic interface
controller 34, a message processing module, 35, a message anticipation
20 table 101, a memory 102 for the messages, a comparator module 103 that
receives the various times, an implementation module 104, a clock, a local
oscillator, a digital portion comprising an analog/digital converter 105, a
digital/analog converter 106, an analog portion comprising a transmission
channel 107 and a reception channel 108 linked to the antenna 10. There are
25 no technological constraints to be observed for the type of memory to be
used. The method does not require the RF subassembly to sort the content
of the memory 102 containing the messages.
The message processing module is adapted to execute the
messages received from the BB and for generating messages to be
30 constructed and to be sent to the BB. This module notably has the function of
controlling the entire RF portion and is a guarantor of real-time compliance.
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This module interprets the messages received from the BB, notably the times
of application of the messages. It uses the local time HR in order to anticipate
the execution of the message. It generates all of the command signals that
are internal to the RF module aiming to parameterize the digital and analog
5 processing operations. This module loads all of the real-time sequencing
functions. It generates all of the discrete signals used for parameterization
operations and the necessary controls.
The digital portion of the RF notably comprises a set of modules
that are adapted to the digital processing operations of the RF that are shown
10 in detail in figure 11. These modules notably have the function of supporting
specific processing operations from the design of the radio and of allowing
correct execution of the messages. The processing operations executed on
the digital portion of the RF are controlled by the sequencer module for
processing of the messages.
15 The 1/Q samples of the message at the output of the message
processing sequencer are transmitted to a DUC module, for example, in
order to manage the rise to the sampling frequency of the DAC, and then the
samples pass through a module for managing the transmission power
(automatic level control or ALC), before being modulated and converted
20 within the DAC.
The analog signal received on the reception antenna is converted
into digital samples that are demodulated in order to obtain the 1/Q samples.
The 1/Q samples are then transmitted to a module for managing the
transmission power ACG, the next step consisting in controlling the fall to the
25 sampling frequency in the DDC module.
The RF portion comprises all of the analog processing operations
known to a person skilled in the art between the input/output of the ADC/DAC
and the transmission/reception antenna. These processing operations are
controlled by the message processing sequencer module that transmits
30 analog control signals to the analog portion of the RF. As analog processing
operations that will not be set out in detail in the description, it is possible to
WO 20141154821 PCT IEP2014/056193
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cite the filtering, the power amplifier or PA, the switches, the transposition,
the low noise amplifier or LNA, etc.
The steps of processing of the messages from the BB portion that
are processed in the RF portion are as follows, for example:
5 • a message MSG sent from the BB to the RF is routed with a known
10
15
20
25
latency Di to the RF interface controller 34,
• this message is stored in the message memory 1 02 and put on hold
for processing. The size of the message memory corresponds to the
number of messages that one wishes to be able to send in advance
from BB. By way of example, it is possible to dimension the message
memory so that it contains 4 or 5 messages for a half-duplex
transmission system and twice as many for a full-duplex system,
• the anticipation table 101 for the messages contains the temporal
anticipation values corresponding to each type of message (for
example configuration message, 1/Q sample message, etc.) that are
used by the message processing module in order to implement the
message, that is to say to execute it,
• the comparator 103 verifies the desired time of implementation for
each message stored in memory HMsG(1 ... N) using the time AMsG that
is necessary for it/them to be processed according to the current time
HR, so as to trigger the processing of the message at the moment that
guarantees the time of implementation. When the condition Hw
AMsG=HMsG is fulfilled, the processing module will start execution of the
message. The execution of the message consists notably in
implementing all of the control and configuration sequencing, and data
paths allowing the message to be implemented. These processing
operations are intended to control both the digital portion and the
analog portion of the RF subassembly.
Figure 12 shows a flow example for the steps executed by the
30 method according to the invention.
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At startup, the BB, which in this example is the master of the
system, executes the initialization operations that are necessary for
controlling the time on the RF. During this first initialization phase, the BB
asks, 120, the RF of the value of the time 't that is necessary for the BB to
5 compute the delay D1 on the interface between the BB and RF. The RF
provides it, 121, with this value.
The BB then configures the RF, 122, according to the desired
mode of operation and, in return, 123, obtains the value DR allowing the BB
to compute the anticipation time DA with which the application TS needs to
10 operate.
When the RF is configured and the BB has the anticipation time
DA, the application TS starts its activity. This activity consists in exchanging
dated messages MSG(H1) indicating to the RF the processing operations to
be performed.
15 In the example of figure 12, a waveform having Ns hops per
second is considered, corresponding to the period T p between each
transmission start.
The first message transmitted, by the message carrying the time
H5, indicates the frequency f0 and the transmission power PTx to be used at
20 the time H5. This message allows control of the configuration operations of
the RF for the time Hs.
The second message carrying the time H5 contains the IQ
samples to be transmitted at the time H5 . These samples are consistent with
the configuration sent during the previous message for the time Hs. The order
25 and sequencing of these messages has no importance other than the
anticipation constraint described below.
The messages sent by the BB to the RF portion are all transmitted
with an anticipation of value DA, and are not necessarily in sync with the
stage instants of the antenna. The messages are not strictly spaced by T p,
30 and they can be sent either during the previous stage or even two stages
beforehand, for example, the command of the stage Tx on Ha is sent two
wo 2014/154821 PCT/EP2014/056193
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stagesbeforehand. At transmission, the messages are asynchronous with the
operation of the RF.
The RF controls real time. On the antenna plane, each stage is
duly transmitted at the desired instants {H5, H6 , H7, H8) and the signals
5 transmitted or received have a duration of n.Fs, where n is the number of
samples and Fs is the sampling frequency, a period that corresponds to the
real period of the samples.
Figure 13 schematically shows a flow example for the steps
involved at startup of the system. By way of example, startup of the system
1 o has three phases.
In the first phase, the passage time for the interface between the
BB and RF is determined, then, in the second phase, the times of the BB and
the RF are synchronized, and then, in the third phase, the BB configures the
RF and retrieves the minimum RF anticipation time.
15 For that purpose, in the first phase, the method will implement a
transmission/reception loop between the BB interface controller and the RF
interface controller. At the instant t=H, 130, the BB interface controller sends
a message MSG(request (r)) to the RF interface controller in order to retrieve
the time necessary at the RF for producing, 131, the return message MSG(r)
20 that contains the time 1:. The instants of departure t=H and arrival
t' = H+201+"t for the loop are measured by the BB, these values associated
with the information for the RF response processing period allow computation
of the delay for the interface 01. The periods for production and reception of
the message by the BB are not necessarily indispensible because, if they are
25 equal, their contributions cancel one another out. If they are different, their
individual contributions are known and they can be taken into account.
In phase 2, the BB transmits, at the instant H8 , 133, a message
MSG(time setting [H8+01]) to the RF containing the time H8 increased by the
interface delay 01, the period necessary for routing the message to the time
30 module of the RF. On reception of the message by the RF, it is sufficient to
reset the time counter to the received value.
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In phase 3, the application TS sends, 136, by means of a
message MSG(Config RF), all of the configurations and/or configuration
information necessary for it to operate, broken down by the RF into digital
configuration 137a and analog configuration 137b. In return, the RF returns
5 138 a message MSG(DR) containing the anticipation period DR that is
necessary for processing the messages addressed to it. The interface
controller of the BB then accumulates the anticipations DA=D1+DR and
provides, 139, this value for the application TS. This minimum anticipation DA
is observed by the application TS for conversing with the RF.
10 The system having been configured, the BB will request
transmission of IQ sample packets, figure 14. The application TS acquires
the current time from the time module. It then determines, 141, according to
its own needs, the time HTX at which it chooses to see a signal leave the foot
of the antenna, corresponding to the first sample of the packet that it has
15 generated or that it will generate.
Knowing the minimum anticipation time DA necessary for
processing the message, the application TS sends two messages 142a,
142b to the RF before the date or instant HTX~DA. The times £1 and £2 on the
diagram represent the temporal anticipation before HTx-DA that the
20 application TS takes in order to generate the messages 142a and 142b. The
first message corresponds to the order to change to transmission from the
instant HTx, with the desired configuration of the RF (for example the
transmission power, the carrier frequency, etc.), the second message
corresponds to the IQ samples that are associated with this configuration.
25 The messages are routed, by the interface controllers of the BB, to
the RF and are immediately stored, 143a, 143b, in the memory of the RF.
The message processing module 35 likewise immediately determines the
temporary storage times for each of the two messages before starting
execution of said messages. The storage times may be different depending
30 on the TYPE of the messages.
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When the temporary storage times have passed, the message
processing module executes the messages: it implements the digital 145 and
analog 146 configurations of the RF, then activates, 147, the stream of the IQ
sample data that are then routed 148 to the antenna foot in absolute
5 compliance with real time.
Figure 15 illustrates the steps implemented for reception of a
packet of IQ samples with an associated RF configuration.
In a manner that is symmetrical with the previous case, the
reception of a packet of IQ samples is requested by the BB. The application
10 TS acquires, 151, the current time from the TIME module. It then determines,
according to its own needs, the time HRx. 152. at which it wishes to acquire
the signal from the antenna foot that will correspond to the first sample of the
packet that it will receive.
Given knowledge of the anticipation time DA that is necessary for
15 processing the messages, it needs to send, 153, a message MSG(HRx, RX,
parameters) to the RF before the date HRx-DA. This message corresponds to
the order to take account of the first sample Rx from the instant HRx, with the
desired configuration of the RF (gain, carrier frequency, etc).
The message is routed by the interface controllers of the BB to the
20 RF and is immediately stored, 154, in the memory of the RF. The message
processing module immediately determines the temporary storage time for
this message before starting execution thereof.
When the temporary storage time has ended, the message
processing module executes the messages: it implements the digital155 and
25 analog 156 configurations of the RF, then activates 157 the data path from
the antenna foot to the output of the digital unit that provides the IQ sample
data in absolute compliance with real time.
A message MSG(HRx, IQ, n, [r1, .. rn]) is then generated, 158, in the
RF, containing exactly the instant HRx, corresponding to the first sample of
30 the packet, on the associated IQ samples. This message is then routed to the
BB by the interface controller of the RF and the interface controller of the BB.
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Figure 16 illustrates the operation of the message processing.
The timing diagram in figure 16 details the internal sequencing operations of
the "message processing" module ofthe three previous diagrams (figures 13,
14 and 15). Two cases need to be considered: the messages generated by
5 the BB and the messages generated by the RF.
When a message MSG(H, TYPE) is sent from the BB to the RF,
this message arrives at the RF via the interface controller 34. The latter
immediately sends 161 all of the data of the message (time, data, type, etc)
to the memory for storing the messages, and exclusively, 162, the time H and
10 the TYPE of message to the COMPARATOR.
The comparator consults, 163, (request AMsG) the anticipation
table that contains the processing times necessary for the RF and
corresponding to each type of message. It then computes, 164, the instant of
implementation Hs, corresponding to the instant of triggering of the
15 (sequencer) processing module that will execute the message. The
comparator then compares, 165, the date of implementation Hs with the
current time HR, and, when equality occurs, the data corresponding to the
message from the memory are retrieved 166 and execution of the message
starts 167.
20 The transmission of a message from the RF to the BB is
determined by the appearance of an event, 168. In the exemplary case of
repatriation of IQ samples to the BB, the event corresponds to the instant of
acquisition at the antenna foot, corresponding to the first IQ sample. At this
precise instant, the message processing module or sequencer acquires the
25 current time from the TIME module.
The sequencer constructs the message by placing the time of the
event, the type of message and the IQ samples, which it sends, 169,
opportunistically as quickly as possible to the BB. Depending on the relative
speeds of the generic link, of the sampling frequency and of the size of the
30 packets, it can be envisaged that the instant at which the message is sent
occurs before the end of reception of the last sample of the packet.
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The use of a commonplace generic physical interface allows
abstraction of the specifics of hardware design on either side of the interface
between baseband (BB) and radio frequency (RF). The baseband and radio
frequency subassemblies communicate by means of dated-message
5 exchanges that allow them to assess one another in logical fashion. The
dates indicating the instants of implementation of the events (configuration,
transmission or reception), the subassemblies BB and RF can operate
asynchronously, which allows real-time constraints to be decorrelated.
Moreover, the exchange of messages allows precise knowledge of the
1 o capabilities supported by radio frequency and the associated performance
levels to be dispensed with.
Consequently, the software implemented in the baseband portion
is independent of the radio frequency portion. The subassemblies defined in
this manner can be reused directly with other modules of different design but
15 complying with the same architecture framework.
Advantageously, the method does not express any constraint about the type
(technology/architecture) of the memory 102 that needs to be used. It does
not require the application TS 30 to chronically generate the messages
intended for the RF, nor does it require the RF to sort the content of the
20 memory 102 containing the messages.
wo 2014/154821 PCT /EP2014/056193

CLAIMS
1 - An interface architecture between a first digital baseband subassembly
(88) and at least one second radio subassembly (RF) connected by means
5 of a link L, which architecture is characterized in that it has at least the
following elements:
• at the digital 88 subassembly,
• a signal processing application module (30), the operation of
which is based on the operation of a time Hs (31 ), said application
module (30) is adapted to generate and/or receive messages
MSG(H, data) comprising a time H and data, parameters or IQ
samples, which are associated with the operation of the second
radio subassembly, and works with a generic interface controller
(33), the digital baseband subassembly 88 has a simplified
functional and temporal view of the radio module:
o the radio subassembly RF is seen from the first baseband
subassembly 88 and a 88 signal processing application as
having a latency corresponding to the passage and processing
time from an application 88 to a single antenna plane (1 0)
20 whatever the command,
• at the radio subassembly comprising a digital portion (38) and an
analog portion (39),
• an interface controller (34) linked to a module (35) for processing
the messages MSG(H, data), said module (35) for processing the
messages is adapted to operate on the basis of a time HR (36),
and transmitting control signals to the digital portion (38) and the
analog portion (39) of the radio subassembly, transmitting and/or
receiving messages to/from baseband, the processing module
(35) controlling all of the radio portion RF,
• a memory (1 02) for storing the messages awaiting processing, a
table (101) for anticipating messages containing the temporal
acquisition values corresponding to each type of message and
that are used by the message processing module to implement the
message, a memory (102) for the messages, a module {103)
adapted to compare a time of implementation of a message with a
time that is necessary for execution thereof and to provide a signal
for triggering the processing of the message for the message
processing module (35) generating control/command signals to
said digital (38)/analog (39) portions, and a time-setting module
(1 04 ),
10 • said interface controllers (33), (34) are adapted to synchronize the
time of the digital subassembly and the time of the radio subassembly,
• said link L is adapted for conveying the dated messages between a
radio subassembly and a digital BB subassembly.
15 2 - The architecture as claimed in claim 1, characterized in that it has a
restoration chain and an acquisition chain at the digital BB subassembly or at
the analog RF subassembly.
3 -The architecture as claimed in either of claims 1 and 2, characterized in
20 that the interface controller of the digital subassembly is adapted to generate
messages having the following format: a field address (71 ), followed by a
time of implementation (72) of a message, the type (73) of message, the size
of the data (7 4) and a field (75) for the data.
25 4 -The architecture as claimed in one of claims 1 to 3, characterized in that
the radio subassembly is a radio frequency subassembly RF.
5 - A method for guaranteeing the independence of a baseband application
BB in relation to a radio module RF, implemented in the architecture as
30 claimed in one of claims 1 to 4, having at least the following steps: controlling
one or more radio subassemblies (2) comprising at least one interface
controller (34), from a digital BB subassembly comprising an interface
controller (33) and an application TS and characterized in that it involves at
least the processing of the following actions:
• configuring the radio submodule(s) and determining the specific
5 anticipation time with which the application TS has to work,
• synchronizing the times between the digital BB subassembly and the
radio subassembly(ies ),
• transmitting, from the baseband subassembly and to a radio
subassembly, messages MSG(H, data) having the parameters
1 o indicating to the radio submodule the processing operations to be
performed,
• storing the message in memory and, as soon as the period of memory
storage has finished, executing the message by configuring the radio
submodule and by activating the content of ihe data of the message
15 for the operation of the antenna.
6 - The method as claimed in claim 5, characterized in that on startup, the
method involves at least the following steps:
• a first phase for determining the passage time of the interface between
20 a radio subassembly and the BB subassembly,
• a second phase of synchronization of the time HR of a radio
subassembly RF and the time H8 of the BB subassembly,
• a third phase, in which the BB subassembly retrieves the minimum
anticipation time used by the application TS for transmitting the dated
25 messages from the BB subassembly to the radio subassembly,
• a fourth phase, in which the latency between the BB and RF is used to
deduce the single minimum anticipation time that will be used by the
BB for controlling the RF.
30 7 - The method as claimed in claim 6, characterized in that it involves at least
the following steps:
• a first phase, in which a transmission/reception loop is implemented by
executing the following steps,
• at the instant t=H, (130), the interface controller BB sends a message
MSG(request (1:)) to the interface controller RF in order to retrieve the
5 time required by the RF to produce, (131), a return message MSG(1:)
that contains the transit time D1 for replying, 1: is the time for producing
the message,
• the departure t and arrival t' = H+2D1+ 1: instants of the loop are
measured at the BB subassembly in order to determine the transit
10 time D1,
• a second phase, in which the BB subassembly transmits, at the instant
H8 , (133), a message MSG(time setting [Hs+D1]) to the RF
subassembly containing the time H8 increased by the transit time 0 1,
or the time HR increased by the transit time o~. the period necessary
15 for routing the message to the time module at the radio subassembly,
• a third phase, in which the application TS sends, (136), by means of a
message MSG(Config RF), all of the configurations and/or
configuration information that is/are necessary for operation thereof,
notably the digital configuration (137a) and the analog configuration
20 (137b),
• in return, the radio subassembly returns (138), message MSG(DR), the
anticipation period DR necessary for processing the messages,
• the BB interface controller then accumulates the anticipation periods
DA=D1+DR, and provides, (139), this minimum anticipation value DA for
25 the application TS in order to converse with the RF.
8 - The method as claimed in claim 7, characterized in that, at transmission,
a message of IQ samples that is created by the BB comprises the date (72)
indicating the instant of output of the first sample on the antenna plane (1 0),
30 said output being deduced from the real-time tirne H8 of the subassembly
BB, the dated commands (502, 503) being executed on the required date
(72) whatever the order of generation of said commands.
9 - The method as claimed in claim 7, characterized in that, at reception, a
5 message of IQ samples that is created by the radio subassembly comprises
the date (72) indicating the instant of consideration of the first sample on the
antenna plane (1 0), said date being deduced from the real-time time HR of
the radio subassembly.
10 10- The method as ciaimed in claim 7, characterized in that a message for
configuring the radio subassembly, which message is created by the BB,
comprises the date (72) indicating the instant at which the radio subassembly
RF needs to be configured for the incoming/outgoing samples, and the date
is deduced from H8 for the BB subassembly.
11 - The method as claimed in claim 7, characterized in that a control
message created by the RF comprises the date indicating the instant at
which the measurements are taken, and the date is deduced from the realtime
time HR of the radio subassembly.
12 -The method as claimed in one of claims 1 to 11, characterized in that it
is implemented in a radio frequency subassembly RF.
13 -The use of the method as claimed in one of claims 1 to 12:
25 • on a system integrating the BB and the RF within one and the same
housing,
• on a system in which the BB and the RF are accommodated in two
housings that are physically separate and remote.
30 14 - The use of the method as claimed in one of claims 1 to 13 on systems
intended for the following applications: radar system, tactical (portable radio
wo 2014/154821 PCT/EP2014/056193
34
and vehicle radio), aeronautical and naval transmission system, goniometry
system, sensor/reflector system, jamming system, infrastructure transmission
system, instrumentation equipment, test bench, navigation system, spectrum
monitoring system.